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This chapter opens with a presentation of the classical Drude theory of electrical conduction and a theory proposed by Landauer. Based on the assumption that electrical conduction can be modeled as transfer of electrons between two electron reservoirs, the Landauer theory proves to describe particularly well the electrical resistance in nanoscale conductors, i.e., in nanostructures. Surprisingly, this theory implies that the conductance (and resistance) of a nanostructure is independent of its material and temperature, and only depends on the dimensions of the sample, changing in a stepwise manner with a step of h/2e 2 representing the conductance quantum. The quantization of electrical and thermal conductance in nanostructures has been verified experimentally. Conductance quantization in nanostructures is used in the analysis of large-scale integration circuits, as required by the currently used 14 nm technology and future technologies.

This chapter opens with a presentation of the classical Drude theory of electrical conduction and a theory proposed by Landauer. Based on the assumption that electrical conduction can be modeled as transfer of electrons between two electron reservoirs, the Landauer theory proves to describe particularly well the electrical resistance in nanoscale conductors, i.e., in nanostructures. Surprisingly, this theory implies that the conductance (and resistance) of a nanostructure is independent of its material and temperature, and only depends on the dimensions of the sample, changing in a stepwise manner with a step of h/2e 2 representing the conductance quantum. The quantization of electrical and thermal conductance in nanostructures has been verified experimentally. Conductance quantization in nanostructures is used in the analysis of large-scale integration circuits, as required by the currently used 14 nm technology and future technologies.

We propose to use measurements of electrical resistance for estimation of the geometric dimensions of nanostructures made of conductive materials. Transistors, resistors and conductive paths inside integrated circuits are fabricated in a form of thin films of progressively smaller size. At present (2017) microprocessors of fabrication technology of 10 nm have been manufactured. The technology of 7 nm will be implemented next year and the technology of 5 nm is expected in 10 years. The dimension of 10 or 5 nm refers to the length of a gate of a MOSFET transistor inside the chip. For the next generation of nanostructures, the 3D nanostructures, their scaling will be continued and measurements of them will be also necessary.

In the chapter, problems of measurements of electrical conductance in nanostructures, particularly in nanowires, are considered. According to the Landauer theory of electrical conductance, the conductance of nanostructure is quantized. The electrical conductance of nanowires was measured in a simple experimental system. Investigations have been performed in air at room temperature measuring the conductance between two vibrating metal wires with standard oscilloscope. Conductance quantization in units of G0 = 2e2/h up to five quanta of conductance has been observed for nanowires formed in many metals. The explanation of these universal phenomena is the formation of a nanometer-sized wire (nanowire) between macroscopic metallic contacts which induced, due to theory proposed by Landauer, the quantization of conductance. Estimation of geometrical dimensions of nanostructures on basis of measurements of their electrical conductance is proposed in this paper.

This chapter presents scanning probe microscopy and the most important microscopes using this technique. Historically the first of these devices, the scanning tunneling microscope (STM) is used for atomic-scale imaging of the surface of samples of conducting materials. The STM is an inestimable instrument for research in solid state physics, quantum chemistry and molecular biology. Its operation is based on the conversion of the distance between its tip and the studied surface into electric current. Another question is the control of the position of the scanning tip and the recording of data for generating a map of the studied surface. The experience acquired in the construction of the STM was of much use in the development of other types of scanning microscopes. In this chapter we discuss also the atomic force microscope (AFM), electrostatic force microscope (EFM), scanning thermal microscope (SThM) and scanning near-field optical microscope (SNOM). We also present a wide range of current and prospective applications of scanning microscopes.

The BF 245 transistors were investigated in the temperature range from300 K to 1.4 K. The transistors work satisfactorily in this temperature range. Some of the investigated transistors were used in a one-stage electronic amplifier. The amplifier operated properly in the whole temperature range between 300 K and 1.4 K . The voltage gain of the amplifier was 3 V/V in the temperature range from 4.2 K to 1.4 K. The dissipated power of the amplifier was 40 mW. Three thermal cycles 300 K … 1 . 4 K … 300 K were performed. The performance of the amplifier was not altered after the thermal cycles were completed.

We have observed conductance quantization of macroscopic metallic contacts in a circuit with a mechanical relay and LC circuit. The investigation has been performed outdoors at room temperature, and it was focused on measuring the conductance between two vibrating metal wires. Transient states of the current in a circuit are also described in the paper, this description includes a contact with quantized conductance. We can assume the occurance of oscillations in an electrical circuit with a relay, due to existence of conductance quantization at relay contacts. When designing a circuit with transmitter, one should take into account the fact that the resistance of its contacts together with the capacity and inductance of the whole system may lead to the appearance of oscillations.

In the paper problems of electron transport in mesoscopic structures and nanostructures are considered. The electrical conductance of nanowires was measured in a simple experimental system. Investigations have been performed in air at room temperature measuring the conductance between two vibrating metal wires with standard oscilloscope. Conductance quantization in units of G0 = 2e2/h = (12.9 kΩ)-1 up to five quanta of conductance has been observed for nanowires formed in many metals. The explanation of this universal phenomena is the formation of a nanometer-sized wire (nanowire) between macroscopic metallic contacts which induced, due to theory proposed by Landauer, the quantization of conductance. Thermal problems in nanowires are also discussed in the paper.

The ability to work at low temperatures as well as the noise parameters of silicon junction field effect transistors were investigated. Some properties of the transistors at low temperatures result from self-heating of the silicon crystal of the transistor. The noise voltage of a JFET at low temperatures is determined by the temperature of its crystal, which is much higher than the ambient temperature of the transistor.