Author: "G. Cancelo" / Topic: law - Searchworks@Jio Institute Digital Library Search Results

Author: R.J. Yarema, S. Cihangir, A. Vargas, Simon Kwan, S. Zimmermann, A. Mekkaoui, J. Hoff, J.A. Appel, P. A. Kasper, G. Cardoso, D. C. Christian, G. Cancelo, and R.W. Downing
Subjects: Physics, Nuclear and High Energy Physics, Fabrication, Pixel, business.industry, Detector, Particle accelerator, Integrated circuit, BTeV experiment, Particle detector, law.invention, law, Optoelectronics, Fermilab, business, Instrumentation
Abstract: This paper describes the baseline design and a variation of the pixel module to handle the data rate required for the BTeV experiment at Fermilab. The present prototype has shown good electrical performance characteristics. Indium bump bonding is proven to be capable of successful fabrication at 50 micron pitch on real detectors. For solder bumps at 50 micron pitch, much better results have been obtained with the fluxless PADS processed detectors. The results are adequate for our needs and our tests have validated it as a viable technology.
Published: 2001
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Author: R. Kwarciany, M. Bowden, G. Cancelo, and J. Urish
Subjects: Data processing, Optical fiber, business.industry, Computer science, Controller (computing), law.invention, Data acquisition, law, Embedded system, Control system, Fermilab, business, Computer hardware, Computer Automated Measurement and Control
Published: 2005
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Author: G. Cancelo, J. Andresen, J.A. Appel, J. Hoff, P. A. Kasper, B.K. Hall, A. Mekkaoui, R.J. Yarema, S. Cihangir, D. C. Christian, S. Zimmermann, Simon Kwan, G. Cardoso, and R.W. Downing
Subjects: Engineering, Pixel, Physics::Instrumentation and Detectors, business.industry, Detector, ComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION, BTeV experiment, Integrated circuit, Chip, law.invention, Data acquisition, Sensor array, law, Nuclear electronics, Electronic engineering, High Energy Physics::Experiment, business
Abstract: At Fermilab, both pixel detector multichip module and sensor hybridization are being developed for the BTeV experiment. The BTeV pixel detector is based on a design relying on a hybrid approach. With this approach, the readout chip and the sensor array are developed separately and the detector is constructed by flip-chip mating the two together. This method offers maximum flexibility in the development process, choice of fabrication technologies, and the choice of sensor material. This paper presents strategies to handle the required data rate and performance results of the first prototype and detector hybridization.
Published: 2002
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Author: G. Chiodini, J.A. Appel, M. Artuso, J.N. Butler, G. Cancelo, G. Cardoso, H. Cheung, D.C. Christian, A. Colautti, R. Coluccia, M.Di Corato, E.E. Gottschalk, B.K. Hall, J. Hoff, P.A. Kasper, R. Kutschke, S.W. Kwan, A. Mekkaoui, D. Menasce, C. Newsom, S. Sala, R. Yarema, J.C. Wang, and S. Zimmermann
Subjects: Nuclear and High Energy Physics, Particle physics, Silicon pixel detectors, Silicon, Physics::Instrumentation and Detectors, FOS: Physical sciences, chemistry.chemical_element, Particle detector, law.invention, High Energy Physics - Experiment, Telescope, High Energy Physics - Experiment (hep-ex), Optics, law, Fermilab, Instrumentation, Image resolution, Physics, Pixel, business.industry, Track (disk drive), Particle accelerator, chemistry, Physics::Accelerator Physics, High Energy Physics::Experiment, business, Beam (structure), Pixel detector
Abstract: The results of the BTeV silicon pixel detector beam test carried out at Fermilab in 1999-2000 are reported. The pixel detector spatial resolution has been studied as a function of track inclination, sensor bias, and readout threshold., 8 pages of text, 8 figures, Proceedings paper of Pixel 2000: International Workshop on Semiconductor Pixel Detectors for Particles and X-Rays, Genova, June 5-8, 2000
Published: 2000

Author: M. Hawkey, S. Hansen, G. Cancelo, A. Cotta-Ramusino, and R. Patti
Subjects: Physics, Nuclear and High Energy Physics, business.industry, Electrical engineering, Integrated circuit, Dead time, Chip, law.invention, Microprocessor, Nuclear Energy and Engineering, CMOS, law, Integrator, Nuclear electronics, Electrical and Electronic Engineering, Full custom, business
Abstract: A prototype 64-channel Fastbus TDC built at Fermilab is described. The module features a full custom CMOS four-channel gated integrator chip. One level of analog buffering at the inputs is implemented on chip. A four-event-deep output queue at the bus interface allows a high event rate with low dead time. Each channel can record up to two hits per event. With an occupation rate of 10%, the module can operate at 40000 events/s with dead time of the order of 15%. The TDC operates in common stop mode with a full scale of 1 mu s and a resolution of 1 ns. Data compaction and a leading word count format have been implemented. The board is less complex than current designs. >
Published: 1990

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