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Start Over Author "Labrado, C." Topic electric circuit analysis
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1. Design of a multilayer five-input majority gate and adder/subtractor circuits in NML computing.

Author

Labrado, C. and Thapliyal, H.

Subjects
*NANOMAGNETICS, *VERILOG (Computer hardware description language), *POLARIZATION (Electricity), *ELECTRIC inverters, *ELECTRIC circuit analysis
Abstract

Implementation of a five-input majority gate, full adder, and full subtractor using multiple layers in nanomagnetic logic is proposed. Correct functionality of the designs was verified through the use of a special purpose Verilog library. [ABSTRACT FROM AUTHOR]

Published
2016
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