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It has been shown that threading dislocations may be removed from patterned mismatched heteroepitaxial layers through a process of dislocation sidewall gettering (DSG), also known as patterned heteroepitaxial processing (PHeP). This gettering approach involves the glide of dislocations toward sidewalls, where they become trapped by image forces. Simple quantitative models have been developed for DSG, but they fail to explain why only partial removal of dislocations was observed in ZnSSe/GaAs (001) whereas complete removal has been achieved in ZnSe/GaAs (001) with higher lattice mismatch. Until now this phenomenon has been qualitatively explained by the presence of sessile dislocations. Here we present a quantitative model for pinning interactions and show that these interactions can limit the growth of misfit dislocation segments and thereby reduce the effectiveness of DSG in ZnSySe1-y/GaAs (001) relative to ZnSe/GaAs (001).

We present the results of a transmission electron microscopy and X-ray diffractometry investigation of AlN/c-Al2O3 templates with GaN ultrathin insertions grown by plasma-assisted molecular beam epitaxy. It has been shown that AlN buffer layers with faceted surface morphology provide a greater threading dislocation density reduction than smooth layers. The filtering effect of GaN ultrathin insertions has been confirmed.

Compositionally graded buffers (CGBs) are essential components of high-efficiency III–V inverted metamorphic solar cells, and high-quality CGBs with low defect densities are a requirement for high device efficiencies. In this article, we use plan-view and cross-sectional cathodoluminescence spectrum imaging (CLSI) to investigate the effect of growth conditions on the microstructure of Al y Ga1- x - y In x As CGBs with x In > 0.30. CLSI reveals significant compositional fluctuation in these materials that correlates with the distribution of threading dislocations in the CGBs. Threading dislocations are observed to collect in regions between abrupt transitions in emission energy, implying that concomitant strain fluctuations in these regions restrict dislocation motion. Thus, the compositional fluctuation leads to elevated threading dislocation densities that degrade CGB quality. We also correlate compositional fluctuation in the CGB with compositional fluctuation in subsequently grown device layers. The effectiveness of specific growth conditions at suppressing compositional fluctuation and limiting threading dislocation density is evaluated. CGBs grown at high temperatures with high Al content exhibit the lowest defect densities. The use of a high V/III ratio suppresses compositional fluctuation and defect density. These insights lead directly to improvements in the efficiency of metamorphic Ga1- x In x As solar cells grown on Al y Ga1- x - y In x As CGBs.

X-ray topography defect analysis of entire 1.8-inch GaN substrates, using the Borrmann effect, is presented in this paper. The GaN wafers were grown by the ammonothermal method. Borrmann effect topography of anomalous transmission could be applied due to the low defect density of the substrates. It was possible to trace the process and growth history of the GaN crystals in detail from their defect pattern imaged. Microscopic defects such as threading dislocations, but also macroscopic defects, for example dislocation clusters due to preparation insufficiency, traces of facet formation, growth bands, dislocation walls and dislocation bundles, were detected. Influences of seed crystal preparation and process parameters of crystal growth on the formation of the defects are discussed.

In this study, the structures of threading dislocations (TDs) in a 4H-SiC epilayer were directly characterised using large-angle convergent beam electron diffraction (LACBED) via transmissi...

The performance of X-ray imaging detectors based on epitaxial Ge-crystal arrays grown on patterned Si substrates is severely limited by the presence of misfit and threading dislocations. Here, we study the effect of cyclic thermal annealing on misfit dislocations at the Ge/Si interface. By scanning transmission electron microscopy and energy dispersive X-ray spectroscopy, it is shown that the annealing process promotes the diffusion of Si into the Ge crystal resulting in a corrugated interface and slightly reduces the dislocation density. Finally, our results demonstrate that the thermal process is very effective at eliminating twin boundaries.

We present principle of defect characterization of GaN using multiphoton-excitation photoluminescence and several experimental results. Threading dislocations and basal plane dislocations in n-type GaN are observed from near-band-edge emission imaging. The diameters of dark spots and dark lines are determined by the minority carrier diffusion length. Three-dimensional feature of dark lines is different by the Burgers vectors of dislocations. Based on these properties, nondestructive classification of dislocations is possible. Simultaneous detection of near-band-edge emission and yellow luminescence can be utilized to visualize three-dimensional growth processes such as facet-initiated epitaxial lateral overgrowth, which is used to obtain GaN substrates with low threading dislocation densities.

We demonstrate that threading dislocations in $(\mathrm{Al},\mathrm{Ga})\mathrm{N}/\mathrm{Ga}\mathrm{N}$ heterostructures can be spontaneously decorated by acceptors during the epitaxial process. First-principles calculations show that the threading dislocation introduces detrimental deep electronic states both above the valence-band maximum (VBM) and below the conduction-band minimum (CBM) of $\mathrm{Ga}\mathrm{N}$. Because of the electron transfer between the occupied level above the VBM of the threading dislocation and the defect states of acceptors, acceptors will decorate the threading dislocation, which leads to the shift of the dislocation states. For the occupied deep states above the VBM, the acceptor decoration shifts the deep states toward the VBM, which may constructively contribute to the dislocation tolerance of $(\mathrm{Al},\mathrm{Ga})\mathrm{N}/\mathrm{Ga}\mathrm{N}$ heterostructures. For the unoccupied states below the CBM, the acceptor-decorated dislocation provides an additional electron-transfer channel besides that through the pure threading dislocations. These two distinct electron-transfer channels are observed in reverse-biased $(\mathrm{Al},\mathrm{Ga})\mathrm{N}/\mathrm{Ga}\mathrm{N}$ Schottky diodes, which is characterized by two distinct Frenkel-Poole-emission states.

The use promising group III-V materials for photovoltaic applications is hindered by the high density of threading dislocations when integrated with silicon technology. Here, we present an electrochemical deep etching strategy to drastically reduce the defect density. We seek to accommodate the effects of the lattice mismatch by introducing nanovoids inside the Ge/Si interface, which intercept dislocations, facilitating their subsequent annihilation and prevent them from reaching the active layers of the device. This allows an appreciable dislocation density, which unlocks the potential of providing high quality Ge-on-Si virtual substrates for growing lattice-matched III-V photovoltaics.

The strain relaxation mechanism in III-N materials is occurred through the motion of dislocations that generated at III-N/Si interface as a result of large mismatch in lattice and thermal expansion coefficients. As a result of the large lattice mismatch between different layers, the upper layer gets strained and with thicker layers, the strain energy increases until a thickness limit called the critical material thickness. Most of such dislocations (threading dislocations) penetrate the top surface forming V-pits defects at the top surface that relax the material. These V-pits directly affect the device efficiency, performance, and reliability. Therefore, in this paper, a thermodynamics-based model will be used to study the V-pits formulation and growth in the III-N (especially, InGaN-based materials). In this model, three types of energies are used under a balanced system to model the V-pit formation and growth. These energies are the strain energy in the InGaN epilayer, the destruction energy as a result of dislocation to form the V-pit, and the strain energy of the V-pits facets that generated during the facet nucleation.

International audience; The origin of threading dislocations (TDs) in nitride films is not completely understood but it is well established that they degrade the film properties. This work investigates the assumption that they arise from the interface between the film and sapphire substrate owing to small in-plane rotations between nitride domains. Bollmann’s formalism is first used to determine the characteristics of dislocations at the nitride film/sapphire interface that compensate both for the parametric misfit and a small in-plane rotation of the film as frequently observed. It is shown that the dislocation density and line direction depend on the rotation angle. When islands grow and coalesce in the nucleation layer, some interfacial dislocations orientate along [0001] in the boundaries between domains and transform to so-called TDs. The amount of TDs lying in the boundaries between nitride domains is calculated as a function of the rotation angle. Estimations of TD density in the nucleation layer are deduced for a range of domain sizes and compared with experimental values of the literature.

AIP Advances 10(4), 045028 (2020). doi:10.1063/1.5141905, Published by American Inst. of Physics, New York, NY

A mechanism of controlling the degree of strain relaxation in GeSn epilayers, grown by molecular beam epitaxy on Ge/Si(001) substrates, is reported in this work. It is demonstrated that by suitably controlling the thickness and the growth recipe of the underlying Ge buffer layer, both fully-strained and highly-relaxed GeSn epilayers can be obtained, without significant Sn segregation. The strain relaxation of the GeSn epilayer is mediated by threading dislocations of the Ge buffer layer, propagating across the Ge-GeSn interface. Systematic estimation of the threading dislocation density in both the alloy epilayer and the Ge buffer layer, by the approach developed by Benediktovich et al. [A. Benediktovitch, A. Zhylik, T. Ulyanenkova, M. Myronov, A. Ulyanenkov (2015), J. Appl. Cryst. 48, 655–665] supports this observation, and also reveals that no additional dislocations are generated at the Ge-GeSn interface. Together with recently reported techniques to arrest dislocation propagation in GeSn epilayers, these results bode extremely well for realization of highly-relaxed GeSn epilayers, much coveted for development of GeSn-based emitters.

Compositionally step-graded Al1-xInxAs (x = 0–0.31) and Ga1-xInxP (x = 0.48–0.78) metamorphic buffers were grown on GaAs substrates by metal-organic chemical vapor deposition to fulfill the lattice transition from GaAs to In0.30Ga0.70As.With the same buffer structure, thickness, and misfit grade rate, InGaAs layers on AlInAs buffer displayed a much better surface morphology and lower density threading dislocations than that on GaInP buffer. The reciprocal space mappings of the samples displayed that the AlInAs buffer relax the strain quickly, while the GaInP buffer remained partially strained through the layers and sufficient relaxation was achieved after the InGaAs layer growth. The different strain relaxation mechanisms were mainly attributed to the high growth temperature of AlInAs, which facilitate dislocation nucleation and glide, especially α dislocations. For GaInP buffers, the quality can be improved profoundly by reducing the misfit grade rate. This work provides a helpful guide for the design and growth of lattice mismatched semiconductor devices.

GaSb based photovoltaic devices have been demonstrated on GaAs substrates by inducing interfacial array of 90° misfit dislocations. Despite the beneficial qualities of the highly stable 90° misfit dislocation, there is a significant density of residual threading dislocations in the GaSb layer, resulting in the degradation of the electrical performance of such photovoltaic cells compared to lattice matched devices. We aim to reduce threading dislocation density by optimizing growth temperature and by using an AlSb dislocation filtering layer. The growth temperature optimization results in a reduction of the threading dislocation density to 1.3 × 108 cm−2. Adding an AlSb dislocation filtering layer further improves the electrical performance of the GaSb solar cells by reducing the threading dislocation density to 4 × 107 cm−2. A comparison between the experimental data and theoretical calculation confirms that the recombination in dislocation centers is a dominant loss mechanism in GaSb solar cell grown on GaAs substrate.

High quality In0.30Ga0.70As layers on GaAs substrates were obtained using compositional undulating step-graded Ga1-xInxP (x = 0.48–0.78) buffers grown by metal-organic chemical vapor deposition. The density of threading dislocation is about 4.0 × 106 cm−2 and the root-mean-square roughness is only 5.20 nm, which is much better than those grown on the conventional step-graded metamorphic buffer. On one hand, the reversed GaInP layers reduce the distribution imbalance of α dislocations between the (1 1 1) and (−1 −1 1) slip planes, which promote dislocation glide. On the other hand, the inserted tensile strained GaInP layers change the direction of dislocation glide and facilitate dislocation annihilations, which effectively confine the threading dislocations in the buffer. Overall, this work provides a promising way to obtain virtual substrates for the achievement of desired metamorphic devices.

An approach to instant testing of epitaxial films with a sharp decrease in the threading dislocation density is proposed. High-resolution X-ray diffractometry, including reciprocal space mapping, has been used. The structure of GaAs/Si(001) heterosystems with low-temperature GaAs layers has been analyzed. A decrease in the density of threading dislocations in the GaAs film with the formation of a small-angle boundary has been detected.

The objective of this paper is to study the phenomenology of the extended defects generated by phosphorus (P) implantations in silicon with a special attention to the interaction with a previous implantation of the same specie already recovered by a furnace annealing. For this purpose we decided to analyze two P implantations: the first is shallower with a projected range of 110 nm and a dose high enough to amorphize the silicon, the second one is implanted after the furnace annealing of the first implantation and has a projected range of 1.4μm. For the deeper implantation different doses (from 1×1013 to 1×1014cm-2) and two different schemes of annealing have been tested. More in depth there is a third P implantation with a projected range of 2.3μm and a dose in the order of some 1013cm-2. Selective etching of silicon, transmission electron microscopy (TEM) and micro-photoluminescence, combined with secondary ion mass spectroscopy (SIMS) were used for the analysis of the implantation defects and for the determination of P distribution, respectively. Analyzing the two implantations separately we note that the shallower and amorphizing implantation left the dislocation loops aligned at the projected range, as expected; instead the couple of the deeper implantations shows the presence of threading dislocations which generate in the implanted zone (between 1 and 3μm) and which increase for many μm reaching the surface and also the deepest zone of the wafer (6.5μm). The situation changes if the implantations are done in the same sample, first the shallow implantation followed by the double implantations in depth. The dislocations are more numerous, but shorter. The interesting fact is that the growth of the defects is inhibited mostly towards the surface, while the zone affected by the defectiveness in depth remains more or less the same.

Threading dislocations in a heteroepitaxial α-Ga2O3 film was visualized as etch pits on the surface. We found that etch pits were formed on a c-plane α-Ga2O3 epilayer by HCl gas etching. The epilayer was prepared by using epitaxial lateral overgrowth technique with a stripe mask pattern. The etch pit density was very high in the window region, and much lower in the laterally grown area on the mask. A line of etch pits was observed at a coalesced boundary. Thus, the etch pit density had a clear correlation with the dislocation density. The correspondence between the etch pits and dislocations was confirmed by cross-sectional bright- and dark-field transmission electron microscopy (TEM). This gas-etching technique can clarify the distribution of dislocations in a wide area, which cannot be explored effectively by TEM.

We report the influences of a Si-doped graded-superlattice (SiGSL) on the structural, optical, and electrical properties of InGaN/GaN light-emitting diodes (LEDs). For comparison, LEDs fabricated on an undoped graded superlattice (unGSL-LED) and conventional LEDs without the superlattice (C-LED) were prepared. The dependences of the carrier behaviors on the surface inhomogeneity and the defect/dislocation distribution were investigated by using fluorescence microscopy images, wherein the dark features corresponding to the defects/threading dislocations for the unGSL-LED and the SiGSL-LED were significantly reduced compared to that for the C-LED. The photoluminescence intensities of the unGSL-LED and the SiGSL-LED were 1.15 and 1.24 times stronger than that of the C-LED, respectively. The output powers of the unGSL-LED and the SiGSL-LED at an injection current of 20 mA were measured to be 1.32 and 1.41 times higher than that of the C-LED, respectively. Moreover, the electrostatic discharge characteristics of the LED sample using the SiGSL structure were drastically improved.

Threading dislocations (TDs) in an HVPE-grown free-standing GaN substrate have been studied by means of etch pit method using molten KOH+Na2O2 solution, cathodoluminescence (CL) mapping and transmission electron microscopy (TEM). We have focused on the correlation between (1) Burgers vectors of TDs, (2) their appearances as dark spots in CL image, and (3) geometries of corresponding etch pits. Based on the above results, dislocation categorization for GaN by using etch pits or CL is discussed.

The distribution of extended defects in silicon carbide (SiC) crystals grown on profiled seeds by the sublimation (physical vapor transport) method has been studied by optical microscopy in combination with chemical etching. It is established that free lateral growth on protruding relief elements (mesas) is accompanied by a sharp decrease in the density of threading dislocations and micropipes. The decreased density of dislocations is retained after growing a thick layer that involves the overgrowth of grooves that separated individual mesas.

To understand the behavior of a semiconductor device, you need to know how the material's $e\phantom{\rule{0}{0ex}}x\phantom{\rule{0}{0ex}}c\phantom{\rule{0}{0ex}}i\phantom{\rule{0}{0ex}}t\phantom{\rule{0}{0ex}}o\phantom{\rule{0}{0ex}}n\phantom{\rule{0}{0ex}}s$ (weakly bound electron-hole pairs) behave. The exciton diffusion length in GaN is often determined from the size of dark areas around dislocation outcroppings in cathodoluminescence maps. The present work shows that, contrary to common belief, the spatial extent of these areas is only weakly affected by diffusion, being set primarily by exciton dissociation in the piezoelectric field around the dislocation. In contrast, the local band-gap variation in the dislocation's strain field $d\phantom{\rule{0}{0ex}}o\phantom{\rule{0}{0ex}}e\phantom{\rule{0}{0ex}}s$ depend sensitively on exciton diffusion length, and hence enables its experimental determination.

The GaInAsSb material has been conventionally grown on lattice-matched GaSb substrates. In this work, we transplanted this material onto the GaAs substrates in molecular beam epitaxy (MBE). The threading dislocations (TDs) originating from the large lattice mismatch were efficiently suppressed by a novel metamorphic buffer layer design, which included the interfacial misfit (IMF) arrays at the GaSb/GaAs interface and strained GaInSb/GaSb multi-quantum wells (MQWs) acting as dislocation filtering layers (DFLs). Cross-sectional transmission electron microscopy (TEM) images revealed that a large part of the dislocations was bonded on the GaAs/GaSb interface due to the IMF arrays, and the four repetitions of the DFL regions can block most of the remaining threading dislocations. Etch pit density (EPD) measurements indicated that the dislocation density in the GaInAsSb material on top of the buffer layer was reduced to the order of 106 /cm2, which was among the lowest for this compound material grown on GaAs. The light emitting diodes (LEDs) based on the GaInAsSb P-N structures on GaAs exhibited strong electro-luminescence (EL) in the 2.0&ndash, 2.5 &micro, m range. The successful metamorphic growth of GaInAsSb on GaAs with low dislocation densities paved the way for the integration of various GaInAsSb based light emitting devices on the more cost-effective GaAs platform.

Threading dislocations in thick layers of InxGa1−xN (5% 12%, the facets of the V-defect featured dislocation bundles instead of the low indium fraction region. In this sample, the origin of the dark halo may relate to a compound effect of the dislocation bundles, of a variation of surface potential, and perhaps, of an increase in carrier diffusion length.

We have investigated the interaction between carbon impurities and threading dislocations and their impact on the transport properties of GaN grown on Si substrates. The incorporation of carbon impurity was found to be associated with dislocation density, with a linear dependence. It indicates that the carbon may accumulate around the dislocations. The temperature-dependent Hall-effect measurement further confirmed that those carbon-decorated dislocations can act as acceptor-like traps, existing at every c-lattice spacing along a threading dislocation. The acceptor-like traps are important scattering centers and, thus, cannot be neglected. By reducing the density of the carbon-decorated dislocation via introducing a thick dislocation filtering layer to reduce the dislocation-related acceptor-like trap scattering, a record room-temperature electron mobility of 1090 cm2/V s with a carrier concentration of ∼2 × 1016 cm−3 for n--GaN on Si was achieved. Our results provide an effective approach to obtain high-quality n−-GaN on Si for vertical GaN based devices.

Burgers vectors b of threading dislocations in freestanding GaN substrates were identified through statistical classification using the etch pit and multiphoton-excitation photoluminescence methods. The b = 1a + 1c threading mixed dislocations were propagated with large inclination angles more than four degrees from the c-axis to minimize elastic strain energy. The b = 1c threading edge dislocations had a large contrast difference of more than 0.4 in the photoluminescence image due to their strong nonradiative properties. Based on these characteristics obtained through multiphoton-excitation photoluminescence measurements, major types of dislocations (b = 1a, 1a + 1c, 1c) could statistically be identified.

The correlation between current-voltage (I–V) characteristics and threading dislocations was evaluated using p-n junction diodes on a high-quality GaN substrate with an average threading dislocation density (TDD) ≤ 4 × 105 cm−2 using the newly developed maskless 3D (M-3D) method. For the forward I–V characteristics, it was found that the “on” resistance (R on) increased as the number of dislocations in the diode increased. This result indicates that reducing the number of dislocations is effective in improving the forward I–V characteristics. On the other hand, for the reverse I–V characteristics, it was found that there was no clear correlation between the breakdown voltage (V B) and the number of dislocations. Also, the p-n diode’s destruction point and dislocation position did not match in almost all of the measured p-n diodes. These results suggest that dislocation has very little effect on V B and the p-n diode destruction.

We have systematically investigated highly mismatched AlInSb photodiodes grown on GaAs substrates operating in the mid-infrared range. A novel characterization method was introduced to analyze the recombination mechanism within an active layer of the devices, which revealed a high conductance stemming from the leaky behavior of dislocations. The introduction of a dislocation filter layer successfully reduced threading dislocations and improved resistance area product of photodiodes, leading to high detectivity at room temperature.

Threading dislocations have been studied by means of etch pit method using molten KOH + Na 2 O 2 solution, cathodoluminescence and transmission electron microscopy. We focus on the geometrical features of etch pits and their correlation with the recombination behavior at the dislocations. Four types of etch pits can be recognized after etching according to their sizes and depths, among which the middle-sized etch pits correspond to dislocations with the strongest non-radiative recombination. TEM observation has confirmed that dislocation beneath the large-sized etch pit is a mixed-type dislocation having both c - and a -component.

Solution growth of high-quality 4H-SiC bulk crystals has been performed by using Si-Cr based melt at 2000°C. Through enlargement of crystal diameter which is controlled by meniscus height during growth, dislocation free area has been successfully obtained on the periphery of the crystal. However, the threading dislocations in the seed crystal have penetrated into the grown crystal and have been located around the center of the crystal. To reduce dislocation density in the grown crystals, we have used threading-dislocation-free seedcrystals prepared by solution growth on (1-100). The solution growth on the seed crystal sliced from the (1-100) crystal has resulted in very low dislocation density of grown crystals. In an area of 16 mm2 for the growth surface, no dislocation has been detected.

In this paper, we show a novel measurement approach for determination of the threading dislocations density in GaN/sapphire structures using X-ray diffractometry at edge scans geometry. The presented method is based on measurements carried out both: classically from the surface and from the edge of the sample. Edge scans allow measurements of planes parallel to the growth direction, which permit the unambiguous determination of the number of edge dislocations. This is a new measurement approach that facilitates the characterization of structures. In addition, obtained results have been confirmed by using the wet etching method. In comparation with the obtained results, it can be concluded that both methods give the same results within the experimental uncertainty.

SiGe films were grown on a chemical vapor deposition (CVD)-grown Si0.88Ge0.12/Si (0 0 1) graded film with different growth solution compositions using a temperature interval of 950-940 °C by liquid phase epitaxy (LPE). The LPE films grown on the CVD-grown SiGe/Si (0 0 1) graded film are ≥86% relaxed, much more relaxed than those on bare Si (Wang and Quitoriano, 2019) since the existing threading dislocations in the CVD-grown SiGe/Si (0 0 1) graded film glide to create misfit dislocations without needing to nucleate new ones. The threading dislocation density of the LPE films is slightly lower than that of the CVD-grown SiGe films and on the same order of magnitude, ~106 cm−2. Since the CVD-grown SiGe/Si (0 0 1) graded film was annealed for 4 h before the LPE growth occurred, the properties of the CVD-grown SiGe/Si (0 0 1) graded film were studied and we found that the CVD-grown SiGe/Si (0 0 1) graded film have SiGe islands appear all over the surface aligned along the 〈1 1 0〉 crosshatch morphology and become more relaxed after annealing.

Strained-layer superlattices (SLSs) have been used to modify the threading dislocation behavior in metamorphic semiconductor device structures; in some cases they have even been used to block the propagation of threading dislocations and are referred to in these applications as “dislocation filters.” However, such applications of SLSs have been impeded by the lack of detailed physical models. Here we present a “zagging and weaving” model for dislocation interactions in multilayers and strained-layer superlattices, and we demonstrate the use of this model to the threading dislocation dynamics in InGaAs/GaAs (001) structures containing SLSs.

Since the invention of dislocation sidewall gettering (DSG) in 2000 the technique has been applied extensively in infrared focal-plane arrays and flat-panel displays. However, development of DSG technology has been guided mostly by empirical trials due to the lack of detailed physical models. Here we demonstrate the application of a dislocation dynamics model to evaluate DSG approaches in both ZnSySe1-y/GaAs (001) and InGaxAs1-x/GaAs (001) heterostructures. We find that the effectiveness of DSG is strongly dependent on composition in both material systems.

In this paper we describe state-of-the-art approaches to the modeling of strain relaxation and dislocation dynamics in InGaAs/GaAs (001) heterostructures. Current approaches are all based on the extension of the original Dodson and Tsao plastic flow model to include compositional grading and multilayers, dislocation interactions, and differential thermal expansion. Important recent break-throughs have greatly enhanced the utility of these modeling approaches in four respects: i) pinning interactions are included in graded and multilayered structures, providing a better description of the limiting strain relaxation as well as the dislocation sidewall gettering; ii) a refined model for dislocation-dislocation interactions including zagging enables a more accurate physical description of compositionally-graded layers and step-graded layers; iii) inclusion of back-and-forth weaving of dislocations provides a better description of dislocation dynamics in structures containing strain reversals, such as strained-layer superlattices or overshoot graded layers; and iv) the compositional dependence of the model kinetic parameters has been elucidated for the InGaAs material system, allowing more accurate modeling of heterostructures with wide variations in composition. We will describe these four key advances and illustrate their applications to heterostructures of practical interest.

Previous studies have shown that strain-controlled cyclic stability was maintained in bulk Cu samples with highly oriented nanoscale twins. In order to explore the underlying fatigue mechanism, transmission electron microscopy observations under two-beam diffraction condition were utilized to characterize the dislocation configurations in the twin/matrix layers of as-fatigued nanotwinned Cu. It was clarified that the threading dislocations with Burgers vector parallel to twin boundaries are mainly active during fatigue. A three-dimensional stereo projection was re-configured for demonstrating the special structure of dislocations in nanoscale twins.

This letter presents an improved method to fabricate Ge-on-insulator (GOI) wafer with extremely low defect density. In the traditional Ge condensation approach, the Si/SiGe/SOI structure is utilized as the starting substrate, and the misfit dislocations formed at the SiGe/SOI interface will evolve into the threading dislocations during the Ge condensation process, thus resulting in high density of defects residual in the final GOI wafer. In the present study, the defect evolution process is precluded via the direct condensation of SiGe-on-insulator (SGOI), which is fabricated by ion-cut technique prior to the Ge condensation. Compared to the traditional Ge condensation approach, the threading dislocation density (TDD) of GOI obtained by the improved method is significantly reduced from 1 × 107cm-2to 7 × 105cm-2. In addition, a considerable enhancement (56%) of the hole mobility for the modified Ge condensation approach is achieved. Our modification may bring the revival of the Ge condensation technique in GOI wafer manufacturing and enable the potential application in post-silicon era. © 2015 Elsevier B.V. All rights reserved.

Solution growth of SiC has attracted significant attention due to its potential for the production of high-quality SiC wafers. We have recently investigated the dislocation propagation behavior during SiC solution growth with the aim of reducing the dislocation density. Threading dislocations were found to be converted to defects on the basal planes during solution growth. Utilizing this dislocation conversion phenomenon, we have proposed a dislocation reduction process during solution growth and achieved high-quality 4H-SiC crystal growth. Here we confirm the potential of SiC solution growth for the production of high-quality SiC wafers.

Computational studies of a-type threading edge dislocations parallel to the [0001] direction in bulk GaN reveal three possible structures of their cores that are characterized as the 4-atom ring, the 8-atom ring and the 5/7-atom ring configurations. Similar calculations made on the c-type threading screw dislocation suggest the existence of a full core, although the precise structure is still a matter of debate. Most studies associate the position of the dislocation with only high-symmetry points in the lattice and do not discuss the core stability in non-equiatomic configurations. Here, we investigate how the core structures of a-type edge and c-type screw threading dislocations depend on the position in the (0001) plane at which the dislocation is inserted perpendicular to this plane. Furthermore, by successively removing the high-energy atoms from the cores of these dislocations, we track the stability of each core in non-equiatomic configurations and identify the core structures of minimum energy. The edge dislocation is shown to prefer the 5/7-atom ring structure, while the core of the screw dislocation transforms into a new Ga-rich configuration with the associated energy drop of nearly 0.4 eV per one Angstrom of the dislocation length. For all types of dislocation cores found in this paper, we employ isotropic linear elasticity to estimate their core radii and core energies.

In this work, significant reduction of the density of threading dislocations (TDs) in AlN epilayers grown on sapphire substrates via metalorganic chemical vapor deposition has been obtained by insertion of thin intermediate-temperature interlayers (IT-ILs). The growth temperature of the IT-ILs ranged from 750°C to 950°C after the initial growth at high temperature of 1200°C. Detailed characterizations were performed to understand the mechanisms of the reduction in dislocation density. It is found that the relatively low growth temperature of the IT-ILs can modify the originally two-dimensional (2D) growth mode to a three-dimensional (3D) growth process and creates a high density of small islands at the interface. During the subsequent growth of the high-temperature AlN layer, the AlN islands initially coalesce to form larger grains as the growth proceeds, and some TDs present in the previous AlN epilayers are found to bend near the interlayer, leading to dislocation merging and annihilation.

The design of metamorphic buffer layers for semiconductor devices with reduced defect densities requires control of lattice relaxation and dislocation dynamics. Graded layers are beneficial for the design of these buffers because they reduce the threading dislocation density by (1) allowing the distribution of the misfit dislocations throughout the buffer layer therefore reducing pinning interactions, and (2) enhancing mobility from the high built-in surface strain which helps to sweep out threading arms. In this work, we considered heterostructures involving a linearly-graded (type A) or step-graded (type B) buffer grown on a GaAs (001) substrate. For each structure type, we studied the equilibrium configuration and the kinetically-limited lattice relaxation and non-equilibrium threading dislocations by utilizing a dislocation dynamics model. In this work, we have also considered heterostructures involving a constant composition ZnS y Se1−y device layer grown on top of a GaAs (001) substrate with an intermediate buffer layer of linearly-graded (type C) or step-graded (type D) ZnS y Se1−y . For each structure type, we studied the requirements on the thickness and compositional profile in the buffer layer for the elimination of all mobile threading dislocations from the device layer by the dislocation compensation mechanism.

Trimethylaluminum (TMAl) pre-seeding time, an important factor in controlling the quality such as morphology and dislocation of AlN on Si(111) substrate, was systematically investigated. It was revealed that different TMAl pre-seeding time indeed lead to substantially different AlN quality in terms of morphology and threading dislocations. For the optimized TMAl pre-seeding time 40 s in this work, the interface between AlN and Si(111) substrate without an amorphous layer was evidenced which is believed to be beneficial for growing high-quality AlN. A mechanism is proposed to explain the effect of the TMAl pre-seeding on AlN epitaxy on Si(111) substrate.

This paper introduces our recent challenges in fast 4H-SiC CVD growth and defect reduction. Enhanced growth rates in 4H-SiC epitaxial growth by high-speed wafer rotation and in a high-temperature gas source method promoting SiC bulk growth by increasing the gas flow velocity are demonstrated. Trials and results of deflecting threading dislocations by patterned C-face 4H-SiC epitaxial growth are also shown.

We report on the role of AlSb material in the reduction of threading dislocation density (TDD) in the GaSb/AlSb/GaAs system. The AlSb layers were grown using low-temperature (LT) MBE, exploiting the interfacial misfit (IMF) dislocation array. AlSb layers with four different thicknesses in the range of 1&ndash, 30 nm were investigated. The results showed the inhibiting role of LT-AlSb layers in the reduction of TDD. Values of TDD as low as 2.2 &times, 106 and 6.3 &times, 106 cm&minus, 2 for samples with thin and thick AlSb layers were obtained, respectively. The filtering role of AlSb material was proven despite the IMF-AlSb/GaAs interface&rsquo, s imperfectness caused by the disturbance of a 90&deg, dislocation periodic array by, most likely, 60&deg, dislocations. The dislocation lines confined to the region of AlSb material were visible in HRTEM images. The highest crystal quality and smoother surface of 1.0 &mu, m GaSb material were obtained using 9 nm thick AlSb interlayer. Unexpectedly, the comparative analysis of the results obtained for the GaSb/LT-AlSb/GaAs heterostructure and our best results for the GaSb/GaAs system showed that the latter can achieve both higher crystal quality and lower dislocation density.

AlGaN/GaN heterostructures were grown on the conventional planar sapphire substrate (CSS), nano-scale patterned sapphire substrate (NPSS) and micro-scale patterned sapphire substrates (MPSS) by metal organic chemical vapor deposition respectively. The heterostructure grown on the MPSS has significantly lower threading dislocation density (TDD) than those grown on the NPSS and CSS. The bending and quenching of threading dislocations induced by lateral growth are the main factors for the reduction of TDD. Correspondingly, the carrier mobility of heterostructure grown on the MPSS is also the highest.

We conducted a modeling study of the threading dislocation behavior in chirped and unchirped InGaAs/GaAs (001) strained-layer superlattices (SLSs) using a Dodson & Tsao / Kujofsa & Ayers (DTKA) type plastic flow model. Four types of SLSs were investigated: type I was chirped using compositional modulation, type II was chirped using layer thickness modulation, type III was unchirped with alternating layers of InGaAs and GaAs, and type IV was unchirped with alternating layers of InGaAs having two different compositions. Generally the surface and average values of the dislocation density decreased with increasing total thickness. The dependence on top indium composition was more complex, due to dislocation compensation and multiplication effects, but for type II and IV superlattices, the average and surface threading dislocation densities increased in nearly monotonic fashion with top indium composition. Based on these results, the compositionally-modulated chirped (type I) and InGaAs/GaAs unchirped (type III) superlattices appear to be best suited as buffer layers for metamorphic devices, while the chirped superlattices with layer thickness modulation (type II) and InGaAs/InGaAs unchirped (type IV) superlattices appear to be poorly suited for use as buffer layers for devices containing high indium content.

The increasing demand for complementary metal-oxide-semiconductor integrated GaN-based optoelectronics and power electronics calls for wafer-scale crack-free and high quality GaN thick film grown on Si. However, the huge mismatch in both lattice constant and coefficient of thermal expansion between GaN and Si often causes a high density of threading dislocations (TDD, typically 109–1010 cm−2) and the formation of micro-crack networks, producing a poor-quality GaN film with a limited thickness (