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A novel procedure for the realization of a fractional-order PID loop-shaping controller, suitable for precision control of mechatronic systems, is introduced in this work. Exploiting appropriate tools, the controller function is approximated as a whole, leading to a simple form of integer-order approximation, when compared to the case where each intermediate part of the PID transfer function is approximated. This leads to a direct implementation, composed of conventional active and passive elements. Simulation and experimental results, derived from the OrCAD PSpice simulator and a Field-Programmable Analog Array respectively, verify the efficient functionality of the proposed implementation procedure.

Novel double-dispersion models based on power-law filters are introduced in this work. These models are based on standard first-order and/or second-order low-pass filter transfer functions (denoted as mother functions) and do not require the employment of the fractional-order Laplacian operator. An attractive benefit, from the flexibility point of view, is that the number of parameters, which must be determined via optimization routines, depends on the selected combinations of mother filters. The validity of the proposed models is verified through fitting experimental bio-impedance data of fruit samples measured within a two-day period of time. The accuracy of the proposed models is compared with the classical double-dispersion Cole–Cole model for the same data.

Low-pass and high-pass non-integer order shelving filter designs, which are suitable for acoustic applications, are presented in this work. A first design is based on a standard fractional-order bilinear transfer function, while a second one is based on the transposition of the integer-order transfer function into its power-law counterpart. Both transfer functions are approximated using the Oustaloup approximation tool, while the implementation in the case of the power-law filters is performed through the employment of the concept of driving-point impedance synthesis. An attractive benefit is the extra degree of freedom, resulting from the variable order of both fractional-order and power-law filters, which allows improved design flexibility compared to the case of integer-order filters. From the implementation point of view, only one building block is required to realize both filter types, thanks to the employment of the Voltage Conveyor. European Union (European Social Fund~ESF) through the Operational Program Human Resources Development, Education and Lifelong Learning [MIS-5000432]; Istanbul Technical University VLSI Laboratories for the Cadence Design Environment This work was supported in part by the Greece and the European Union (European Social Fund~ESF) through the Operational Program Human Resources Development, Education and Lifelong Learning in the context of the project Strengthening Human Resources Research Potential via Doctorate Research-2nd Cycle implemented by the State Scholarships Foundation (IKY) under Grant MIS-5000432, and in part by the Istanbul Technical University VLSI Laboratories for the Cadence Design Environment.

A simple and direct procedure for implementing fractional-order filters with transfer functions that contain Laplace operators of different fractional orders is presented in this work. Based on a general fractional-order transfer function that describes fractional-order low-pass, high-pass, band-pass, band-stop and all-pass filters, the introduced concept deals with the consideration of this function as a whole, with its approximation being performed using a curve-fitting-based technique. Compared to the conventional procedure, where each fractional-order Laplace operator of the transfer function is individually approximated, the main offered benefit is the significant reduction in the order of the resulting rational function. Experimental results, obtained using a field-programmable analog array device, verify the validity of this concept.

Topologies of power-law proportional-integral controllers, which offer minimization of the active component count are presented in this work. This is achieved thanks to the utilization of RC networks, which approximate driving-point impedances described by power-law functions. Additional important features of the presented schemes are their capability of achieving minimization of the spread of passive elements, as well as of implementing values of order greater than one.

This paper introduces a fractional-order eardrum Type-II model, which is derived using fractional calculus to reduce the number of elements compared to its integer-order counterpart. The proposed fractional-order model parameters are extracted and compared using five meta-heuristic optimization techniques. The CMOS implementation of the model is performed using the Design Kit of the Austria Mikro Systeme (AMS) 0.35 $$\upmu {\hbox {m}}$$ CMOS process, while the simulations have been performed using the Cadence IC design suite.

A novel resistorless topology for implementing fractional-order capacitor emulators, based on the employment of Operational Transconductance Amplifiers (OTAs) as active elements, is presented in this paper. The benefits of this topology are its simplicity in terms of component count, compared to other existing topologies in the literature, in addition to its electronic tunability. The performance of the presented topology is evaluated using Cadence and the 0.35 μm CMOS process Design Kit from Austria Mikro Systeme. Experimental results using commercial OTA chips are also provided, where the emulation of fractional-order capacitors is demonstrated.

Ultra-low-voltage sinh-domain implementation of delayed inertial neuron is introduced in this paper. The complex dynamical behavior of the neuron has been verified using three different activation functions, namely tanh, unipolar sigmoidal and bipolar sigmoidal. The networks containing two and four neurons have been designed, and their complex dynamical behavior has also been verified. The proposed implementation vis-a-vis the already reported designs offers the benefits of: (1) low-voltage operation, (2) integrability, due to resistor-less design and the employment of only grounded components, (3) electronic tunability of performance parameters by external currents, which adds flexibility to the proposed designs even after their final fabrication, (4) absence of inductors as, in contrast to reported designs, the delay has been implemented using component substitution method where inductors have been replaced by emulated inductors and (5) low-power implementation due to the inherent class AB nature of sinh-domain technique. Besides, for the first time, the complex dynamical behavior of four-neuron delayed inertial network has been implemented and its functioning for different activations functions has been considered and verified. HSPICE simulator tool and TSMC 130 nm CMOS process were used to evaluate and verify the correct functioning of the model.

This brief presents a universal filter based on multiple-input fully differential difference amplifier (FDDA) that is suitable for extremely low-power low-voltage applications. The filter employs three FDDAs, eight resistors, four capacitors and can provide low-pass, band-pass, high-pass, band-stop and all-pass voltage responses. Thanks to the utilization of the multiple-input MOS transistor technique, one differential pair with an arbitrary number of inputs is required for constructing the FDDA. Therefore, unlike the previously published FDDA-based universal filters, the proposed filter has the simplest CMOS structure with less power consumption than those already published in the literature. The filter operates with 0.5 V, consumes 740 nW and exhibits rail-to-rail input common mode range. The dynamic range of the BP filter is 73 dB for 1% third intermodulation distortion. The circuit was designed in Cadence/Spectre environment using the TSMC 0.18 µm CMOS process design kit, and the simulation results confirm the advantages of the proposed filter.

A novel topology for simultaneous emulation of fractional-order capacitors and inductors is presented in this paper. In particular, only one control terminal is used in order to select the type of the element as well as its fractional order. This is achieved through an appropriate fitting of the expressions of the intermediate bias currents, in such a way that, eventually, only the adjustment of one main bias current is required. The performance of the proposed topology is evaluated through post-layout simulations using Cadence and Austria Mikro Systeme (AMS) 0.35 μ m CMOS process.

A magnetic levitation plant is a fast, unstable, nonlinear mechatronic system vulnerable to measurement noise and external interference. Designing a high-performance and robust controller for such system, immune to noise and disturbances, and ensuring a wide operating region, is a challenging task. One can chose a well-know LQI controller, designed based on a linearized plant model, to stabilise the system and to eliminate the steady-state error. However, large plant-model mismatch and considerable non-linearity of the system may limit the control quality provided by such a solution. To improve the system performance one can introduce some additional degrees of freedom by replacing the integer order integrator with a fractional one. For practical implementation, the latter may be approximated with an integer-order realisation obtained with the time-domain Oustaloup method. The paper explains the idea of an $\text{LQI}^{\beta}$ controller, presents selected results of simulation tests of the closed-loop control system behaviour, and provides discussion of possible applications and advantages of the proposed approach.

An electronically adjustable realization of the three-element Windkessel model, thanks to the employment of an Operational Transconductance Amplifier-based structure, is presented in this work. Instead of following the typical method where the fractional-order capacitor is substituted by its active emulator, in this case the whole impedance is considered for the implementation of the model. The approximation of the total impedance function is performed through the utilization of an appropriate curve-fitting-based technique, which, compared to the conventional method where the approximation of the Laplacian operator is performed, offers improved accuracy. The presented post-layout simulation results, obtained using the Cadence IC design suite and MOS transistors models provided by the Austria Mikro Systeme (AMS) CMOS process, confirm the correct operation of the developed topology.

A novel procedure for compact realization of complex, multiple-parameter impedance functions is introduced in this paper. The concept is based on the consideration of the whole impedance function and the approximation of its frequency characteristics through a suitable curve-fitting-based algorithm, instead of separately approximating the intermediate terms of the function. In this way, the total impedance is implemented by a topology which is based on one transfer function, offering the benefit of reduced complexity. The impedance function that describes the electrical properties of edible drinks can be considered as a characteristic example and, therefore, is used for the verification of the proposed concept. Different samples of drinks, red wine from Bairrada, semi-skimmed and organic semi- skimmed milk, are considered with the behavior of the proposed schemes being evaluated through simulation and experimental results.

Fractional-order controllers have gained significant research interest in various practical applications due to the additional degrees of freedom offered in their tuning process. The main contribution of this work is the analog implementation, for the first time in the literature, of a fractional-order controller with a transfer function that is not directly constructed from terms of the fractional-order Laplacian operator. This is achieved using Padé approximation, and the resulting integer-order transfer function is implemented using operational transconductance amplifiers as active elements. Post-layout simulation results verify the validity of the introduced procedure.

The Cole&ndash, Davidson function is an efficient tool for describing the tissue behavior, but the conventional methods of approximation are not applicable due the form of this function. In order to overcome this problem, a novel scheme for approximating the Cole&ndash, Davidson function, based on the utilization of a curve fitting procedure offered by the MATLAB software, is introduced in this work. The derived rational transfer function is implemented using the conventional Cauer and Foster RC networks. As an application example, the impedance model of the membrane of mesophyll cells is realized, with simulation results verifying the validity of the introduced procedure.

A novel procedure for the circuit implementation of the single and double dispersion Cole-Cole models is presented in this work. The concept is that the impedance of the whole model is approximated and implemented by appropriately configured RC networks, instead of the conventional implementation method where the approximation of each one of the fractional-order capacitors is required. The approximation is performed through the utilization of a curve fitting technique, where both magnitude and phase frequency responses of the total impedance are fitted by a rational integer-order driving point impedance. The main offered benefit is the reduction of the number of passive element count, especially in the case of the double dispersion Cole-Cole model. The behavior of the resulting structures, in terms of accuracy and robustness, is evaluated through simulation results.

Fractional-order shelving filter designs, which are used for preserving the spectral balance of the human sound perception, are introduced in this work. The main attractive offered benefit is originated from the fact that fractional-order filters offer an extra degree of freedom with regards to the slope of the stop-band attenuation, allowing an improvement in the listening experience. The implementation of the filters is performed through the utilization of the partial fraction expansion of the rational integer-order transfer functions which approximate their fractional-order counterparts. The employment of Operational Transconductance Amplifiers as active elements offers the advantage of full electronic control of the implemented filters characteristics.

Fractional-order complementary filter topologies, which could be employed in various sensor applications, are presented in this paper. The core of the implementation is a fractional-order low-pass filter, while its complementary counterpart is derived through the substitution of the output of the low-pass filter with the input signal. Thanks to the utilization of current-mode signal processing, the summation operation needed for establishing the output of the complete filter is easily implemented.

An implementation of fractional-order controller suitable for a magnetic levitation system is presented in this work. It is constructed from operational amplifiers as active cells and the main offered benefit with regards to the conventional implementation is the reduced number of active component count. This is achieved thanks to the voltage summation operation offered by the operational amplifier. The performance of the controller has been evaluated by employing the OrCAD PSpice simulator and using the model of the OP07 operational amplifier discrete IC component.

The implementation of the Cole-Cole model, which describes the changes of the biceps tissue during fatigue exercises, is presented in this work. As the model parameters change with the subject under consideration, the electronic programming feature, offered by the proposed topology, is very important for achieving versatility of the scheme. This has been achieved through the utilization of the electronically dependent transconductance parameter of the Operational Transconductance Amplifiers, used for approximating the fractional-order capacitor and the passive resistors.

Nowadays, a realization of non-integer (fractional) order elements on a digital platform is a Widely researched problem. The theory of such dynamic components is relatively well grounded, however, many problems of implementation on a digital platform are still open. In this paper we consider real time fractional control of MagLev system. Classical methods of approximation and available toolboxes are unable to function in the fast discrete time environment. As a solution in this paper we use a novel library: SoftFRAC Which is dedicated for such control tasks. We illustrate library operation, controller design and present the application.

Fractional-Order circuits and networks being a widely researched field lags in its development due to the non-availability of its basic building block i.e. Fractional-Order Element (FOE). The FOE besides being compact and having wide frequency range should also be integrable with the Integrated Circuit (IC). In this paper, a detailed survey of single and multi-component FOE implementations has been carried out. The survey implies that a single component FOE is more suited for integration with the conventional circuitry but a market fit device is still a topic of research. Some future prospects and areas of research for the implementation of FOE have also been indicated in the paper. In addition, a survey of applications of single and multi-component FOE has also been included in the paper.

Elwakil, Ahmed/0000-0002-3972-5434; Psychalinos, Costas/0000-0002-0817-7228; Bertsias, Panagiotis/0000-0002-2669-5555; Minaei, Shahram/0000-0002-6921-9348 Reduced complexity CMOS fractional-order differentiator and integrator building blocks are introduced in this work, based on 2nd-order integer-order transfer function approximations. These blocks are then used for implementing fractional-order filters as well as a Leaky-Integrate-and-Fire Mihalas-Niebur neuron model. Cascading 1st and 2nd- order order blocks to obtain 5th-order integer-order transfer functions, improved bandwidth of approximation accuracy is achieved. Furthermore, the realization of fractional-order capacitor and inductor emulators is demonstrated. General Secretariat for Research and Technology (GSRT)Greek Ministry of Development-GSRT; Hellenic Foundation for Research and Innovation (HFRI); COST (European Cooperation in Science and Technology)European Cooperation in Science and Technology (COST) [CA15225] This work is supported by the General Secretariat for Research and Technology (GSRT) and the Hellenic Foundation for Research and Innovation (HFRI).; This article is based upon work from COST Action CA15225, a network supported by COST (European Cooperation in Science and Technology).

A novel topology for implementing fractional-order differentiator and integrator transfer functions is presented in this paper. This topology is based on the employment of a second generation Current Conveyor with EXtra inputs (EX-CCII), passive resistors, and fractional-order capacitors. The main benefit offered by this implementation is that both fractional-order differentiator and integrator transfer functions are simultaneously available at different output terminals, and that their frequency characteristics can be orthogonally adjusted without disturbing each other. With only one EX-CCII device needed, the proposed design is attractive from the active component count point of view. As an application example, a fractional-order controller is designed in order to control the velocity of a small scale submersible equipped with one propeller. Evaluation of the performance of the presented topology is performed using Cadence and the Design Kit provided by the Austria Mikro Systeme (AMS) 0.35 μ m CMOS process, as well as through experimental results.

Some neurons like neocortical pyramidal neurons adapt with multiple time-scales, which is consistent with fractional-order differentiation. The fractional-order neuron models are therefore believed to portray the firing rate of neurons more accurately than their integer-order models. It has been studied that as the fractional order of differentiator and integrator involved in the neuron model decreases, bursting frequency of the neurons increases. The opposite effect has been observed on increasing the external excitation. In this study, integer- and fractional-order Hindmarsh–Rose (HR) neuron models have been implemented using sinh companding technique. Besides, the application of the HR neuron model in a simple network of two neurons has also been considered. The designs offer a low-voltage and low-power implementation along with the electronic tunability of the performance characteristics. Due to the use of only metal-oxide semiconductor (MOS) transistors and grounded capacitors, the proposed implementation can be integrated in chip form. On comparing with existing implementations, the implemented fractional-order and integer-order models show a better performance in terms of power consumption, supply voltage, order and flexibility. The performance of the circuits has been verified using 130 nm complementary MOS (CMOS) technology process provided by Austrian Micro Systems using HSPICE simulation software.

This paper brings a practical and straightforward view on the design of circuit elements described by fractional-order dynamics known as the constant phase element (CPE) and their implementation in a novel structure of a PIαDβ (or PIλDμ in some literature) regulator based on fabricated CMOS voltage differencing current conveyors. Comparison of presented topology with known solutions indicates significant improvements regarding overall simplification, simpler electronic controllability of time constants, and having all passive elements in grounded form. Step-by-step design of the CPE as well as the PIαDβ regulator is supported by experiments with active devices fabricated using the C07 I2T100 0.7 μm CMOS process (ON Semiconductor). Laboratory tests in frequency and time domain confirm the correct operation of the designed application and the accuracy of the derived results in comparison with the theoretical expectations.

A novel universal biquad filter topology, realized using Operational Transconductance Amplifiers as active elements, is presented in this paper. It offers the benefits of orthogonal adjustment of the resonance frequency and the quality factor of the filter and, also, resistorless realization with grounded capacitors. The attractive characteristic is the requirement of single output Operational Transconductance Amplifies because in this way the implementation of the filter using commercially available discrete component ICs as OTAs is quite facilitated. Comparison with the literature shows that the proposed solution is the most beneficial from the active component count point of view. The behavior of the proposed topology is evaluated trough simulation results, using the OrCAD PSpice simulator, as well as through experimental results using the LM 13700 discrete component IC as Operational Transconductance Amplifier.

The approximations of fractional-order differentiator/integrator transfer functions are currently performed using integer-order rational functions, which are in general implemented through appropriate multi-feedback topologies. The spreading in the values of time-constants and scaling factors, needed to implement these topologies, increases as the order of the differentiator/integrator and/or the order of the approximation increases. This leads to non-practical values of capacitances and resistances/transconductances in the implementation. A solution to overcome this obstacle is introduced in this paper, based on the employment of a combination of fractional-order and integer-order integrators and differentiators for implementing the desired function. The performance of the proposed scheme is verified through post-layout simulations using Cadence and the Design Kit provided by the Austria Mikro Systeme $$0.35~\upmu \mathrm{m}$$ CMOS technology process.

A fractional-order capacitor and inductor emulator, implemented using MOS transistors, instead of passive capacitors, is introduced in this paper. This is achieved using current mirrors as active elements, without passive resistors, and therefore reducing the circuit complexity and resulting in both a resistorless and capacitorless topology. The emulator has been designed by combining fractional-order differentiator or integrator topologies with a voltage-to-current converter. An important benefit from the design flexibility point of view is that the same topology could be used for emulating a fractional-order capacitor or inductor through an appropriate selection of the time constants and gain factors. Considering that the MOS transistors operate in the strong inversion region, it is feasible for this emulator to operate at high frequencies. The evaluation of the proposed topology has been performed using Cadence IC design suite and the Design Kit provided by the Austrian Micro Systems 0.35 $$\upmu \hbox {m}$$ CMOS process.

The main aim of this paper is the investigation of practical aspects of synthesis of so-called active constant phase elements (CPE). The proposed synthesis is based on the multiplication of partial bilinear immittance segments with electronically adjustable locations of zero and pole. An overview of already known methods for the synthesis of active types of CPE is given and explained as the initial motivation of this work. This work introduces a solution of new simplified two-active-elements-based bilinear immittance and investigates its implementation in loop of operational-transconductance-amplifiers-based impedance converter operating as a general immittance multiplier of a theoretically infinite number of partial immittance segments. The presented results show practical consequences of applying these bilinear immittance segments in CPE synthesis. The most important advantages of the presented proposal are: simplified circuitry of a partial bilinear segment and mutually independent electronic and linear control of zero and pole frequencies allowing electronic reconfiguration of the order of CPE. The design is accompanied by a detailed analysis of real behavior and practical recommendations for design. Real non-ideal features of active elements have significant impact on CPE operation. Therefore, a detailed study of practical aspects has been prepared and supported by Matlab calculations. Conclusions resulting from analyses are supported by PSpice simulations and real experiments.

This paper deals with fractional-order controller implementations, which can be constructed by electronically controlled building blocks fully integrated on a single chip. The proposed DC motor controller structure offers 50% reduction of the active components count, compared to the corresponding already published counterpart. The proposed liquid level of the two-interacting-tank controller scheme is the first one in the literature offering the aforementioned features. Simulation results, based on the 0.35 &mu, m Austria Mikro Systeme technology process, confirm the correct operation of both proposed controllers.

A multi-function fractional-order filter topology, realized through the utilization of the partial fraction expansion tool, is introduced in this paper. Thanks to the employment of the log-domain technique, the topology offers the benefit of the electronic tuning of the filter characteristics and, also, reduced MOS transistor count in comparison with the corresponding already published structures. The evaluation of the behavior of the filters has been performed using the Cadence software and MOS transistor models provided by the Austria Mikro Systeme $0.35\mu m$ CMOS process.

novel topology capable of realizing fractional-order inverse low-pass, high-pass and band-pass filters is introduced in this paper. The main offered benefits are the electronic tuning capability of the frequency characteristics of the realized filter functions, which is a result of the employment of the log-domain filtering technique, and, also, the design versatility of the proposed scheme in the sense that all the aforementioned filter functions are realized by the same core, just by changing the values of the dc bias currents and adding appropriate current-mirror stages.

In this work, a novel implementation of a tunable fractional-order bandpass filter of order 2α is proposed. The transfer function of the presented filter is approximated using the second-order Continued Fraction Expansion (CFE) approximation technique. The filter transfer function is realized using the Inverse Follow the Leader Feedback (IFLF) structure. The Operational Transconductance Amplifiers (OTAs) are used to implement the filter circuit. Furthermore, the proposed filter is tunable by varying the value of only one bias current, which adjust the value of α. The simulations are performed using Matlab and Cadence software with UMC 0.13µ m CMOS technology.

A novel topology that approximates the behavior of fractional-order lead/lag compensators is introduced in this work. This is achieved using the Pade’ approximation of the function of the lead/lag compensator by a rational integer-order function. Thanks to the employment of Operational Transconductance Amplifiers as active elements, the proposed scheme offers the benefit of electronic tuning capability of the characteristics of the compensator. In addition, the presented scheme is capable of implementing both types of compensators using the same topology. The performance of the proposed topology is evaluated using the Cadence software and MOS transistor models provided by the Austria Mikro Systeme 0.35μm CMOS process.

Paper presents two implementations of a fractional-order proportional-derivative (PD) controller for a position servo system. The first one is an analog one with the offered attractive benefit of using only one second-generation current conveyor (CCII) as an active element, minimizing the active component count compared to the conventional way of implementation where it requires three CCIIs for this purpose. The behavior of the controller is evaluated using the Cadence software and MOS transistor models. The second approach uses a digital implementation of Oustaloup filter in a time domain version.

To practically implement a fractional-order filter, an integer-order approximation has to be realised as either digital or analog electronic circuits. Several implementation methods exist, each of them revealing different advantages. This paper considers the performance of analog active filters got with two implementation methods. The first filter, created with the Laguerre Impulse Response Approximation, makes use of several cascaded first-order filter sections. The second one uses FosterII RC network to approximate fractional-order capacitors and incorporates them in a low-pass filter structure. Investigation of both filters uses simulations and numerical experiments using SPICE and MATLAB environments. Experiments tested and compared both implementations based on several criteria. Results show their advantages and shortcomings, actual verdict depending on the desired application.

Novel fractional-order capacitor and inductor em-ulators are presented in this work, which offer fully electronic tunability of their characteristics and, simultaneously, reduced circuit complexity compared to those already introduced in the literature. This has been achieved through the utilization of the log-domain filtering for implementing the approximation of the required fractional-order differentiation/integration stages. The behavior of the presented topology is evaluated using the Cadence software and MOS transistor models provided by the 0.35μm Austria Mikro Systeme CMOS process.

An implementation of a fractional-order differentiator-lowpass filter is presented in this work, which is constructed from Operational Transconductance Amplifiers as active cells. This offers the benefits of electronic tuning and, also, of monolithic implementation. The presented scheme has been employed for the extraction of the R peaks in electrocardiogram signals due to its efficiency for performing this task even in a noisy environment. The provided post-layout simulation results confirm the correct operation of this solution as well as its reasonable sensitivity characteristics.

A fractional-order implementation of the model of the arterial viscoelasticity is presented in this work. The main attractive offered benefit is that all the states of the arterial viscoelasticity are implemented by the same core, just by adjusting appropriate dc bias currents. This has been achieved through the proposal of an enhanced fractional-order inductor emulator, where the characteristics of the element can be independently adjusted. The behavior of the designed model has been evaluated through post-layout simulation results, using the Cadence IC design suite and the Design Kit provided by the Austria Mikro Systeme (AMS) 0.35μm CMOS process.

A fractional-order proportional-derivative (PD) controller implementation for a position servo system is presented in this paper. The main offered attractive benefit is the employment of only one second-generation current conveyor (CCII) as active element, minimizing the active component count in comparison to the conventional way of implementation where three CCIIs are required for this purpose. The behavior of the controller is evaluated using the Cadence software and MOS transistor models provided by the $0.35\mu m$ Austria Mikro Systeme CMOS process.

An implementation of the cardiac tissue electrode interface fractional-order model is presented in this work. The realization of the required fractional-order capacitor emulator has been performed in such a way that the spread of the capacitor and transconductance values is minimized. Thanks to the employment of Operational Transconductance Amplifiers (OTAs) as active cells, the proposed scheme offers the benefits of electronic tuning and capability of implementation in monolithic form.

A novel simple scheme for performing throttle and brake control in an autonomous vehicle is introduced in this paper. The required fractional-order $\mathbf{PI}^{\lambda}$ controllers are implemented using just one active element, which is the extra-X second generation current conveyor. Another offered benefit is that the adjustment of the realized gain and time-constant can be performed independently. The behavior of the controller is evaluated using the Cadence software and MOS transistor models provided by the $0.35\mu m$ Austria Mikro Systeme CMOS process.

A multi-function fractional-order filter topology, constructed from 2 MOS transistors only, is introduced in this paper. The required time-constants are realized through the utilization of the small-signal transconductance parameter of the MOS transistor, offering electronic adjustment of the frequency characteristics of the derived filters. The main attractive offered benefit, in comparison with the literature, is the significant reduction of MOS transistor count and, consequently, the reduced power dissipation. The behavior of the filters is evaluated using the Cadence software and MOS transistor models provided by the $0.35\mu m$ Austria Mikro Systeme CMOS process.

A second-order bandpass filter topology, constructed from Operational Transconductance Amplifiers (OTAs) and capacitors, which is suitable for extracting the waves from electroencephalogram (EEG), is presented in this work. Due to the employment of the small-signal transconductance parameter of the OTA, the topology is resistorless and, also, offers the feature of the electronic tuning capability of the realized time-constants. An additional attractive feature is that the adjustment of the resonance frequency and the quality factor can be performed without disturbing each other, through an appropriate selection of the corresponding bias currents. Thus, the presented scheme is fully electronically controlled and the same core is used for extracting all the waves included in an electroencephalogram.

This paper deals with a fractional-order DC motor controller implementation, which is constructed from operational transconductance amplifiers and capacitors. In addition, for the electronic tuning capability and potential of implementation in monolithic form, the proposed structure offers significant reduction of the active components count. This is achieved through a manipulation of the transfer function of the controller integrator function in such a way that only fractional-order differentiation stage is required. An illustrative simulation example with the above mentioned benefit is presented.

A simple realization of the fractional-order Mihalas-Niebur neuron model is presented in this work. The required low-pass filter is implemented using current-mirrors offering simple circuitry and, also, electronic tunability of the realized time-constant. Due to the limited bandwidth required for this application, the necessary fractional-order capacitor is realized using an appropriately configured second-order RC network. The proposed realization highlights the connection between the fractional-order and the frequency spiking of the model through appropriate simulation results, which are derived via the Analog Design Environment of Cadence software, using MOS transistor models provided by the AMS $0.35\mu\mathrm{m}$ process.

A novel procedure for the circuit implementation of the driving-point impedance of frequency-domain material models, constructed from fractional-order elements of arbitrary type and order, is introduced in this work. Following this newly introduced concept, instead of emulating separately each fractional-order element in the model under consideration, the direct emulation of the complete model can be achieved through the approximation of the total impedance function. The magnitude and phase frequency responses of the impedance function are first extracted and approximated through curve-fitting-based techniques. A rational integer-order driving-point impedance function is then obtained and realized using appropriately configured passive and/or active topologies. Comparison between the conventional method and the proposed method reveals that the achieved benefit is the significant reduction of the passive and/or active components count. Verification of the introduced concept is performed through circuit simulation results using OrCAD PSpice in the case of a root/stem/electrode interface model, as well as through experimental results where the driving-point input impedance of the human respiratory system under different health conditions is synthesized on a Field-Programmable Analog Array device.

A power-law compensator scheme for achieving robust frequency compensation in control systems including plants with an uncertain pole, is introduced in this work. This is achieved through an appropriate selection of the compensator parameters, which guarantee that the Nyquist diagram of the open-loop system compensator-plant crosses a fixed point independent of the plant pole variations. The implementation of the fractional-order compensator is performed through the utilization of a curve-fitting-based technique and the derived rational integer-order transfer function is realized on a Field-Programmable Analog Array device. The experimental results confirm that the the phase margin is well preserved, even for ±40% variation in the pole location of the plant.