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GaN-on-Si high electron mobility transistors (HEMTs) were fabricated using Si CMOS-compatible metallization scheme for RF power amplifiers (PAs)in 5G low-power mobile system-on-chips (SoCs). Ta/Al metals were adopted for the ohmic contact formation. The device with 80-nm rectangular gate exhibited a drain current ( $I_{d\mathrm {max}}$ ) of 1.95 A/mm, a peak transconductance ( $g_{m}$ ) of 471 mS/mm, a cutoff frequency ( $f_{T}$ ) of 178 GHz, and a maximum oscillation frequency ( $f_{\mathrm {max}}$ ) of 74 GHz. At a mobile SoC-compatible supply voltage of $V_{d} = 5$ V, the device shows a peak power-added efficiency (PAE) of 51.4%/47.6%, a maximum output power density ( $P_{\mathrm {outmax}}$ ) of 1.12 W/mm/1.06 W/mm, and a gain of 16 dB/16 dB at frequency of 3.5 GHz/5 GHz, respectively. These results indicate the great potential of the GaN-on-Si HEMTs for high-performance and low-cost RF PAs for 5G mobile SoC applications.

A low voltage (&minus, 20 V) operating high-energy (5.48 MeV) &alpha, particle detector with a high charge collection efficiency (CCE) of approximately 65% was observed from the compensated (7.7 &times, 1014 /cm3) metalorganic vapor phase epitaxy (MOVPE) grown 15 &micro, m thick drift layer gallium nitride (GaN) Schottky diodes on free-standing n+-GaN substrate. The observed CCE was 30% higher than the bulk GaN (400 &micro, m)-based Schottky barrier diodes (SBD) at &minus, 20 V. This is the first report of &alpha, &ndash, particle detection at 5.48 MeV with a high CCE at &minus, 20 V operation. In addition, the detectors also exhibited a three-times smaller variation in CCE (0.12 %/V) with a change in bias conditions from &minus, 120 V to &minus, 20 V. The dramatic reduction in CCE variation with voltage and improved CCE was a result of the reduced charge carrier density (CCD) due to the compensation by Mg in the grown drift layer (DL), which resulted in the increased depletion width (DW) of the fabricated GaN SBDs. The SBDs also reached a CCE of approximately 96.7% at &minus, 300 V.

In this letter, InAlN/GaN high electron mobility transistors (HEMTs) with 40–200 nm rectangular gates and 300–700 nm source-to-drain distances were fabricated on Si substrates. The device with 40-nm gate and 300-nm source-to-drain distance exhibited a high drain current of 2.66 A/mm, a transconductance ( ${g} _{m}$ ) of 438 mS/mm, and a high current gain cutoff frequency ( ${f} _{T}$ ) of 250 GHz. To the best of our knowledge, this is the highest ${f} _{T}$ value reported so far for GaN-based transistors on Si. An effective electron velocity of ${1.1} \times {10}^{{{7}}}$ cm/s was extracted, which is comparable with those reported for InAlN/GaN HEMTs on SiC. These excellent results indicate that GaN HEMTs on Si have a great potential for low-cost emerging mm-Wave applications.

In this letter, we report an InAlN/GaN high electron mobility transistor (HEMT) with a planar nanostrip channel design to improve its transconductance $\text{g}_{\mathrm {\mathbf {\textsf {m}}}}$ and cut-off frequency $\text{f}_{\mathbf {\textsf {T}}}$ linearity. The planar nanostrips were formed by partial arsenic ion implantation isolation in the channel under the gate. Devices with a gate length ( $\text{L}_{{\textbf {g}}}$ ) of 80 nm and a source-to-drain distance ( $\text{L}_{\mathrm {\mathbf {\textsf {sd}}}}$ ) of 1 $\mu \text{m}$ were fabricated. A conventional device and a device with a fin-like nanowire channel were also fabricated together for comparison. It was observed that the nanostrip and nanowire channel structures can both suppress the access resistance increase at the high output current level, and thereby improve the device’s $\text{g}_{\mathrm {\mathbf {\textsf {m}}}}$ and $\text{f}_{\mathrm {\mathbf {\textsf {T}}}}$ linearity. Compared to the one using etching to form a fin-like nanostrip channel, the GaN HEMT with a planar nanostrip channel has demonstrated reduced parasitic capacitance and improved RF performance.

One effective approach to reduce the cost of GaN devices is to use 200 mm-diameter and 725 μm-thick p-Si substrates. We demonstrated RF and power GaN-on-Si HEMTs on small pieces of samples from 200 mm wafers using Au-contained process. f T /$f_{\max}$ of 36/33 GHz were achieved in 0.25 μm gate RF devices and breakdown voltage (BV off )>1200V was achieved in power devices. 200 mm wafers were fabricated using CMOS-compatible process and devices with BV off >850 V were achieved.

Effect of drift layer thicknesses (DLT) (2, 15 and $30 \mu m)$ in reverse current conduction mechanisms of vertical GaN-on-GaN Schottky Barrier Diodes grown MOCVD has been investigated for the first time. The conduction mechanism is changing from thermionic field emission (TFE) to thermionic emission (TE) when the DLT of GaN increases. The SBDs with DLT of $2 \mu m$ and $30 \mu m$ exhibit TFE through PooleFrenkel emission and TE, respectively. However, the SBDs with DLT of $15 \mu m$ exhibit both TFE and TE. Activation energy $(E_{a})$ of traps was also calculated to be 0.69 eV for $2 \mu m$, 0.38 for $15 \mu m$ and 0.4 eV for $30 \mu m$ respectively. $E_{a}$ of 0.69 eV and 0.4 eV could be associated with screw threading dislocations and the presence of Mg in the grown drift layer, respectively.

We demonstrate the potential of a novel hybrid nanostructure three-dimensional graphene (3D-C) coated with boron nitride (BN) as an electromagnetic interference (EMI) shield. BN, deposited by sputtering, encapsulates 3D-C to form a light-weight graphene based EM shield that has an electrically insulating exterior. The BN deposited on 3D-C was homogeneously distributed with even coverage on the struts of 3D-C. EMI shielding results have shown that the hybrid material has a total shielding effectiveness (SET) of 53dB and 58dB in the X band and Ku band respectively. EDB (Economic Devt. Board, S’pore) Accepted version

We have investigated the influence of the two-dimensional electron gas (2DEG) in AlGaN/GaN high electron mobility transistors (HEMTs) on their reliability under ON-state conditions. Devices stressed in the ON-state showed a faster decrease in the maximum drain current (I Dmax ) compared to identical devices stressed in the OFF-state with a comparable electric field and temperature. Scanning electron microscope (SEM) images of ON-state stressed devices showed pit formation at locations away from the gate-edge in the drain-gate access region. Cross-sectional transmission electron microscope (TEM) images also showed dark features at the AlGaN/SiN interface away from the gate edge. Electron energy loss spectroscopy (EELS) analysis of the dark features indicated the presence of gallium, aluminum and oxygen. These dark features correlate with pits observed in the SEM micrographs. It is proposed that in addition to causing joule heating, energetic electrons in the 2D electron gas contribute to device degradation by promoting electrochemical oxidation of the AlGaN.

A comprehensive scalable trap-charge model for the dc and pulsed $I$ – $V$ modeling of GaN high electron-mobility transistor is presented. While interface traps are considered for dc $I$ – $V$ modeling, surface states and traps in the AlGaN barrier and GaN buffer are considered for the pulsed $I$ – $V$ model. A surface-potential-based model is presented for interface traps, which is then adapted to the current model for the dc modeling. For the pulsed $I$ – $V$ modeling, a semiempirical approach is proposed for gate lag as well as both gate-lag and drain-lag conditions. The model is able to capture the effects of gate ( $V_{\mathrm{ gq}})$ and drain ( $V_{\mathrm{ dq}})$ quiescent biases as well as the stress time ( $T_{\mathrm{\scriptscriptstyle OFF}})$ , and is validated with both numerical simulation and measurement data. Finally, for the accurate transient simulations in switching applications, the emission of electrons is also modeled in Verilog-A using an asymptotic solution of a differential equation, which can be a better alternative to that of the $RC$ subcircuit approach.

Vertically ordered hexagonal boron nitride (h-BN) films were successfully sputtered on AlGaN/GaN heterostructure (HS) using High Power Impulse Magnetron Sputtering at room temperature. The h-BNs vertical ordering along the (0002) plane was confirmed using high-resolution transmission electron microscopy. After the h-BN deposition, degradation of two-dimensional electron gas (2DEG) properties was observed in AlGaN/GaN HS. Full recovery of 2DEG mobility, along with an improvement in sheet resistance and an increase in sheet carrier concentration was obtained after rapid thermal annealing at 500°C for 300s in a N2 atmosphere, which is due to the reduction of sputtering related structural damage.

Thermally tunable Fano and electromagnetically induced transparency (EIT) resonances are theoretically and experimentally demonstrated based on a Mach-Zehnder interferometer assisted Bragg grating-microring coupled resonant system on silicon-on-insulator (SOI) platform. In this paper, the destructive and constructive coupling between the two resonators, the microring resonator and the Fabry-Perot resonator formed by two Bragg gratings, give rise to the Fano and EIT resonances, respectively. The resonance lineshape can be controlled and converted by tuning the optical path length of the MZI arm. The device performance has been theoretically analyzed by using a specially developed numerical model. The coupled resonant system was designed, fabricated, and characterized on a commercial (SOI) platform. The tuning and conversion of the resonance lineshape by thermo-optical effect have been experimentally observed and verified, with good agreement between the experimental data and the simulations. NRF (Natl Research Foundation, S’pore) ASTAR (Agency for Sci., Tech. and Research, S’pore) Published version

GaN-on-Silicon growth by MOCVD is wildly discussed in the context of stress and strain management. The low bow AlGaN/GaN structure grew on 200mm Si(111) wafer was demonstrated in this study. After using the sapphire pits on the normal flat susceptor, the wafer bow and residual stress decrease to 21.27um and 0.28GPa tensile stress. The GaN quality and the Rs in HEMT also got huge improvement. The sub-micron devices also show the comparable results in DC and small signal characteristics.

Passive mode locking with a fundamental repetition rate at ∼18.46 GHz is demonstrated in a two-section InGaSb/AlGaAsSb quantum well laser emitting at 2 μm. Modal gain characteristics of the laser are investigated by performing the Hakki-Paoli method to gain better insight into the impact of the absorber bias voltage (Va) on the light output. The lasing action moves to longer wavelengths markedly with increasing negative Va. The light output contains more longitudinal modes in the mode locking regime if the gain bandwidth is larger at a certain Va. Our findings provide guidelines for output characteristics of the mode-locked laser. NRF (Natl Research Foundation, S’pore) Published version

We have studied the drain current dispersion characteristics of conventional AlGaN/GaN HEMTs and SiN/Al2O3/AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MISHEMT) fabricated on silicon substrate. The fabricated MISHEMT exhibited an IDmaxof >1000 mA/mm and gmmax of 241 mS/mm. Compared to conventional AlGaN/GaN HEMTs, about an order of magnitude lower gate leakage current and a ∼ 60% reduction in drain current (ID) collapse was observed in the MISHEMTs. The observation of low ID collapse is due to the occurrence of low interface state density (6.39 × 1010 eV-1 cm-2) between the bilayer dielectric (SiN/Al2O3) and GaN surface which is confirmed through the AC-conductance method. (© 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

In this paper, a comprehensive study on the effect of plasma-enhanced chemical-vapor-deposited SiN surface passivation on the bias-dependent small-signal equivalent-circuit elements is carried out for AlGaN/GaN high-electron mobility transistors on a high-resistivity silicon substrate. The direct-current and small-signal performance of the device was found to be improved by surface passivation. The small-signal equivalent-circuit parameters at various gate and drain biases were extracted, and the physical mechanisms of their bias-dependent behaviors before and after passivation are discussed in detail.

Studies on the influence of quiescent-gate (Vgs0) and quiescent-drain (Vds0) bias stresses in rf-plasma MBE grown AlGaN/GaN high-electron-mobility transistors (HEMTs) were performed. The increase of drain current (ID) collapse by quiescent-bias-stress in AlGaN/GaN HEMTs were observed using pulsed (pulse width = 200 ns; pulse period = 1 ms) IDS–VDS characteristics. The Si3N4 passivation suppressed about 80% ID collapse in quiescent-bias-point stressed HEMTs. The remaining 20% ID collapse were not suppressed which may be coming from buffer-related traps. However, more than 10% of ID collapse suppression was observed on un-stressed or fresh-HEMTs. Similarly, improved cut-off frequency (fT), maximum oscillation frequency (fmax) and device output power (Pout) values were also observed on the un-stressed HEMTs. The Si3N4 passivation completely suppressed the ID collapse in un-stressed or fresh-HEMTs which leads to 70% improvement in fT and 60% improvement in the device Pout. The Si3N4 passivation did not completely suppress ID collapse in the quiescent-bias stressed-HEMTs. This may be due to the generation of additional surface-related traps in the HEMTs by quiescent-bias-stresses.

In this brief, we present a detailed study on the temperature dependence of the microwave noise characteristics in AlGaN/GaN high-electron mobility transistors on high-resistivity silicon substrate. The temperature-dependent microwave noise parameters of AlGaN/GaN HEMT on Si were measured over a wide temperature range of -50°C-200°C. The physical mechanisms of the temperature behavior for the overall noise figure (NFmin) and internal noise sources coefficients (P, R, and C) were analyzed and discussed in detail.

Enhanced OFF -state breakdown voltage has been observed in ammonium sulfide [(NH4)2Sx]-treated AlGaN/GaN high electron mobility transistors (HEMTs) on Si substrate without compromising the unit gain cutoff frequencies. About six times higher OFF -state breakdown voltage (BVgd) and three orders of magnitude higher ION/IOFF ratio were observed in the (NH4)2Sx-treated 0.3- μm T-gate conventional AlGaN/GaN HEMTs on Si substrate. In addition, three orders of magnitude lower surface leakage current (~3.0 μA/mm to ~3 nA/mm) have also been observed on the (NH4)2Sx-treated devices. The calculated Johnson's figures of merit (J-FOM = BVgd × fT) is 5.41 × 1012 V/s, which is the highest value reported so far for 0.3- μm T-gate conventional SiN passivated AlGaN/GaN HEMTs without the incorporation of field plate. No significant drain current collapse was observed on the (NH4)2Sx-treated devices.

A stress engineered nano-channel (NC) In 0.17 Al 0.83 N/GaN T-gate Fin-High-Electron-Mobility Transistor (Fin-HEMT) exhibited a very high I Dmax of >3900 mA/mm, a highest g m of >1410 mS/mm and V th of −3.31 V at V D = 6V with good pinch-off characteristics. This dramatic increase of I D , g m and extracted electron velocity (ν e ) of 6.0×107 cm/s in the In 0.17 Al 0.83 N/GaN NC Fin-HEMT is due to the tensile stress by T-shape gate and SiN passivation. The Fin-HEMTs were also exhibited impressive device performance (g m =646 mS/mm, I on =1.03 A/mm, I OFF =1.13 µA/mm, I ON /I OFF ∼106, SS=82 mV/dec) even at V D of 0.5 V.

The gate leakage current mechanism of AlGaN/GaN Schottky barrier diodes (SBDs) and high-electron-mobility transistors (HEMTs) with sputtered TiN is systematically investigated. The reverse leakage current (JR) of TiN SBDs increases exponentially with the increase of reverse voltage (VR) from 0 to −3.2 V (Reg. I). This conduction behavior is dominated by Poole-Frenkel emission from TiN through an interface state of 0.53 eV to the conductive dislocation-related continuum states. The obtained interface state of 0.53 eV may be due to the plasma damage to the surface of the AlGaN/GaN HEMT structure during the TiN sputtering. When the TiN SBDs are biased with −20

Temperature-dependent microwave noise characteristics are presented in an atomic-layer-deposited /AlGaN/GaN metal-insulator-semiconductor high-electron mobility transistor (HEMT) (MISHEMT) on a Si substrate over a wide temperature range from -40 to 200 C. Typical noise parameters, including minimum noise figure , noise equivalent resistance , and associate gain , are measured over the whole temperature range. The conventional Schottky-gate HEMT with the same epistructure is also compared. The temperature dependences of and for the MISHEMT are found to be similar to those for the conventional HEMT, respectively, whereas less temperature dependence of is found in the GaN MISHEMT. The degradation rate of the noise performance of MISHEMT is found to be comparable to that of the other reported GaN HEMTs on SiC and sapphire substrates and also comparable to that of GaAs HEMTs.

For the first time, microwave noise and power performance of metamorphic InP heterojunction bipolar transistors (MM-HBTs) grown on GaAs substrates are reported. We find that microwave performance of MM-HBTs is comparable to that of lattice-matched InP heterojunction bipolar transistors of identical design. The preliminary results imply that the superior performance of InP heterojunction bipolar transistors can be confidently exploited with the more mature manufacturing technology of GaAs.

High-performance InP/In/sub 0.53/Ga/sub 0.47/As metamorphic heterojunction bipolar transistors (MHBTs) on GaAs substrate have been fabricated using In/sub x/Ga/sub 1-x/P strain relief buffer layer grown by solid-source molecular beam epitaxy (SSMBE). The MHBTs exhibited a dc current gain over 100, a unity current gain cutoff frequency (f/sub T/) of 48 GHz and a maximum oscillation frequency (f/sub MAX/) of 42 GHz with low junction leakage current and high breakdown voltages. It has also been shown that the MHBTs have achieved a minimum noise figure of 2 dB at 2 GHz (devices with 5/spl times/5 /spl mu/m/sup 2/ emitter) and a maximum output power of 18 dBm at 2.5 GHz (devices with 5/spl times/20 /spl mu/m/sup 2/ emitter), which are comparable to the values reported on the lattice-matched HBTs (LHBTs). The dc and microwave characteristics show the great potential of the InP/InGaAs MHBTs on GaAs substrate for high-frequency and high-speed applications.

In this paper, we report on the degradation of DC performance of InP/InGaAs/InP double heterojunction bipolar transistors (DHBTs) during electrical stress. Devices with different sizes were investigated under highly reverse base-collector (B-C) bias stress. The increase of B-C and emitter-base (E-B) junction leakage and decrease of current gain were observed. The increase of the junction leakage for both B-C and E-B junctions was found to scale with the junction perimeters which suggests that the stress-induced damages are localized at the junction peripheries. For the devices with larger emitter periphery-to-area ratio, a more pronounced decrease of current gain due to the stress was observed. The obtained experimental data indicate that the stress-induced degradation happens in high reverse B-C bias voltage (avalanche) regime. The degradation is believed to be induced by hot carriers rather than current. A physical model is proposed to explain the experimental observations.

The electrical properties of InP/InGaAs HBTs have been comprehensively investigated between room and near liquid helium temperature. Physical mechanisms for the devices operated in different temperature ranges have been clearly identified. The low temperature measurements indicate that, in the temperature range of 240 K to 300 K, the base current is dominated by electron-hole band-to-band recombination; in the temperature range 77 K to 240 K, trap-related recombination (Shockley-Read-Hall recombination) plays an important role in determining base current; and for temperature lower than 77 K, the collector and base currents are found to be limited by electron tunneling through the barrier formed by the conduction-band discontinuity at the E-B junction. These findings provide us with better physical insight of the device operation at low temperature, which is particularly important for the optimization of InP HBT technology for low temperature applications as well as the development of a quantitative model for circuit design.

Off-state and vertical breakdown characteristics of AlGaN/AlN/GaN high-electron-mobility transistors (HEMTs) on high-resistivity (HR)-Si substrate were investigated and analysed. Three-terminal off-state breakdown (BVgd) was measured as a function of gate–drain spacing (Lgd). The saturation of BVgd with Lgd is because of increased gate leakage current. HEMTs with Lgd = 6 µm exhibited a specific on-resistance RDS[ON] of 0.45 mΩ cm2. The figure of merit (FOM = BVgd2/RDS[ON]) is as high as 2.0 × 108 V2 Ω–1 cm–2, the highest among the reported values for GaN HEMTs on Si substrate. A vertical breakdown of ∼1000 V was observed on 1.2 µm thick buffer GaN/AlN grown on Si substrate. The occurrence of high breakdown voltage is due to the high quality of GaN/AlN buffer layers on Si substrate with reduced threading dislocations which has been confirmed by transmission electron microscopy (TEM). This indicates that the AlGaN/AlN/GaN HEMT with 1.2 µm thick GaN/AlN buffer on Si substrate is promising candidate for high-power and high-speed switching device applications. (© 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

High microwave-noise performance is realized in AlGaN/GaN metal-insulator semiconductor high-electron mobility transistors (MISHEMTs) on high-resistivity silicon substrate using atomic-layer-deposited (ALD) Al2O3 as gate insulator. The ALD Al2O3/AlGaN/GaN MISHEMT with a 0.25- ?m gate length shows excellent microwave small signal and noise performance. A high current-gain cutoff frequency fT of 40 GHz and maximum oscillation frequency f max of 76 GHz were achieved. At 10 GHz, the device exhibits low minimum-noise figure (NFmin) of 1.0 dB together with high associate gain (Ga) of 10.5 dB and low equivalent noise resistance (Rn) of 29.2 ?. This is believed to be the first report of a 0.25-?m gate-length GaN MISHEMT on silicon with such microwave-noise performance. These results indicate that the AlGaN/GaN MISHEMT with ALD Al2O3 gate insulator on high-resistivity Si substrate is suitable for microwave low-noise applications.

We present the first comprehensive experimental investigation of base current transient in InP/InGaAs heterojunction bipolar transistors (HBTs) induced by polyimide passivation, and its influence on the device characteristics. We have confirmed that the trapping and detrapping of static charge in the polyimide at the polyimide/semiconductor interface is the root cause for the current transient effect. Experimental and theoretical evidence indicates that the base current transient is caused by the change of the base-emitter junction surface potential as a result of the decrease in the number of trapped electrons in the polyimide film. A physical model accounting for the time-dependence of surface recombination current induced by electron detrapping in the polyimide is derived and predicts the current transient behavior. The physical understanding is helpful for further optimization of polyimide passivation process for HBTs.

Electrical and structural properties of strontium titanate (SrTiO3) thin films deposited on Si and GaAs substrates by a conventional radio frequency-magnetron sputtering technique at different oxygen (O2) partial pressures and substrate temperatures have been reported. Dielectric constant of the as-deposited samples increases with the substrate temperature as well as the O2 partial pressure. However, it shows a decreasing trend at higher O2 partial pressure values. When the samples were annealed for 1 h at temperatures above 500 °C the dielectric constant value of the SrTiO3 (STO) films increased by five times and a maximum value of 147 was obtained. The increase in the dielectric constant value is reflected in x-ray diffraction measurements with the development of high intensity lines corresponding to STO phase. The thickness dependence of the dielectric constant is also reported. Thin film STO capacitors fabricated with Pt as top and bottom electrodes showed low leakage current densities and a high brea...

The experimental and theoretical studies of electron multiplication in InP/InGaAs double heterojunction bipolar transistors (DHBT's) with an InGaAs/InP composite collector are carried out. Both local electric field model and energy model are used to investigate the electron impact ionization in the composite collector. The analysis reveals that the nonlocal effect of the electron impact ionization in the composite collector is responsible for the suppression of the contribution of electron multiplication in the InGaAs layer. Experimental results for the fabricated devices were compared with the theoretical calculations, indicating that the conventional impact ionization models based on the local electric field significantly overestimate the electron multiplication for the composite collector. The energy model which takes into account the nonlocal effect is found to provide a more accurate prediction of electron multiplication for the DHBT's.

The energy band gap narrowing (BGN) as a function of doping concentration in Be-doped Al 0.33 Ga 0.67 As is investigated using photoluminescence (PL) measurements on samples grown by molecular beam epitaxy (MBE). An expression for theoretically predicting the band gap narrowing has been deduced for p-type doping in Al x Ga 1−x As (0≤x≤0.45). The experimental results obtained from the PL spectra are in good agreement with this expression. A simple empirical relation for the PL peak energy of Be-doped Al 0.33 Ga 0.67 As as a function of carrier concentration is also presented. This provides a convenient way of determining the carrier concentration in Be-doped Al 0.33 Ga 0.67 As samples nondestructively.

The effect of SiN surface passivation on high-frequency channel noise in AlGaN/GaN high-electron-mobility transistors on a high-resistivity Si substrate is investigated. It was observed that the channel noise increased after SiN surface passivation by plasma-enhanced chemical vapor deposition. The mean square of the channel noise voltage increased about three times at a bias of Vd = 12V and Id = 120 A/mm. Based on the analysis on the noise source components in the channel region, it is believed that the channel noise increase is mainly due to the modification of the lateral electrical field profile by surface passivation. The modification of the lateral electrical field profile after passivation is verified by the 2-D numerical simulation and the observation that the gate leakage increases and the breakdown voltage decreases. The measured correlation coefficient between the channel noise and the gate noise agrees with the proposed mechanism of the electrical field profile modification by surface passivation.

Effects of silicon nitride (SiN) surface passivation by plasma enhanced chemical vapor deposition (PECVD) on microwave noise characteristics of AlGaN/GaN HEMTs on high-resistivity silicon (HR-Si) substrate have been investigated. About 25% improvement in the minimum noise figure (NF min) (0.52 dB, from 2.03 dB to 1.51 dB) and 10% in the associate gain (G a) (1.0 dB, from 10.3 dB to 11.3 dB) were observed after passivation. The equivalent circuit parameters and noise source parameters (including channel noise coefficient (P), gate noise coefficient (R), and their correlation coefficient (C)) were extracted. P, R and C all increased after passivation and the increase of C contributes to the decrease of the noise figure. It was found that the improved microwave small signal and noise performance is mainly due to the increase of the intrinsic transconductance (g m0) and the decrease of the extrinsic source resistance (R s).

AlGaAs/GaAs single heterojunction bipolar transistor (HBT) structures with Be- and C-doped bases have been annealed at different temperatures using rapid thermal processing (RTP). Both electrical and low-temperature photoluminescence measurements were used to investigate their thermal stability. We found that the conventional AlGaAs/GaAs abrupt HBT structures could undergo significant degradation at temperatures commonly encountered in typical RTP for device fabrication. The decrease of current gain was observed in both molecular beam epitaxy-grown HBTs with a Be-doped base and metalorganic chemical vapor deposition-grown HBTs with a C-doped base after RTP at temperatures greater than 600 °C. Our studies show that high-temperature RTP could induce undesirable degradation in AlGaAs/GaAs HBTs. Different degradation mechanisms, which are similar to those for the degradation of the Be- and C-doped base HBTs under current-induced stress, are responsible for the degradation of the Be- and C-doped HBTs subjected...

In this work, low-temperature photoluminescence (PL) is used for the investigation of beryllium (Be) dopant outdiffusion in AlGaAs/GaAs single-heterojunction bipolar transistors (HBTs). Near the typical emission peak at ∼1.92 eV which is due to the band-to-band transition from AlGaAs emitter, an additional emission peak is found in the PL spectrum. This peak is found to be caused by the Be-related transition from AlGaAs emitter due to the Be outdiffusion from the GaAs base to the AlGaAs emitter. The concentration of Be outdiffused into the emitter can be estimated from the energy separation between these two emission peaks in AlGaAs range based on the band gap narrowing effect. The measured dc current gain and the emitter-base turn-on voltage of the HBTs fabricated on different wafers with different growth conditions were found to correlate well with the PL results. Our results demonstrate that low temperature PL technique is an efficient method in identifying Be outdiffusion in HBTs and is useful in HBT growth and device structure optimization.

Silicon (Si)-doped InP layers were grown by solid-source molecular beam epitaxy and characterized by Hall and low-temperature photoluminescence (PL) measurements. During the growth the Si effusion cell temperature was varied from 900 to 1200°C, and the electron concentration measured was between 3.5×10 16 cm −3 and 1.1×10 20 cm −3 at room temperature. The corresponding Hall mobility varied from 3670 to 442 cm 2 /V s and 10 400 to 475 cm 2 /V s at 300 and 77 K, respectively for different Si cell temperatures. The mobility values were found to be higher compared to n-type InP layers grown by other techniques. 5 K PL spectra showed two peaks for the undoped and low-doped InP layers corresponding to the neutral donor-bound exciton transitions (D 0 –X) and the acceptor-related transitions (D–A), respectively. When the Si doping level was increased, the high-energy near-band recombination underwent a typical evolution exhibiting a broadened asymmetric peak, and the peak shifted to high energy that was attributed to the band filling effect. This peak shift compared well with the theoretical prediction based on the Burstein–Moss shift and the band gap narrowing effect.

Electrical and optical properties of beryllium (Be) doped Al 0.33 Ga 0.67 As layers grown by molecular beam epitaxy have been investigated. Doping levels of up to 1.3×10 19 cm −3 have been obtained with smooth surface by increasing the Be cell temperature during growth. A further increase in Be cell temperature resulted in a rough surface with a hole concentration of 2.4×10 19 cm −3 . Hall mobility and concentration data measured are found to fit the Hilsum expression well. 10 K photoluminescence measurements show two peaks for lower doping levels in AlGaAs. When the Be doping concentration is increased, the two peaks begin to merge together, and the peak positions shift towards the low energy side. A simple empirical relation for the PL peak energy of Be-doped Al 0.33 Ga 0.67 As as a function of carrier concentration is presented. This provides a convenient way of determining the carrier concentration in Be-doped Al 033 Ga 0.67 As layers nondestructively.

We show that a vacancy-controlled model can explain the experimentally observed negative dependence on the stress temperature of GaAs/AlGaAs heterojunction bipolar transistors' degradation by non-radiative defects. The driving force (osmotic force) of the degradation versus the bias stress temperature is calculated and a decreasing temperature dependence is found. This model, which has previously been applied to strained-layer lasers and light emitting diodes, will help us understand the reported experimental observations on the temperature-acceleration tests for the GaAs/AlGaAs-based heterostructure devices such as heterojunction bipolar transistors.

This paper reports the effects of beryllium (Be) doping in In 1− x − y Ga x Al y As layers grown lattice-matched to InP(1 0 0) substrates by molecular beam epitaxy. Hall effect measurements showed that hole concentrations as high as 2.94×10 19 cm −3 were achieved, and the concentration decreased with further increase in the Be cell temperature. Depending on the hole concentration, good optical quality was achieved as verified by photoluminescence (PL) measurements. X-ray diffraction measurements showed lattice mismatch values of lower than 8.6×10 −4 in most samples. An intense PL peak (5 K) at 1.089 eV which is attributed to band-acceptor recombination was observed from the sample with the lowest hole concentration of 2.28×10 16 cm −3 . This sample showed the lowest PL full-width at half-maximum of 8 meV (at 5 K) for the free exciton recombination. To the best of our knowledge, this is the lowest value reported to date. An increase in the hole concentration caused a merging of the band-acceptor and free exciton recombination lines to form a broad PL spectrum. A shift in the free exciton peak position in the PL spectrum was observed following an increase in the hole concentration, an effect which was probably due to degeneracy.

We report the molecular beam epitaxial (MBE) growth of high quality epitaxial indium phosphide (InP) using a valved phosphorus cracker cell over a wide range of V/III flux ratio (1.2–9.3) and substrate temperature (360°C to 500°C). The as-grown epitaxial InP on InP (100) substrate was n-type, with a background electron concentration and mobility which varied according to the V/III flux ratio and substrate temperature ( T s ). Using a cracking zone temperature ( T cr ) of 850°C, the highest electron mobility at 77 K of 40 900 cm 2 /Vs was achieved at a V/III flux ratio of 2.3 at a substrate temperature of 440°C. The corresponding background electron concentration at 77 K was the lowest at 1.74×10 15 cm −3 . The photoluminescence (PL) full-width at half maximum (FWHM) decreased significantly in samples grown at lower flux ratios indicating an improvement in the optical quality.

Room temperature photoluminescence in δ-doped pseudomorphic AlGaAs/InGaAs/GaAs quantum wells is investigated. The electron and hole subband structure and optical transition matrix elements are calculated by a self-consistent theoretical method. Separations of the calculated conduction subband levels and valence subband levels reveal that the dominant emissions are due to the transitions from the second electron subband to the first heavy-hole subband, the first electron subband to the first heavy-hole subband, and the first electron subband to the second heavy-hole subband. The calculation also predicts that the transition energies shift to lower energies with the increase of the δ-doping level. This is accounted for by the lowering of the confined levels originating from electrostatically induced band bending. The calculated transition matrix elements demonstrate that transitions with different electron and hole subband indices, i.e., forbidden pairs, are preferred. The relative magnitudes of the squared optical matrix elements for the transitions from the first and second electron subbands to the first heavy-hole subband are analyzed as functions of separations of the first two electron subbands and the first two heavy-hole subbands, respectively. The results show that the 2-1 pair has a larger oscillator strength than the 1-1 and 1-2 pairs in agreement with observations.

Conventional Schottky-metal gate based GaN HEMTs (SB-HEMTs) suffer undesirable high gate leakage current (Igleak) issue. To reduce the Igleak, varieties of gate insulators like Si3N4, SiO2, Al2O3, Ga2O3, HfO2, Sc2O3 etc. have been demonstrated to obtain high quality metal-insulator-semiconductor (MIS) structure. ZrO2, with a high dielectric constant (18-25 [1]) and large bandgap (5.2-7.8 eV [2]), is a good candidate for gate insulation layer. Compared with ZrO2 prepared by other techniques, atomic layer deposited (ALD) technique has the benefits of nanometer scalability, high uniformity, good coverage, low defect density, etc. S. Abermann et al. [3] and A. Alexewicz et al. [4] have reported InAlN/GaN MISHEMTs using ALD ZrO2. However to-date, comprehensive study was not carried out in AlGaN/GaN MISHEMTs on Si with ALD ZrO2 as insulator layer. In this paper, we demonstrated AlGaN/GaN MISHEMTs with ALD ZrO2 as the gate dielectric layer on Si substrate. The use of ALD ZrO2 dielectrics can effectively suppress the reverse gate leakage current and improve gate voltage up to +5 V.

Novel thermopile based on modulation doped AlGaAs/InGaAs heterostructures is proposed and developed for uncooled infrared FPA (Focal Plane Array) image sensor application. The high sensitivity performance is designed to be the responsivity R of 33,000 V/W with the response time IJ of 8 ms, and the high speed performance is designed to be R of 4,900 V/W with IJ of 110 μs, under the 2 μm design rule. Based on integrated HEMT-MEMS technology, the 32×32 matrix FPA is fabricated to demonstrate its enhanced performances by black body measurement. The technology presented here demonstrates the potential of this approach for low-cost uncooled infrared FPA application.

We have demonstrated 0.15-µm-gate-length AlGaN/GaN high-electron-mobility transistors (HEMTs) with direct-current (DC) and microwave performances for the first time using a complementary metal–oxide–semiconductor (CMOS)-compatible non-gold metal stack. Si/Ta-based ohmic contact exhibited low contact resistance (Rc=0.24 Ω.mm) with smooth surface morphology. The fabricated GaN HEMTs exhibited gmmax=250 mS/mm, fT/fmax=39/39 GHz, B Vgd=90 V, and drain current collapse

Low-contact-resistance (Rc) non-gold Ta/Si/Ti/Al/Ni/Ta ohmic contacts were realized on an undoped AlGaN/GaN high-electron-mobility transistor (HEMT) grown on a silicon substrate. Optimization of the rapid thermal process reveals that Rc decreases drastically from the annealing temperature of 700 to 850 °C and slightly increases from 875 to 900 °C. The sample annealed at 850 °C exhibited the lowest Rc of 0.22±0.03 Ω·mm [specific contact resistivity, ρc=(0.78±0.22)×10-6 Ω·cm2] with a smooth surface morphology (RMS roughness ~5.5 nm). The low Rc is due to the formation of TixSiy and the intermixing of TixSiy with the bottom Ta layer at the metal/semiconductor interface.

This work presents our recent progress on addressing two major challenges to realizing GaN-Silicon integration namely epitaxial growth of GaN-on-Silicon and CMOS-compatible process. We have successfully demonstrated 0.3-μm gate-length GaN HEMTs on 8-inch Si(lll) substrate with f T of 28GHz and f max of of 64GHz. These device performances are comparable to our reported devices fabricated on 4-inch Si substrate. We have also developed a GaN HEMT process with CMOS-compatible non-gold metal scheme. Excellent ohmic contacts (R c =0.24 Ω-mm) with smooth surface morphology have been achieved which are comparable to those using conventional III-V gold-based ohmic contacts. 0.15-μπι gate-length GaN HEMTs fabricated with this process achieved f T and f max of 51 GHz and 50GHz respectively. The 5nm-thick AlGaN barrier HEMT exhibited three terminal OFF-state breakdown voltage (BV gd ) of 83 V. Our results demonstrate the feasibility of realizing CMOS-compatible high performance GaN HEMTs on 8-inch silicon substrates for future GaN-on-Si integration.

We describe the research results produced from our focus on integrating GaN HEMTs and LEDs into silicon CMOS integrated circuits. Although current component markets are driving most GaN HEMT development, we have undertaken an innovation path in which the value of an integrated GaN device in a silicon design environment is the driver for materials and device development. Specifically, our integrated process flow involving foundry production of front and back end standard CMOS processes demands certain GaN epitaxial and material constraints that are different than constraints on non-integrated devices. We report on 200 mm GaN-on-Si 725 um thick engineered substrates formed through a combination of MOCVD and wafer bonding processes. Our optimized 200 mm GaN-on-Si (111) epitaxial wafers have bow values < 30 um, with total III-N film thicknesses of 2.7 um including a 1.5 um capping GaN layer. XRD FWHM values of 400 and 380 arcsec for (002) and (102) reflections indicate TDD of approximately 4e8 cm-2. CMOS-compatible GaN HEMTs demonstrated on these wafers have achieved 2DEG mobilities of ~1200 cm2/Vs and sheet carrier densities of 1-2e13 cm-2, with Id, max values of 700 mA/mm and 25 GHz fT, fmax for Lg = 0.25 um. High quality InGaN/GaN MQW LEDs emitting at 450 nm with total III-N stack thickness of 3.7 um have also been demonstrated. Central emission wavelength standard deviation of < 2 nm was achieved across the entire 200 mm, wafer, and typical devices exhibited turn-on at ~2.5 V with diode ideality factor of 2.8. We have developed wafer engineering techniques such as edge encapsulation and substrate replacement to address wafer fragility issues typically associated with GaN on SEMI-spec 725 um Si wafers. This also leads new wafer/device platforms such as GaN-OI and CMOS + GaN that will open new avenues in device performance and integration of III-N with Si CMOS.

The AlGaN/GaN-based high-electron-mobility transistors (HEMTs) are suitable for discrete components in many high power and high frequency power electronics applications useful for communications, satellites, power amplifiers, inverters/converters for electric and/or hybrid vehicles. Presently, these devices are commonly grown on sapphire, silicon carbide, and recently on 100- to 200-mm diameter silicon substrates. For a large scale deployment of low cost GaN-based power electronic devices, silicon substrate offers tremendous opportunities due to mature back-end Si process technologies. However, GaN epilayers on large area Si substrates results in severe wafer bowing and cracking due to high thermal mismatch between nitride layer and the substrate. As an alternative to Si substrate, silicon-on-insulator (SOI) substrate has been used for the demonstration of GaN-based light emitting diodes (LEDs)[1]. To the best of our knowledge, the demonstration of AlGaN/GaN transistors on a thin SOI substrate is rather limited. In this study, we report on the growth and characteristics of AlGaN/GaN heterostructures (HSs) on 150-mm diameter Si(111) and SOI(111) substrates. In addition, fabrication of HEMTs and device characteristics will be discussed on the SOI platfrom.