1. New Submicron Low Gate Leakage In0.52Al0.48As-In0.7Ga0.3As pHEMT for Low-Noise Applications
- Author
-
Mohamad Faiz Mohamed Omar, Muhammad Firdaus Akbar Jalaludin Khan, Mohd Syamsul Nasyriq Samsol Baharin, Mohd Hendra Hairi, Nor Azlin Ghazali, Mohamed Fauzi Packeer Mohamed, and Shaili Falina
- Subjects
Materials science ,InGaAs ,MBE ,semiconductor device ,III-V material ,Integrated circuit ,High-electron-mobility transistor ,Article ,law.invention ,pHEMT ,law ,2DEG ,InAlAs ,InP ,LNA ,low temperature (LT) ,MMIC ,TJ1-1570 ,Breakdown voltage ,Mechanical engineering and machinery ,Electrical and Electronic Engineering ,Monolithic microwave integrated circuit ,Leakage (electronics) ,business.industry ,Mechanical Engineering ,Saturation velocity ,Semiconductor device ,Impact ionization ,Control and Systems Engineering ,Optoelectronics ,business - Abstract
Conventional pseudomorphic high electron mobility transistor (pHEMTs) with lattice-matched InGaAs/InAlAs/InP structures exhibit high mobility and saturation velocity and are hence attractive for the fabrication of three-terminal low-noise and high-frequency devices, which operate at room temperature. The major drawbacks of conventional pHEMT devices are the very low breakdown voltage (xGa(1−x)As (x = 0.53 or 0.7) channel material plus the contribution of other parts of the epitaxial structure. The capability to achieve higher frequency operation is also hindered in conventional InGaAs/InAlAs/InP pHEMTs, due to the standard 1 μm flat gate length technology used. A key challenge in solving these issues is the optimization of the InGaAs/InAlAs epilayer structure through band gap engineering. A related challenge is the fabrication of submicron gate length devices using I-line optical lithography, which is more cost-effective, compared to the use of e-Beam lithography. The main goal for this research involves a radical departure from the conventional InGaAs/InAlAs/InP pHEMT structures by designing new and advanced epilayer structures, which significantly improves the performance of conventional low-noise pHEMT devices and at the same time preserves the radio frequency (RF) characteristics. The optimization of the submicron T-gate length process is performed by introducing a new technique to further scale down the bottom gate opening. The outstanding achievements of the new design approach are 90% less gate current leakage and 70% improvement in breakdown voltage, compared with the conventional design. Furthermore, the submicron T-gate length process also shows an increase of about 58% and 33% in fT and fmax, respectively, compared to the conventional 1 μm gate length process. Consequently, the remarkable performance of this new design structure, together with a submicron gate length facilitatesthe implementation of excellent low-noise applications.
- Published
- 2021