Search

An oxide-charged and interface-trap lateral profiling charge pumping technique (iLPCP) is proposed, and erase-induced oxide charge and interface traps are investigated in Flash EPROM devices. It is shown that the new method permits extraction of profiles in circumstances where the previous method does not yield satisfactory results.

The fabrication of high performance p-type modulation-doped field-effect transistors and metal-oxide semiconductor MODFET on high hole mobility SiGe/Si heterojunction, is described.

A new study uses a jet vapor deposition O/N/O stack gate dielectric to produce SiC MIS capacitors that are problem-free, even when operating at high temperatures.

The electrical properties of ultrathin nitride/oxide (N/O) stack dielectrics (2-4 nm), fabricated by in-situ jet vapor deposition, are investigated. Experimental results and theoretical calculation reveal that the leakage current in the N/O stack is significantly lower than that in the single oxide layer with similar oxide thickness. In the 3-nm thickness range, the N/O stack produces a lower leakage current as compared to the single nitride layer. In the 2-nm thickness range, the leakage currents in the N/O stack and the single nitride layer have no significant differences.

The lateral profiles of interface traps and oxide charge or localized hot-carrier damage in scaled thin-gate MOS field effect transistors are measured using a proposed, simple charge pumping method. Experimentation indicates that the method can be used to study the lateral distributions of erase-induced damage in Flash electrically erasable programmable read only memory devices including oxide charge and interface traps. Results are evaluated.

Theoretical and experimental studies reveal that scaling down of device dimensions leads to a significant increase in the random telegraph signal (RTS) amplitude and 1/f noise in metal oxide semiconductor field effect transistors. The rate of increase is much higher than the scaling factor. Generation of RTSs and 1/f noise due to fast interface states is higher than that by oxide traps. Nonuniform distribution of threshold voltages along the channel exerts a strong influence on the noise power density of the device. The increase in current fluctuations is higher for devices operating in weak inversion.

Laterally nonuniform distributions of radiation-induced oxide charge and interface traps near MOSFET junctions have been found in a variety of samples, and such nonuniformities could significantly affect the transistor's transconductance, channel resistance, and effective channel length. The degree of nonuniformity depends strongly on the process technology, as revealed by three independent measurement techniques. Device simulation results have confirmed the impact of such edge effects on transistor parameters.

A charge-pumping-based approach for characterizing the embedded oxide charges andthe spatial distribution of the interface traps bordering the source/drain junctions is reported. Simple to execute, the method facilitates independent measurement of the interface trap and oxide charge constituents. A few examplesare given to demonstrate its utility along with the experimental results and a comparison with other comparable techniques.