Distribution and migration of oxygen in the highk/metal gate stack has a strong impact on the CMOS transistor electrical characteristics. Excess O can cause interlayer (IL) growth and subsequent increase of Equivalent Oxide Thickness (EOT), whereas O-vacancies induced by the metal gate contact may lead to unpredictable and feature size dependent shifts in threshold voltage (Vt). In addition to these phenomena, we have recently described a new migration pathway for O in poly-Si/TiN/TiO2-based high-k/stacks [1]. Besides re-growth of the bottom IL, excess O –released by the thermal decomposition of TiO2-based high-k stacks upon annealing– was observed to diffuse upwards, resulting in SiO2 growth at the TiN/poly-Si interface, as evidenced by regular SIMS analysis following the O main isotope. Here, we have employed SIMS depth profiling in combination with isotopic labeling –using minority Oisotope– to characterize the migration and/or redistribution of O in the high-k metal gate stack (HK/MG) at different stages of processing. Firstly, the creation of vacancy defects in high-k dielectrics –induced by the TiN-based metal gate contact upon high temperature annealing– is the most probable cause for large (~500 meV) Vt shifts, which is especially problematic for pFET devices. We have demonstrated that these shifts can be largely recovered after a lowtemperature low-pressure top-down oxygenation step on TiN metal gate exposed by poly-Si removal, while preventing excessive oxidation of TiN and parasitic IL regrowth [2]. Using SIMS, we have systematically investigated the incorporation of O by SIMS for different temperatures and TiN thicknesses on TiN-gated high-k films, subjected to top-down oxygenation with isotopic labeled O2, see Figure 1. We have thus established that incorporated O-doses –needed to remove the defects created in a metal-HfO2 contact– amount 1.4e14 to 3.9e14 at.cm. In addition, O-profiles after top-down oxidation show a small but significant shift with respect to pre-existing O towards the TiN-interface (see inset Figure 1). This implies that passivation of vacancies preferentially occurs in the top portion of the high-k layer, consistent with negligibly small oxide (IL) re-growth. Secondly, remote O-scavenging from the SiO2 interlayer (IL) using a poly-Si/doped TiN metal gate stack is a promising technique to achieve aggressive EOT scaling in a gate-first flow, compliant with 16 nm technology node requirements [3]. The remote scavenging mechanism is based on the presence of a metallic element M, inserted in the TiN metal gate at a certain separation from the high-k interface. This scavenging element is capable of scavenging O from the SiO2 IL upon poly activation anneal, as evidenced by TEM and conventional O-SIMS. Here, we have employed SIMS to determine the kinetics of O-scavenging from Hf-based high-k dielectric –enriched in O by isotopic exchange after high-k deposition upon low-temperature O2 exposure– towards M-TiN alloy for different annealing temperatures and IL’s. Use of an O-isotope enriched high-k layer allows following of O-redistribution through scavenging and isotopic exchange for different annealing temperatures, see Figure 2. This approach has revealed a subtle effect of IL composition on remote O-scavenging kinetics. In addition, rapid isotopic exchange between the different interfaces through the TiN metal gate is seen to occur upon high temperature anneal, indicating rapid Odiffusion in these stacks. These examples demonstrate the benefits of using O isotope labeling for SIMS analysis to resolve small quantities of O and to obtain fundamental knowledge on oxygen transport in high-k metal gate stacks.