Search

Low operation power and high endurance of resistive random access memory (RRAM) as a synaptic device are critical parameters for in-memory computing applications. Yet, high power consumption and reliability issue of silicon bottom electrode (BE) RRAM hinder its commercialization as a synaptic device. In this experiment, we report on the improvement of switching characteristics of silicon BE nanowedge RRAM via the Nickel (Ni) silicidation process. Existing highly doped Si-BE forms a SiO2 interfacial layer (IL) during a switching layer deposition and increases an effective thickness, leading to increased voltage drop within the RRAM device and large cycle-to-cycle variations. By siliciding the Si-BE with Ni, the issue of IL formation is removed and the resistance of metallic NiSi BE is further reduced compared to Arsenic (As+) doped Si BE. Both dc and ac analyses of the fabricated NiSi-BE nanowedge RRAM have shown the reduction of overshoot and switching current down to 55% of the original value. Transmission electron microscopy (TEM) and energy-dispersive spectroscopy (EDS) analysis convinced the formation of NiSi BE. In addition, gradual switching characteristics, uniform low resistance state (LRS), and better endurance of NiSi-BE nanowedge RRAM enable the Si compatible approach to fabricate a large-size RRAM cross-point array for utilization in hardware-implemented neuromorphic computing applications.

In this study, the resistive switching and synaptic properties of a complementary metal-oxide semiconductor-compatible Ti/a-BN/Si device are investigated for neuromorphic systems. A gradual change ...

In this article, we report a method for recovering a resistive-switching random access memory (RRAM) from the reset breakdown and enhancing the endurance characteristics. A SiN x -based RRAM device has been fabricated and its switching characteristics are analyzed with a particular interest in reset breakdown. It has been found that the SiN x RRAM in permanent reset breakdown can be revived to high-resistance state (HRS) by thermal recovery, a low-temperature annealing method. The memory window could be widened even with enhanced reset stability and conductance distribution. Temperature-dependent conductance change has been measured in order to figure out the substantial component of conductive filament and the mechanism of thermal recovery. The experimental evidences show that the reset breakdown process is the result of unwanted Si dangling bond (Si-DB) formation. By thermal recovery, Ni filament could be ruptured without applying a high electric field which induces negative set.

In this study, the electrical characteristics of TiN/SiNx/TiN and TiN/Ag/SiNx/TiN RRAMs were thoroughly investigated through I-V measurements. Our novel Ag-inserted silicon nitride-based resistive switching memory (RRAM) achieved switching operation at lower voltages and lower current levels compared to the conventional silicon nitride RRAM that does not have an Ag insertion layer. These enhanced characteristics enable low power operation, one of the main goals of RRAM research. Gradual conductance modulation is also possible in this device with constant voltage pulses being 50% lower than that seen in conventional devices, this property fulfills an important requirement that makes our device suitable for use as a neuromorphic synapse device. The conduction mechanism of our Ag-inserted device was further analyzed through I-V measurements and compared with a control group. Based on these data, a 2D Monte Carlo simulation was implemented to investigate the mechanism behind the new behavior displayed by our Ag-inserted silicon nitride RRAM. A resistive network model was used to calculate the voltage and electric field distribution, and then the motion of the particles was simulated by taking into account its relation to the heat generated inside the device.

Resistive random-access memory (RRAM) with a Ni/SiNx/a-Si/p+-Si structure is presented. In contrast to RRAM devices based on high-k materials, the proposed Si-based device is more attractive and promising because the SiNx and a-Si layers have full compatibility with conventional complementary metal-oxidesemiconductor technology. The proposed device is compared to a control device with a single layer of SiNx. A conduction path containing Si dangling bonds (traps) can be generated in both the SiNx and a-Si layers. The conduction path in each layer can be controlled by the compliance current during the forming process. For high compliance current mode, the double-layer device has a higher ON/OFF ratio (∼104) and lower leakage current (∼10-9 A) than the single-layer device. For low compliance current mode, better non-linearity (∼103) can be obtained when a 1/2 read bias scheme is applied to the cross-point array.

A resistive switching random-access memory (ReRAM) device with TiN/HfO2/SiO2/p+-Si stack is analyzed for synaptic behavior. Fabricated RRAM device stack consists of heavily doped p-type silicon bottom electrode (BE), HfO2 as a switching layer, SiO2 as a tunneling barrier layer and TiN as a top electrode (TE). The RRAM cell successfully shows I-V curves including SET and RESET operations in DC sweep mode. By inserting a SiO2 tunneling barrier layer, gradual switching characteristics are obtained by pulse operation. By optimizing the pulse scheme applied to the device, biological synaptic plasticity of long-term potentiation and depression is demonstrated. Finally, spike rate-dependent plasticity (SRDP) learning rule is realized by applying pulses with different frequencies to both terminals of the ReRAM device.

In this study, a fully Si-compatible resistive-switching random-access memory (ReRAM) employing GeOx as the switching layer is fabricated, analyzed, and characterized. I–V curves and endurance characteristics have been obtained from the measurement of fabricated GeOx ReRAM devices. From the measurement results, the size dependence of the operation voltages is investigated. Here, we have carefully prepared the methods for GeOx switching layer and its interfaces. Physical vapor deposition (PVD) by an evaporator and subsequent thermal oxidation are the key processes for the switching layer. Additional annealing was performed and its effects on device performances have been closely investigated. It was revealed from the measurement results that the forming voltage of the GeOx ReRAM cell was lower than set voltage. This merit of forming-freeness gets rid of the necessity of preparing an additional voltage scheme and relatively complicated peripheral circuit for generating the forming voltage which is the highest value among the operation voltages in most cases. The low-resistance state (LRS) and high-resistance state (HRS) current ratio is larger than 103 and the number of endurance cycles reaches 400 even under the harsh condition of DC sweep mode. At the end of this study, a DC compact model for the fabricated ReRAM cell is schemed intuitively by simple elements including variable resistors, capacitors, and switches. The components in the conceived model are allowed to have highly accurate values by figuring out the predominant conduction mechanism and comparing with the measurement results in the recursive manner. The systematic study embracing process architecture, device fabrication and characterization, and circuit modeling would be highly beneficial in the array and system level architecture design.

Due to increased grid problems caused by renewable energy systems being used to realize zero energy buildings and communities, the importance of energy sharing and self-sufficiency of renewable energy also increased. In this study, the energy performance of an energy-sharing community was investigated to improve its energy efficiency and renewable energy self-sufficiency. For a case study, a smart village was selected via detailed simulation. In this study, the thermal energy for cooling, heating, and domestic hot water was produced by ground source heat pumps, which were integrated with thermal energy storage (TES) with solar energy systems. We observed that the ST system integrated with TES showed higher self-sufficiency with grid interaction than the PV and PVT systems. This was due to the heat pump system being connected to thermal energy storage, which was operated as an energy storage system. Consequently, we also found that the ST system had a lower operating energy, CO2 emissions, and operating costs compared with the PV and PVT systems.

Toward the successful development of artificial intelligence, artificial synapses based on resistive switching devices are essential ingredients to perform information processing in spiking neural networks. In neural processes, synaptic plasticity related to the history of neuron activity plays a critical role during learning. In resistive switching devices, it is barely possible to emulate both short-term plasticity and long-term plasticity due to the uncontrollable dynamics of the conductive filaments (CFs). Despite extensive effort to realize synaptic plasticity in such devices, it is still challenging to achieve reliable synaptic functions due to the overgrowth of CFs in a random fashion. Herein, we propose an organic resistive switching device with bio-realistic synaptic functions by adjusting the CF diffusive parameter. In the proposed device, complete synaptic plasticity provides the history-dependent change in the conductance. Moreover, the homeostatic feedback, which resembles the biological process, regulates CF growth in our device, which enhances the reliability of synaptic plasticity. This novel concept for realizing synaptic functions in organic resistive switching devices may provide a physical platform to advance the fundamental understanding of learning and memory mechanisms and develop a variety of neural circuits and neuromorphic systems that can be linked to artificial intelligence and next-generation computing paradigm.

We studied the pseudo-homeothermic synaptic behaviors by integrating complimentary metal–oxide–semiconductor-compatible materials (hafnium oxide, aluminum oxide, and silicon substrate). A wide range of temperatures, from 25 °C up to 145 °C, in neuronal dynamics was achieved owing to the homeothermic properties and the possibility of spike-induced synaptic behaviors was demonstrated, both presenting critical milestones for the use of emerging memristor-type neuromorphic computing systems in the near future. Biological synaptic behaviors, such as long-term potentiation, long-term depression, and spike-timing-dependent plasticity, are developed systematically, and comprehensive neural network analysis is used for temperature changes and to conform spike-induced neuronal dynamics, providing a new research regime of neurocomputing for potentially harsh environments to overcome the self-heating issue in neuromorphic chips.

In this work, we investigated the gradual switching and self-rectifying characteristics of Cu/α-IGZO/p+-Si resistive-switching random-access memory (RRAM) device. We fabricated the RRAM cells with Cu as the top electrode (TE) and heavily doped p-type silicon as the bottom electrode (BE), and amorphous indium gallium zinc oxide (α-IGZO) film as the switching layer. In particular, we developed a bilayer IGZO film consisting of an oxygen-deficient layer and an oxygen-rich one by controlling the oxygen concentrations in the respective switching layers in the expectation of gradual switching owing to an oxygen vacancy reservoir. Fabricated RRAM cells successfully showed the typical hysteretic I–V curves including SET and RESET operations in the DC sweep mode. Furthermore, gradual switching and self-rectifying performances were observed. These characteristics are suitable to applications for synaptic devices toward the advanced neuromorphic systems.

In this paper, we have investigated the effect of additional thin SiO2 layer on switching variability of SiN x -based resistive memory (RRAM). We found that excessive LRS state generated in set operation results in large reset current and abrupt reset operation. The abrupt reset operation leads to large distribution of HRS. To investigate the transient characteristics of switching procedure in detail, measurement environment was implemented with equivalent circuit, and measured current from equipment was separated into capacitive and resistive current of resistive memory cell. Consequently, we point the internal overshoot current occurring in set operation as the cause of the excessive leaky state leading to large resistance distributions. Finally, we confirm the effect of low resistance state value ( $R_{{\text{LRS}}}$ ) and cell capacitance ( $C_{{\text{DUT}}}$ ) on the internal overshoot current of RRAM.

In this paper, we investigate the resistive switching behavior of a bipolar resistive random-access memory (RRAM) in a Ni/WO x /p + -Si RRAM with CMOS compatibility. Highly unifrom and reliable bipolar resistive switching characteristics are observed by a DC voltage sweeping and its switching mechanism can be explained by SCLC model. As a result, the possibility of metal-insulator-silicon (MIS) structural WO x -based RRAM’s application to Si-based 1D (diode)–1R (RRAM) or 1T (transistor)–1R (RRAM) structure is demonstrated.

In this study, a simple, reliable, and universal circuit model of bipolar resistive-switching random-access memory (RRAM) is presented for the circuit-level simulation of a high-density cross-point RRAM array. For higher accuracy and reliability, the compact model has been developed to match the measurement data of the fabricated RRAM devices with $$\hbox {SiN}_{{x}}$$ and $$\hbox {HfO}_{{x}}$$ switching layers showing different reset switching behaviors. In the SPICE simulation, the RRAM cross-point array is virtually realized by embedding the empirically modeled memory cells, by which device performances such as read margin and power consumption in the high-density array are closely investigated.

In this work, we investigated the gradual resistance switching phenomenon of our fabricated silicon nitride-based bipolar RRAM. By positive (set) and negative (reset) pulses applied between top electrode (TE) and bottom electrode (BE), the resistance state of the RRAM cell was delicately controlled. We checked the effect of pulse width, rise and fall time and pulse amplitude on the change of the resistance state. In conclusion, it is demonstrated that change of resistance state is determined by applied pulse area above a certain threshold voltage. The memory cell and gradual resistance change characteristics would be used to implement accurate and reliable synaptic devices in low power neuromorphic system.

This paper presents switching characteristics of Ni/HfO x /p+-Si with different switching layer thicknesses (5/10 nm) in DC mode. Larger forming voltage and on/off ratio is obtained from the 10 nm HfO x RRAM while step-like reset process is seen from 5 nm HfO x RRAM. From the measurement results, fabricated RRAM device with thicker switching layer is more suitable for nonvolatile memory operation while thinner HfO x layer has potential for application in neuromorphic computing system.

Here we demonstrate low-power resistive switching in a Ni/SiNy/SiNx/p++-Si device by proposing a double-layered structure (SiNy/SiNx), where the two SiN layers have different trap densities. The LRS was measured to be as low as 1 nA at a voltage of 1 V, because the SiNx layer maintains insulating properties for the LRS. The single-layered device suffers from uncontrollability of the conducting path, accompanied by the inherent randomness of switching parameters, weak immunity to breakdown during the reset process, and a high operating current. On the other hand, for a double-layered device, the effective conducting path in each layer, which can determine the operating current, can be well controlled by the ICC during the initial forming and set processes. A one-step forming and progressive reset process is observed for a low-power mode, which differs from the high-power switching mode that shows a two-step forming and reset process. Moreover, nonlinear behavior in the LRS, whose origin can be attributed to the P-F conduction and F-N tunneling driven by abundant traps in the silicon-rich SiNx layer, would be beneficial for next-generation nonvolatile memory applications by using a conventional passive SiNx layer as an active dielectric.

In this paper, dopant concentration dependent resistive switching characteristics in a SiN x -based resistive random-access memory (RRAM) device are investigated. The device with low dopant concentration (∼10 18 cm −3 ) shows only unipolar switching due to the suppressed reverse current. The result of conduction mechanism analyses for LRS indicates that conducting transport follows the thermionic emission, which has a strong temperature dependence. On the other hand, both unipolar and bipolar switching are observed in the device with high dopant concentration (∼10 20 cm −3 ). It is found that forward current/reverse current (F/R) ratio can be maximized by reducing doping concentration and compliance current ( I CC ).

In this work, new 3D vertical RRAM device with silicon CMOS compatibility and the possible fabrication process are presented. RRAM devices based on Ni/Si 3 N 4 / p + -Si stack which are applicable in our proposed 3D vertical RRAM structure were fabricated in order to reveal the effects of switching layer thickness and compliant current on resistive switching parameters. Forming-less behavior can be easily achieved by controlling thickness of the Si 3 N 4 layer. It is found that the high- and low-resistance state can be effectively modulated by the film thickness and compliance current, respectively.

To successively implement synaptic memristor device in the neuromorphic computing system, it is essential to perform a variety of synaptic characteristics with low power consumption and have complementary metal-oxidesemiconductor (CMOS) compatibility. In this work, we experimentally demonstrate two types of interface and filamentary resistive switching behaviors for Ni/Ta2O5/Si device by controlling electroforming process. The typical bipolar operation with filamentary switching is observed with electroforming for non-volatile memory properties such as reliable retention (>104) and high on/off ratio (>103). To achieve the synaptic characteristics such as paired pulse facilitation (PPF), potentiation, and depression, the gradual switching with low current without electroforming is used. We evaluate pattern recognition accuracy simulation from Fashion MNIST dataset by using a 3-layer neural network (784 × 512 × 10) and synaptic weight of Ni/Ta2O5/Si device. Furthermore, density of states, isosurface charge density and electron localization function plots confirm the conductivity and charge formation of Ta2O5 structure with and without oxygen vacancies. Theoretical work results reveal that the resistive switching characteristics are due to charge accumulation/depletion near the defects sites (oxygen vacancy). All things considered, the Ni/Ta2O5/p++-Si memristor could offer the flexibility for both non-volatile memory and synaptic devices by simply controlling electroforming.

In this Letter, we present reset-voltage-dependent precise tuning operation of TiOx/Al2O3-based memristive devices. For the high resistance state (HRS) with high reset voltage, abrupt set operations are observed with a large variation, while the HRS obtained by low reset voltage provides gradual and uniform switching behaviors. The improvement of gradual switching and the programming accuracy are analyzed regarding cycle-to-cycle as well as device-to-device variations. We believe that these results can be applied to operate TiOx/Al2O3-based memristors in areas requiring highly accurate tuning characteristics.

This work reports on the bipolar resistive switching (RS) characteristics and possible applicability to transparent synaptic devices when an ultrathin Al2O3 interfacial layer is introduced between HfO2 and an indium tin oxide (ITO) bottom electrode for an RS device (TaN/HfO2/Al2O3/ITO). The introduction of the Al2O3 interfacial layer on ITO allows for a more gradual current change during the RESET process. As a result, the bilayer RS device offers multilevel resistance states with reasonable controllability under the application of various DC and pulse voltages. Considering the systematic changes in the resistance in accordance with the negative/positive voltage pulses during the potentiation/depression processes, as well as the reasonable spike-timing-dependent plasticity characteristics, the proposed RS bilayer on ITO is a potential candidate for transparent synaptic devices in neuromorphic systems.

Brain-inspired artificial synaptic devices and neurons have the potential for application in future neuromorphic computing as they consume low energy. In this study, the memristive switching characteristics of a nitride-based device with two amorphous layers (SiN/BN) is investigated. We demonstrate the coexistence of filamentary (abrupt) and interface (homogeneous) switching of Ni/SiN/BN/n++-Si devices. A better gradual conductance modulation is achieved for interface-type switching as compared with filamentary switching for an artificial synaptic device using appropriate voltage pulse stimulations. The improved classification accuracy for the interface switching (85.6%) is confirmed and compared to the accuracy of the filamentary switching mode (75.1%) by a three-layer neural network (784 &times, 128 &times, 10). Furthermore, the spike-timing-dependent plasticity characteristics of the synaptic device are also demonstrated. The results indicate the possibility of achieving an artificial synapse with a bilayer SiN/BN structure.

This letter presents dual functions including selector and memory switching in a V/SiO x /AlO y /p++Si resistive memory device by simply controlling compliance current limit (CCL). Unidirectional threshold switching is observed after a positive forming with low CCL of 1 μA. The shifts to the V-electrode side of the oxygen form the VO x layer, where the threshold switching can be explained by the metal-insulation-transition phenomenon. For higher CCL (30 μA) applied to the device, a bipolar memory switching is obtained, which is attributed to formation and rupture of the conducting filament in SiO y layer. 1.5-nm-thick AlO y layer with high thermal conductivity plays an important role in lowering the off-current for memory and threshold switching. Through the temperature dependence, high-energy barrier (0.463 eV) in the LRS is confirmed, which can cause nonlinearity in a low-resistance state. The smaller the CCL, the higher the nonlinearity, which provides a larger array size in the cross-point array. The coexistence of memory and threshold switching in accordance with the CCL provides the flexibility to control the device for its intended use.

In this paper, we present a synapse function using analog resistive-switching behaviors in a SiNx-based memristor with a complementary metal-oxide-semiconductor compatibility and expandability to three-dimensional crossbar array architecture. A progressive conductance change is attainable as a result of the gradual growth and dissolution of the conducting path, and the series resistance of the AlOy layer in the Ni/SiNx/AlOy/TiN memristor device enhances analog switching performance by reducing current overshoot. A continuous and smooth gradual reset switching transition can be observed with a compliance current limit (>100 μA), and is highly suitable for demonstrating synaptic characteristics. Long-term potentiation and long-term depression are obtained by means of identical pulse responses. Moreover, symmetric and linear synaptic behaviors are significantly improved by optimizing pulse response conditions, which is verified by a neural network simulation. Finally, we display the spike-timing-dependent pl...

Nano-wedge structured resistive switching memory is fabricated through modifying bottom electrode structure and the DC characteristics of devices are analyzed. Excellent data storage capability is proved through retention test by setting at high temperature over 104 seconds in both low and high resistance states (LRS and HRS). Endurance test is also performed to demonstrate outstanding characteristics of the resistive switching memory device.

Here, we present evidence of self-compliant and self-rectifying bipolar resistive switching behavior in Ni/SiNx/n(+) Si and Ni/SiNx/n(++) Si resistive-switching random access memory devices. The Ni/SiNx/n(++) Si device's Si bottom electrode had a higher dopant concentration (As ion > 10(1)9 cm(-3)) than the Ni/SiNx/n(+) Si device; both unipolar and bipolar resistive switching behaviors were observed for the higher dopant concentration device owing to a large current overshoot. Conversely, for the device with the lower dopant concentration (As ion < 10(18) cm(-3)), self-rectification and self-compliance were achieved owing to the series resistance of the Si bottom electrode.

In this letter, we demonstrated improved resistive switching (RS) characteristics for a complementary metal-oxide-semiconductor compatible Ni/Ti/Al2O3/SiO2/Si device structure. The robust SiO2 layer deposited by the additional low-pressure chemical vapor deposition process can improve the RS characteristics such as the endurance cycle, current level, and on/off ratio. Moreover, the multilevel capability is enhanced in the bilayer structure; the larger the reset stop voltage, the greater the on/off ratio demonstrated. Furthermore, for practical RS operation, several resistance states were obtained by adjusting the pulse amplitude. This property is desirable for highly integrated nonvolatile memory applications.

In this work, the simultaneous detection of threshold switching and bipolar memory switching in Ag/SiNx/p++-Si devices is investigated. In the DC sweep mode, threshold switching is observed with low compliance current limit (CCL) of 1 μA while memory switching is dominant when high CCL (1 mA) is applied. It is found that in the pulse switching mode, pulse amplitude is an important factor in determining the nature of switching. It has been proven that the strength of the Ag filament formed in the SiNx determines the nonvolatile property of the switching. The undirectional threshold switching behavior in low currents of Ag/SiNx/p++-Si devices could be used as a selector for a low-power unipolar memory. Moreover, operating in two modes in one device will provide more flexibility in device design.

A feasible approach is reported to reduce the switching current and increase the nonlinearity in a complementary metal-oxide-semiconductor (CMOS)-compatible Ti/SiNx /p+ -Si memristor by simply reducing the cell size down to sub-100 nm. Even though the switching voltages gradually increase with decreasing device size, the reset current is reduced because of the reduced current overshoot effect. The scaled devices (sub-100 nm) exhibit gradual reset switching driven by the electric field, whereas that of the large devices (≥1 µm) is driven by Joule heating. For the scaled cell (60 nm), the current levels are tunable by adjusting the reset stop voltage for multilevel cells. It is revealed that the nonlinearity in the low-resistance state is attributed to Fowler-Nordheim tunneling dominating in the high-voltage regime (≥1 V) for the scaled cells. The experimental findings demonstrate that the scaled metal-nitride-silicon memristor device paves the way to realize CMOS-compatible high-density crosspoint array applications.

Massive thermal effluent energy from power plant is mostly released to the sea, and only a little is used for fishing culture and agriculture in South Korea. The thermal effluent from the power plant can be an efficient heat source of the heat pump system to provide heating energy for the greenhouse, but energy loss and pump power by long distance pipeline installation from a power plant to the greenhouse should be considered. In this paper, an operational energy saving potential of a thermal effluent source heat pump system for the greenhouse heating was investigated. For the estimation of thermal load, three cases of greenhouse were categorized, and the thermal performance and operating energy consumption during the heating season were compared with those of a conventional ground source heat pump (GSHP) system. The model for heat pump system was newly derived to estimate the energy performance of the proposed system, and then detailed simulations for each system under three cases of greenhouse were conducted. The results showed that the operational energy of the proposed system can be saved by 17–20% than that of the conventional GSHP system.

This letter studies the effect of the negative-set on the resistive switching performances of CMOS-compatible Ni/SiNx/p++-Si resistive memory devices by simply tuning x. A Ni/SiN1.07/p++-Si device showed lower power switching (20 μW) and better endurance cycles (103) compared to a Ni/SiN0.82/p++-Si device because of the improved negative set behavior and initially lower set and reset currents. In addition, we achieved fast switching speed for set (200 ns) and reset (100 ns) processes in the Ni/SiN1.07/p++-Si device. For the Ni/SiN1.07/p++-Si device, fine adjustment of resistance values is attainable by varying the pulse amplitude and width due to the gradual reset switching characteristics. The barrier-height-dependent conduction model is proposed to explain the change in the current level with the x value.

SiN x -based nano-structure resistive memory is fabricated by fully silicon CMOS compatible process integration including particularly designed anisotropic etching for the construction of a nano-cone silicon bottom electrode (BE). Bipolar resistive switching characteristics have significantly reduced switching current and voltage and are demonstrated in a nano-cone BE structure, as compared with those in a flat BE one. We have verified by systematic device simulations that the main cause of reduction in the performance parameters is the high electric field being more effectively concentrated at the tip of the cone-shaped BE. The greatly improved nonlinearity of the nano-cone resistive memory cell will be beneficial in the ultra-high-density crossbar array.