1. GDNMOS and GDBIMOS devices for high voltage ESD protection in thin film advanced FD-SOI technology
- Author
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Maud Vinet, Philippe Galy, Louise De Conti, Sorin Cristoloveanu, Thomas Bedecarrats, STMicroelectronics, Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), and Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)
- Subjects
Materials science ,Silicon on insulator ,Hardware_PERFORMANCEANDRELIABILITY ,02 engineering and technology ,01 natural sciences ,[SPI]Engineering Sciences [physics] ,0103 physical sciences ,MOSFET ,Hardware_INTEGRATEDCIRCUITS ,Materials Chemistry ,Hardware_ARITHMETICANDLOGICSTRUCTURES ,Electrical and Electronic Engineering ,Metal gate ,NMOS logic ,010302 applied physics ,business.industry ,High voltage ,021001 nanoscience & nanotechnology ,Condensed Matter Physics ,Electronic, Optical and Magnetic Materials ,Anode ,CMOS ,Optoelectronics ,0210 nano-technology ,business ,Hardware_LOGICDESIGN ,Voltage - Abstract
GDNMOS (Gated Diode merged NMOS) and GDBIMOS (Gated Diode merged BIMOS) were fabricated using the 28 nm node ultra-thin film UTBB FD-SOI high-k metal gate CMOS technology. The anode current and voltage were measured and simulated for a high number of variants with different connectivity conditions on the terminals. The devices are reconfigurable and promising for high voltage ESD protection applications.
- Published
- 2019