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This article presents a design for implementing an ultrawideband (UWB) software-defined radar (SDRadar) using a bandwidth reconstruction technique, called frequency stacking, for a stepped frequency signal to create a synthetic wideband waveform (SWW). Practical methods of overcoming traditional limitations of SDRadar and stepped chirp radar are introduced, and the performance is demonstrated using a commercial battery-powered universal software radio peripheral (USRP) software-defined radio (SDR). Application-specific considerations are made and performance tradeoffs are demonstrated. Furthermore, the method is shown to be the coherence solution for otherwise noncoherent low-cost communications’ SDR systems. The proposed design has multiple applications in low-cost, reconfigurable ground-penetrating radar (GPR) and small unmanned aerial vehicle (UAV) synthetic aperture radar (SAR) platforms.

The impact of single event transients (SETs) on single-pole double-throw (SPDT) RF switch circuits designed in a commercially-available, 180 nm second-generation SiGe BiCMOS (IBM 7HP) technology is investigated. The intended application for these SPDT RF switches requires a 1 GHz to 20 GHz band of operation, relatively low insertion loss ( 15 dB at 20 GHz). Two-photon absorption experiment results reveal that the SPDT switches are vulnerable to SETs due to biasing effects as well as the triple-well (TW) nFETs, which are found to be more sensitive to SETs than bulk nFETs. From these results, potential implications are discussed and mitigation strategies are proposed. To verify one of the proposed mitigation techniques, SPDT switches were also designed in a 180 nm twin-well SOI CMOS (IBM 7RF-SOI) technology. A different biasing technique is implemented to help improve the SET response. The fabricated SOI SPDT switches achieve an insertion loss of 21 dB isolation at 20 GHz. For this circuit, no transients were observed even at very high laser energies (≈ 5 nJ).

To the author's knowledge, this work represents the first demonstration of an X-band integrated 64-element active phased-array receiver using SiGe and organic multilayer (LCP + Duroid) technologies. The design and measurement of the antenna, SiGe T/R module, and integrated subarray antenna were presented. In addition, the design of the FPGA digital control board was also presented, which enabled beam steering and control of the phase shifters. This receive subarray was designed for use in SCLP applications and meets performance, cost, and size requirements for use with compact platforms, such as UAVs.

This paper presents for the first time an X-band antenna array with integrated silicon germanium low noise amplifiers (LNA) and 3-bit phase shifters (PS). LNAs and PSs were successfully integrated onto an 8 × 2 lightweight antenna utilizing a multilayer liquid crystal polymer (LCP) feed substrate laminated with a duroid antenna layer. A baseline passive 8×2 antenna is measured along with a SiGe integrated 8×2 receive antenna for comparison of results. The active antenna array weighs only 3.5 ounces and consumes 53 mW of dc power. Successful comparisons of the measured and simulated results verify a working phased array with a return loss better than 10 dB across the frequency band of 9.25 GHz-9.75 GHz. A comparison of radiation patterns for the 8×2 baseline antenna and the 8×2 SiGe integrated antenna show a 25 dB increase in gain (ΔG). The SiGe integrated antenna demonstrated a predictable beam steering capability of ±41°. Combined antenna and receiver performance yielded a merit G/T of -9.1 dB/K and noise figure of 5.6 dB.

We investigate, for the first time, the potential for SEE mitigation of a newly-developed device architecture in a 3rd generation high-speed SiGe platform. This new device architecture is termed the ?inverse-mode cascode SiGe HBT? and is comprised of two standard devices sharing a buried subcollector and operated in a cascode configuration. Verification of the TID immunity is demonstrated using 10 keV X-rays, while an investigation of the SEE susceptibility is performed using a 36 MeV 16O ion. IBICC results show strong sensitivities to device bias with only marginal improvement when compared to a standard device; however, by providing a conductive path from the buried subcollector (C-Tap) to a voltage potential, almost all collected charge is induced on the C-Tap terminal instead of the collector terminal. These results are confirmed using full 3-D TCAD simulations which also provides insight into the physics of this new RHBD device architecture. The implications of biasing the C-Tap terminal in a circuit context are also addressed.

We investigate the applicability of current total ionizing dose (TID) test protocols in the context of advanced transistor technologies such as Silicon-Germanium heterojunction bipolar transistors(SiGe HBTs). In SiGe HBTs, an unexpected shift in collector current is observed during total dose irradiation. Using both device and circuit measurements, we investigate this phenomenon and assess its potential importance in hardness assurance of SiGe components. TCAD simulations were performed to explain the observed current shifts.

The goal of achieving terahertz (THz) transistors within the silicon material system has generated significant recent interest. In this paper, we use operating temperature as an effective way of gaining a better understanding of the performance limits of SiGe HBTs and their ultimate capabilities for achieving THz speeds. Different approaches for vertical profile scaling and reduction of parasitics are addressed, and three prototype fourth-generation SiGe HBTs are compared and evaluated down to deep cryogenic temperatures, using both dc and ac measurements. A record peak fT/fmax of 463/618 GHz was achieved at 4.5 K using 130-nm lithography (309/343 GHz at 300 K), demonstrating the feasibility of reaching half-THz fT and fmax simultaneously in a silicon-based transistor. The BVCEO of this cooled SiGe HBT was 1.6 V at 4.5 K (BVCBO = 5.6 V), yielding a record fT times BVCEO product of 750 GHzldrV (510 GHzldrV at 300 K). These remarkable levels of transistor performance and the associated interesting device physics observed at cryogenic temperatures in these devices provide important insights into further device scaling for THz speeds at room temperature. It is predicted in a new scaling roadmap that fT/fmax of room-temperature SiGe HBTs could potentially achieve 782/910 GHz at a BVCEO of 1.1 V at the 32-nm lithographic node.

We report the first irradiation results on high-frequency SiGe HBT and CMOS phase shifters for space-based, phased-array antennas used in radar or wireless communication systems. Both phase shifter circuits remain functional with acceptable dc and RF performance up to multi-Mrad proton exposure, and are thus suitable for many orbital applications. In addition, simulation results probing the limits of phase shifter performance in a radiation environment are presented. These results show that both CMOS and SiGe HBT based phase shifters can be used for space-based applications without any specific radiation hardening techniques.

We present a new analytical direct parameter-extraction methodology for obtaining the small-signal equivalent circuit of HBTs. It is applied to cryogenically operated SiGe HBTs as a means to allow circuit design of SiGe HBT low-noise amplifiers for cooled radio astronomy applications. We split the transistor into an intrinsic transistor (IT) piece modeled as a Pi-topology, and the quasi-intrinsic transistor (QIT), obtained from the IT after that the base resistance (Rb) has been removed. The relations between Z-Y-parameters of the IT and QIT are then established, allowing us to propose a new methodology for determining Rb. The present extraction method differs from previous studies in that each of the model elements are obtained from exact equations that do not require any approximations, numerical optimization, or post-processing. The validity of this new extraction methodology is demonstrated by applying it to third-generation SiGe HBTs operating at liquid-nitrogen temperature (77 K) across the frequency range of 2-22 GHz.

We report results on the cryogenic operation of two different monolithic X-band silicon-germanium (SiGe) heterojunction bipolar transistor low noise amplifiers (LNAs) implemented in a commercially-available 130 nm SiGe BiCMOS platform. These SiGe LNAs exhibit a dramatic reduction in noise temperature with cooling, yielding Teff of less than 21 K (0.3 dB noise figure) across X-band at a 15 K operating temperature. To the authors’ knowledge, these SiGe LNAs exhibit the lowest broadband noise of any Si-based LNA reported to date.