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3. Threshold voltage control in NiSi-gated MOSFETs through SIIS

Author

Kedzierski, Jakub, Boyd, Diane, Cabral, Cyril, Jr., Ronsheim, Paul, Zafar, Sufi, Meikei Ieong, Ott, John A., and Kozlowski, Paul M.

Subjects
Nickel compounds -- Electric properties, Metal oxide semiconductor field effect transistors -- Electric properties, Semiconductors -- Impurity distribution, Semiconductors -- Research, Business, Electronics, Electronics and electrical industries
Abstract

Complete gate silicidation is an excellent technique for the integration of metal gates into MOSFETs, and NiSi is the most scalable silicide gate material. A versatile method, which relies on doping the poly-Si with various impurities prior to silicidation, for controlling the workfunction of a NiSi gate is presented.

Published
2005

4. Threshold voltage roll-up/roll-off characteristic control in sub-0.2-mu m single workfunction gate CMOS for high-performance DRAM applications

Author

Satoshi Inaba, Ryota Katsumata, Akatsu, Hiroyuki, Rengarajan, Rajesh, Ronsheim, Paul, Murthy, Cheruvu S., Kazumasa Sunouchi, and Bronner, Gary B.

Subjects
Field-effect transistors -- Analysis, Complementary metal oxide semiconductors -- Analysis, Dynamic random access memory -- Technology application, Dynamic cell -- Technology application, Technology application, DRAM, Business, Electronics, Electronics and electrical industries
Abstract

The threshold voltage roll-up/roll-off characteristic control in sub-0.2-mu m single workfunction gate CMOS has been successfully achieved for high performance DRAM applications by N2 implant and well RTA optimization. It has been found that source/drain (S/D) RTA just after extension implant should be carefully and independently optimized in nFET and pFET to reduce transient enhanced diffusion (TED) during following thermal proces

Published
2002

10. Threshold Voltage Roll-Up/Roll-Off Characteristic Control in Sub-0.2-µ m Single Workfunction Gate CMOS for High-Performance DRAM Applications.

Author

Inaba, Satoshi, Katsumata, Ryota, Akatsu, Hiroyuki, Rengarajan, Rajesh, Ronsheim, Paul, Murthy, Cheruvu S., Sunouchi, Kazumasa, and Bronner, Gary B.

Subjects
COMPLEMENTARY metal oxide semiconductors, RANDOM access memory
Abstract

Discusses threshold voltage characteristic control schemes for sub 0.2-upsilonm single workfunction gate complementary metal oxide semiconductors from the viewpoint of high-performance dynamic random-access memory applications. Device fabrication and experiments; Significance of combining well RTA and nitrogen gas implant prior to gate oxidation; RTA optimization condition after source/drain implant; Impact of halo implant on threshold voltage variation.

Published
2002
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