Search

A review of the modelling requirements to establish a Design-Technology Co-Optimization loop for mmWave Front-End Modules is presented. The example of GaN/Si technology is detailed, and recent modeling developments are explained.

The reduction of substrate RF losses and nonlinearities is key to enable high-performance GaN-on-Si HEMT based RF front-end modules. In this paper, the impact of the epitaxial III-N buffer layers on substrate RF losses and harmonic distortion is studied experimentally using coplanar waveguide (CPW) structures. In contrast to a SiO2/Si stack, a strong hysteresis in the RF losses (quantified using effective resistivity (rho_eff) of the HEMT stack is observed when the chuck DC bias is swept. A comparative analysis of various material stacks suggests that the hysteresis originates from the large time constants (much larger than 1 s) associated with the traps in the III-N layers. Harmonic distortion, on the other hand, shows much weaker hysteresis effect than reff during chuck bias sweeps

© 2018 Author(s). We study in this work the growth and fabrication of top-down highly doped n + InAs(Si)/p + GaSb(Si) Esaki tunneling diodes on (001) GaAs substrates. A careful investigation on the highly mismatched GaSb/GaAs growth is first conducted by means of Reflection High-Energy Electron Diffraction (RHEED), Atomic Force Microscopy (AFM), and X-Ray Diffraction (XRD) analyses. These results are expected to pave the way to methods for III-Sb buffer layer's integration with low threading dislocation (TD) densities. A comparison between AFM, XRD, defect revealing by chemical etching and transmission electron microscopy (TEM) is then presented to calculate the precise TD density and its influence on the device structure. In the last part, we report on first operating sub-30 nm III-V vertical NW tunneling devices on (001) commercial GaAs substrates.

In this work, we will give an overview of the innovations in materials and new device concepts that will be needed to continue Moore’s law to the sub-10 nm technology nodes. To meet the power and performance requirements high mobility materials in combination with new device concepts like tunnel FETs and gate-all-around devices will need to be introduced. As the density is further increased and it becomes increasingly difficult to put contacts, spacers and gate in the available gate pitch, disruptive integration schemes such as vertical transistors and monolithic 3D integration might lead the way to the ultimate scaling of CMOS.

A comparative investigation of high-energy neutrons effect on strained and non-strained devices with different geometries is presented. Both single-gate planar and multiple-gate (MuG) silicon-on-insulator (SOI) devices are considered. Device response to the neutron irradiation is assessed through the variations of threshold voltage and transconductance maximum. The difference between strained and non-strained device response to the high-energy neutrons exposure is clearly evidenced. The reasons for such a difference are discussed. Analysis of the experimental results allows for suggesting that strain relaxation is one of the probable causes.

This paper analyzes the influence of negative charges (NC) located at the gate edges on the advanced MOSFETs behavior, paying particular attention to the subthreshold slope, S, maximum transconductance, Gmmax, and analog figures of merit, such as transconductance over drain current ratio, Gm/ID, output conductance, GD, Early voltage, VEA, and intrinsic gain. General trends obtained by two-dimensional numerical simulations on double-gate (DG) structures are whenever possible qualitatively correlated with experimental data obtained on FinFETs. We show that the presence of negative charges at the gate edges while degrading the subthreshold behavior and analog figures of merit (especially for long-channel devices) can result in apparent improved control of short-channel effects and higher Gmmax. The origin of such twofold impact of negative charges at the gate edges on the device behavior is also analyzed by 2-D device simulations and a simplified two-transistors model.

Channel conductance measurements can be used as a tool to study thermally activated electron transport in the sub-threshold region of state-of-art FinFETs. Together with theoretical tight-binding (TB) calculations, this technique can be used to understand the dependence of the source-to-channel barrier height (Eb) and the active channel area (Saa) on three important parameters: (i) the gate bias (Vgs), (ii) the temperature, and (iii) the FinFET cross-section size. The quantitative difference between experimental and theoretical values that we observe can be attributed to the interface traps present in these FinFETs. Therefore, based on the difference between measured and calculated values of (i) Saa and (ii) |?Eb/?Vgs| (channel to gate coupling), two new methods of interface trap density (Dit) metrology are outlined. These two methods are shown to be very consistent and reliable, thereby opening new ways of analyzing in situ state-of-the-art multi-gate FETs down to the few nanometer width limit. Furthermore, theoretical investigation of the spatial current density reveals volume inversion in thinner FinFETs near the threshold voltage., QN/Quantum Nanoscience, Applied Sciences

We report the observation of lifetime-enhanced transport (LET) based on perpendicular valleys in silicon by transport spectroscopy measurements of a two-electron system in a silicon transistor. The LET is manifested as a peculiar current step in the stability diagram due to a forbidden transition between an excited state and any of the lower energy states due to perpendicular valley (and spin) configurations, offering an additional current path. By employing a detailed temperature dependence study in combination with a rate equation model, we estimate the lifetime of this particular state to exceed 48 ns. The two-electron spin-valley configurations of all relevant confined quantum states in our device were obtained by a large-scale atomistic tight-binding simulation. The LET acts as a signature of the complicated valley physics in silicon: a feature that becomes increasingly important in silicon quantum devices., QN/Quantum Nanoscience, Applied Sciences

We present atomistic simulations of the D0 to D? charging energies of a gated donor in silicon as a function of applied fields and donor depths and find good agreement with experimental measurements. A self-consistent field large-scale tight-binding method is used to compute the D? binding energies with a domain of over 1.4 million atoms, taking into account the full band structure of the host, applied fields, and interfaces. An applied field pulls the loosely bound D? electron toward the interface and reduces the charging energy significantly below the bulk values. This enables formation of bound excited D? states in these gated donors, in contrast to bulk donors. A detailed quantitative comparison of the charging energies with transport spectroscopy measurements with multiple samples of arsenic donors in ultrascaled metal-oxide-semiconductor transistors validates the model results and provides physical insights. We also report measured D? data showing the presence of bound D? excited states under applied fields., QN/Quantum Nanoscience, Applied Sciences

n/a

A comparative investigation of high-energy neutrons effect on strained and non-strained devices with different geometries is presented. Both single-gate planar and multiple-gate (MuG) silicon-on-insulator (SOI) devices are considered. Device response to the neutron irradiation is assessed through the variations of threshold voltage and transconductance maximum. The difference between strained and nonstrained device response to the high-energy neutrons exposure is clearly evidenced. The reasons for such a difference are discussed. Analysis of the experimental results allows for suggesting that strain relaxation is one of the probable causes.

This paper investigates, for the first time, the influence of high-energy neutrons on Multiple-Gate FETs (MuGFETs) with various gate lengths and fin widths. Neutron-induced degradation is addressed through the variation of major device parameters such as threshold voltage, subthreshold slope, maximum transconductance and DIBL. We demonstrate that high-energy neutrons result in total-dose effects largely similar to those caused by c- and proton-irradiations. It is shown that, contrarily to the generally believed immunity to irradiation, very short-channel MuGFETs can become extremely sensitive to the total-dose effect. The possible reasons of such length-dependent neutron-induced degradation are discussed and finally related to gate edges.

In this letter, we describe the observation of the interference of conduction paths induced by two donors in a nanoscale silicon transistor, resulting in a Fano resonance. This demonstrates the coherent exchange of electrons between two donors. In addition, the phase difference between the two conduction paths can be tuned by means of a magnetic field, in full analogy to the Aharonov–Bohm effect. One of the crucial ingredients for donor based quantum computation is phase coherent manipulation of electrons. This has not been achieved as yet, and this work presents a stepping stone., Kavli Institute of Nanoscience, Applied Sciences

Modern MOSFET devices with undoped channel have a non-trivial current distribution, which is gate voltage dependent In our work we have studied the sub-threshold behavior of undoped triple gate MOSFETs (FinFETs) using a thermionic transport model We have analyzed the conductance data of such devices. and from this, we have been able to determine the evolution of both the active cross-section area of the channel and the barrier height as a function of the gate voltage The result of our experiments shows good agreement with tight binding simulations and with analytical results. This confirms the validity of the use of our thermonic approach to Study transport in sub-micrometer size FinFET devices and not only in micrometer size samples specially made for characterizations.

The ability to build structures with atomic precision is one of the defining features of nanotechnology. Achieving true atomic- level functionality, however, requires the ability to control the wavefunctions of individual atoms. Here, we investigate an approach that could enable just that. By collecting and analysing transport spectra of a single donor atom in the channel of a silicon FinFET, we present experimental evidence for the emergence of a new type of hybrid molecule system. Our experiments and simulations suggest that the transistor's gate potential can be used to control the degree of hybridization of a single electron donor state between the nuclear potential of its donor atom and a nearby quantum well. Moreover, our theoretical analysis enables us to determine the species of donor (arsenic) implanted into each device as well as the degree of confinement imposed by the gate.

We study the electrical transport through single As donors incorporated in the channel of a FinFET, i.e. a donor in a three-terminal geometry. By means of spectroscopic measurements in conjuction with a NEMO-3D model, we can identify the excited states and associate them with either the donors Coulomb potential, a triangular well at the interface or a hybridized combination of the two. The correspondence between the transport measurements, the theoretical model and the local environment provides an atomic understanding of actual gated donors in a nanostructure.