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At present, amorphous indium–gallium–zinc oxide (IGZO) semiconductor has become the most commonly used semiconductor material and is widely used in flat panel displays and various sensors, but its performance is greatly affected by environmental factors, especially water. This study investigates the instability of IGZO thin‐film transistors (TFTs) soaked in deionized water. After 24 h bathing, the field‐effect mobility and threshold voltage change a little, but the subthreshold swing, positive bias stress and negative bias stress stability undergo clear degradation. Through comprehensive examination of the changes in the chemical composition, surface morphology and thickness of the IGZO films, it's found that IGZO experiences selective etching by deionized water, and consequently the film surface becomes rough and rich of In and oxygen vacancies, which can explain the variations on device performance well. In addition to the bathing experiment performed on In2O3, Ga2O3, and ZnO TFTs, a schematic image of the reaction between water and IGZO is depicted, showing the preferential loss of Ga and Zn located next to the oxygen vacancy. [ABSTRACT FROM AUTHOR]

The performance of space power systems is crucial for space products as it determines the operational capabilities, endurance, and efficiency of satellites, spacecraft, and other extraterrestrial devices. Unlike reliability analysis in aerospace systems, studying spacecraft power generation performance requires consideration of both hardware and software aspects. Existing failure models do not fully capture the self‐recovery process of control programs. Therefore, this study presents an impact degradation model for space power systems that incorporates competitive failures under irradiation conditions. The model analyzes solar arrays and power controllers to derive a performance degradation model by considering the defect formation mechanism of amorphous semiconductor materials. Additionally, two shock types are defined based on redundancy backup in power controllers and scrubbing frequency in field‐programmable gate array (FPGA) units. Within the case analysis section, the research meticulously investigates and elucidates the correlation probabilities among varying proton irradiation doses, scrubbing frequencies, and the aforementioned shock types. [ABSTRACT FROM AUTHOR]

The amorphous In─Ga─Zn─O (a‐IGZO) thin film transistors (TFTs) have attracted attention as a cell transistor for the next generation DRAM architecture because of its low leakage current, high mobility, and the back‐end‐of‐line (BEOL) compatibility that enables monolithic 3D (M3D) integration. IGZO‐based electronic devices used in harsh environments such as radiation exposure can be vulnerable, resulting in functional failure. Here, the behavior of subgap density‐of‐states (DOS) over full subgap range according to the impactful gamma‐ray irradiation in a‐IGZO TFTs is investigated by employing DC current–voltage (I−V) data with multiple‐wavelength light sources. To understand the origins of the radiation effect, IGZO films have been also analyzed by x‐ray photoelectron spectroscopy (XPS). Considering in‐depth electrical and chemical analysis, the unexpected increase of subthreshold leakage current caused by total ionizing dose (TID) is strongly correlated with newly discovered deep‐donor states (gDDγ(E)$g_{DD}^\gamma (E)$) at the specific energy level. In particular, oxygen vacancies caused by the gamma‐ray irradiation give rise to undesirable electrical characteristics such as hysteresis effect and negative shift of threshold voltage (VT). Furthermore, the TCAD simulation results based on DOS model parameters are found to exhibit good agreement with experimental data and plausible explanation including (gDDγ(E)$g_{DD}^\gamma (E)$). [ABSTRACT FROM AUTHOR]

Raman spectra of (As1–xBix)2S3 glass samples with x ≤ 0.2 measured at the excitation with above‐bandgap (532 nm) laser light at a relatively low power density (Pexc = 4 kW/cm2) clearly confirm the amorphous character, thereby markedly extending the known compositional interval of existence of the (As1–xBix)2S3 glass previously known (x ≤ 0.06). Spectra measured at an increased Pexc (40 kW/cm2) reveal a photostructural transformation in the illuminated area of the glass leading to an additional contribution of Bi–S bonds as well as to an increasing number of cage‐type As4S4 units with homopolar As–As bonds. A number of new features in a broad range up to about 1,000 cm−1, which emerge in the Raman spectra of the (As1–xBix)2S3 glasses with high (x ≥ 0.14) Bi content and increase in intensity with the exposure time, are related to a photochemical transformation, namely, oxidation of arsenic and sulphur on the (As1–xBix)2S3 glass surface with formation of units containing arsenate AsO43− and sulphate SO42− ions. These processes are irreversible and occur only in the presence of a sufficient amount of bismuth. [ABSTRACT FROM AUTHOR]

In order to balance the stability and mobility of amorphous oxide semiconductor thin‐film transistors (AOS TFTs), we designate a stacked channel TFT structure incorporating an electron relaxation layer (CRL) and an electron transport layer (CTL). Rich In‐ITZO is chosen as the CTL, and a rich Ga‐IGZO material with a short photogenerated electron lifetime served as the CRL. Bilayer TFTs with CRL/CTL ratios of 5/20, 10/20, 15/20, 20/20, and 30/20 nm are prepared. The results reveal that the CRL/CTL stacked structure effectively enhances stability while maintaining high mobility. With an increase in CTL thickness, the TFT mobility also increases. Ultimately, three groups of devices with both high mobility and stability are fabricated: 10/20 TFT with a field‐effect mobility (μFE) of approximately 48.58 cm2V-1s-1 and a negative bias illumination stress (NBIS) threshold voltage shift (|ΔVth|) of around ‐1.14 V; 15/20 TFT with µFE~54.08 cm2V-1s-1 and NBIS |ΔVth|~ ‐2.35 V; and 20/20 TFT with µFE~65.98 cm2V-1s-1 and NBIS |ΔVth|~ ‐2.07 V. This suggests that the CRL/CTL structure can achieve high‐performance TFTs suitable for various display applications. [ABSTRACT FROM AUTHOR]

This paper discusses critical performance metrics wit hin active matrix pixel circuits that occur between acti vation stages (i.e. between programming and emission). It uses an all amorphous oxide semiconductor (AO S) 2T1C (2‐transistor, 1‐capacitor) pixel circuit to dem onstrate kickback voltage, charge sharing, and charge rejection through simulation and experimentation. [ABSTRACT FROM AUTHOR]

The presence of low‐frequency noise (LFN) in amorphous oxide semiconductor (AOS) thin‐film transistors (TFTs) is of utmost concern, prompting extensive investigations into the analysis of LFN. However, prior research endeavors have tended to overlook the significance of the sub‐gap density of states (DOS) in the LFN analysis, resulting in an incomplete comprehension. To bridge this knowledge gap, the influence of sub‐gap DOS is demonstrated on LFN in Si‐doped ZnSnO (SZTO) thin‐film transistors (TFTs) under various conditions. The SZTO TFTs is intentionally subjected to positive bias stress and hot carrier stress in order to control the sub‐gap DOS and investigate how this change affects the LFN characteristics. It is revealed that the non‐uniform energetic distribution of sub‐gap DOS induces bias‐dependent excess noise in the SZTO TFTs. Additionally, self‐recovery behavior after the HCS is observed, accompanied by a commensurate reduction in 1/f noise. These empirical observations provide evidence that the conventional correlated mobility fluctuation model used to explain LFN in AOS TFTs is insufficient and underscores the critical importance of considering subgap DOS when analyzing LFN of AOS TFTs. [ABSTRACT FROM AUTHOR]

High‐performance thin‐film transistors (TFTs) integrated circuits (ICs) have become increasingly necessary to meet the emerging demands such as healthcare, edge computing, and the Internet of Things, etc. This article aims to point out the potential development trends and bottlenecks of TFT ICs, enhancing their performance in terms of electronic performance, stability, consistency, CMOS design, and manufacturing capability. Basic device structures and overall metrics of TFT ICs are explored, as well as their superiority compared to silicon‐based ultrathin chips. Hydrogenated amorphous silicon, low‐temperature polycrystalline silicon, and amorphous oxide semiconductors are widely used in displays due to their ability to be deposited on large areas at low processing temperatures and low cost, and are validated in many prototypes for TFT ICs. Their conduction mechanisms, process flows, performance evaluation, and recent advances are comprehensively viewed. In addition, the potential of emerging low‐dimensional materials as next‐generation channel materials is discussed, along with their limitations and progress in this field. Finally, the major challenges in manufacturing high‐performance TFT ICs and future perspectives are summarized. [ABSTRACT FROM AUTHOR]

To effectively enhance the mobility without other degradations, such as much negative threshold voltage, this work fabricated the a‐IGZO/a‐IZO heterojunction‐channel TFTs with dual‐gate structure. The fabricated a‐IZO/a‐IGZO with thicker a‐IGZO TFT shows high performance, including high mobility of 54.6 cm2 /Vs, small subthreshold swing of 0.26 V/dec, and good stability under PBTS and NBTIS. [ABSTRACT FROM AUTHOR]

The Tauc plot is a method originally developed to derive the optical gap of amorphous semiconductors such as amorphous germanium or silicon. By measuring the absorption coefficient α(hν) and plotting (αhv)12$(\alpha {hv})^{\frac{1}{2}}$ versus photon energy hν, a value for the optical gap (Tauc gap) is determined. In this way non‐direct optical transitions between approximately parabolic bands can be examined. In the last decades, a modification of this method for (poly‐) crystalline semiconductors has become popular to study direct and indirect interband transitions. For this purpose, (ahν)n (n = 12$\frac{1}{2}$, 2) is plotted against hν to determine a value of the electronic bandgap. Due to the ease of performing UV–vis measurements, this method has nowadays become a standard to analyze various (poly‐) crystalline solids, regardless of their different electronic structure. Although this leads partially to widely varying values of the respective bandgap of nominally identical materials, there is still no study that critically questions which peculiarities in the electronic structure prevent a use of the Tauc plot for (poly‐) crystalline solids and to which material classes this applies. This study aims to close this gap by discussing the Tauc plot and its limiting factors for exemplary (poly‐) crystalline solids with different electronic structures. [ABSTRACT FROM AUTHOR]

As the Internet of things (IOT) industry continues to grow with an ever‐increasing number of connected devices, the need for processing large amounts of data in a fast and energy‐efficient way becomes an even more pressing issue. Alternative computation devices such as resistive random access memories (RRAM), or memristors, started taking centre stage as prime candidates to tackle this issue due to their in‐memory computation capabilities. Amorphous oxide semiconductors (AOSs), more specifically eco‐friendly zinc‐tin oxide (ZTO), show great promise as a memristive active material for flexible and sustainable applications due to its low required fabrication temperature, amorphous structure, low‐cost, and critical‐raw‐material‐free composition. In this perspective article, the research progress on ZTO‐based memristors is reviewed in terms of device structure and material compositions. The effects on the electrical performance of the devices are studied. Additionally, neuromorphic and optoelectronic capabilities are analyzed with the objective of finding the best approaches toward implementing these devices in novel computing paradigms. [ABSTRACT FROM AUTHOR]

A set of direct current (DC) analytical equations is formulated for the analysis and design of a single‐layer thin‐film transistor (TFT). For a specified TFT structure, drain current is calculated as a function of drain and gate voltage (taking the source as ground) according to the Enz, Krummenacher, Vittoz (EKV) compact model. One model parameter function is required to implement this EKV‐based equation, that is, drift mobility as a function of gate voltage. Drift mobility is evaluated as a consequence of accumulation layer electrostatics assessment of the TFT structure specified. In order to implement the model, three semiconductor properties (low‐frequency (static) relative dielectric constant, free electron concentration, and maximum (no trapping) mobility), two structure properties (insulator capacitance density and TFT width‐to‐length ratio), and one physical operating parameter (temperature) must be specified. Optimal TFT mobility performance is achieved when the thickness of the semiconductor channel layer is constrained to be less than 2.22 times the channel layer Debye length such that "short‐base" TFT operation obtains. Additionally, higher mobility TFT performance is obtained by selecting a channel layer with a small electron effective mass, reducing channel layer trap density, reducing channel layer thickness, reducing the free electron concentration, and/or increasing gate capacitance density. [ABSTRACT FROM AUTHOR]

As amorphous oxide semiconductors (AOSs) are hotly pursued for advanced displays, flexible electronics, optoelectronics, and neuromorphic systems, the AOS Schottky barrier diodes (SBDs) have been tried only using the mainstream amorphous InGaZnO (a‐IGZO) and the conservative bottom‐anode structure. To deepen the study on AOS SBDs, the more challenging top‐anode SBD is developed in this work using a versatile but vulnerable AOS, amorphous InZnO (a‐IZO). Unsurprisingly, the Schottky interface defects are seriously increased by the top‐anode process and the defective a‐IZO, which cannot be effectively passivated using the incumbent oxidizing treatments. The hydrogenation is proposed to considerably suppress these annoying interface defects and thus correspondingly reduces the large leakage current, while the hydrogen doping easily deteriorates a‐IGZO SBD. The underlying mechanism of such distinction is revealed to be the tricky interactions between defect and hydrogen in AOSs. Based on the sophisticated utilization of such defect‐hydrogen interplay, the a‐IZO/a‐IGZO stack is hydrogenated together to simultaneously realize a high‐conductivity bulk and low‐defect interface, noticeably enhancing the performance metrics. Such top‐anode SBD based on hydrogenated multilayer AOSs successfully blazes a novel evolution path for AOS SBDs. [ABSTRACT FROM AUTHOR]

Inorganic semiconductors with superior plasticity are highly desired in current flexible electronics, which however are rarely discovered owing to their intrinsic covalent and ionic bonds. The Ag2Te0.6S0.4 semiconductor with an amorphous phase has recently been reported to exhibit plastic deformability. In this study, the reversible brittle‐plastic transition is found in this inorganic semiconductor, and the plasticity of the Ag2Te0.6S0.4 sample is highly related to the phase structures. The Ag2Te0.6S0.4 with a monoclinic phase exhibits a brittle behavior, while the one with cubic‐crystalline/amorphous structure shows exceptional plasticity with a compressive strain of over 80%. Significantly, the reversible plastic‐brittle transition in Ag2Te0.6S0.4 inorganic semiconductor can be achieved by simple heat treatment. Besides the plasticity, the cubic‐crystalline/amorphous Ag2Te0.6S0.4 composites also possess good thermoelectric performance. This study uncovers the influence of phase structure on the mechanical properties of Ag2Te0.6S0.4 and realizes the reversible brittle‐plastic transition, facilitating its prospective application in flexible/wearable electronics. [ABSTRACT FROM AUTHOR]

Under varying growth and device processing conditions, ultrabroadband photoconduction (UBPC) reveals strongly evolving trends in the defect density of states (DoS) for amorphous oxide semiconductor thin‐film transistors (TFTs). Spanning the wide bandgap of amorphous InGaZnOx (a‐IGZO), UBPC identifies seven oxygen deep donor vacancy peaks that are independently confirmed by energetically matching to photoluminescence emission peaks. The subgap DoS from 15 different types of a‐IGZO TFTs all yield similar DoS, except only back‐channel etch TFTs can have a deep acceptor peak seen at 2.2 eV below the conduction band mobility edge. This deep acceptor is likely a zinc vacancy, evidenced by trap density which becomes 5‐6× larger when TFT wet‐etch methods are employed. Certain DoS peaks are strongly enhanced for TFTs with active channel processing damage caused from plasma exposure. While Ar implantation and He plasma processing damage are similar, Ar plasma yields more disorder showing a ≈2 × larger valence‐band Urbach energy, and two orders of magnitude increase in the deep oxygen vacancy trap density. Changing the growth conditions of a‐IGZO also impacts the DoS, with zinc‐rich TFTs showing much poorer electrical performance compared to 1:1:1 molar ratio a‐IGZO TFTs owing to the former having a ∼10 × larger oxygen vacancy trap density. Finally, hydrogen is found to behave as a donor in amorphous indium tin gallium zinc oxide TFTs. [ABSTRACT FROM AUTHOR]

High quality thin film p‐n junction diodes with high rectification ratios and low ideality factors have been fabricated from metal oxides, such as amorphous oxide semiconductors (AOSs), and characterized. Plasma treatment of interfaces has been demonstrated to improve devices made from AOSs, using current–voltage (I–V) measurements. However, capacitance–voltage (C–V) measurements of the devices have been scarcely reported in the literature. Therefore, the focus of this work is characterization of cuprous oxide (Cu2O)/amorphous zinc‐tin oxide (a‐ZTO) thin film heterojunction diodes using C–V analysis. Performance differences of plasma‐treated and untreated diodes that are difficult to observe in I–V analysis are more prominent in C–V analysis. Moreover, C–V analysis allows extraction of charge density profiles, which is a measure of the defect state density that led to intrinsic doping. The variation of doping densities of the untreated diode across the full range of applied reverse bias is shown to be up to 2 orders of magnitude, while those of the treated diodes are within a factor of 10 only. Junction charge profiles, interfacial charge depletion, and accumulation that are key features of rectifying diodes are shown to be clearly distinct between untreated, nitrogen‐treated, and oxygen‐treated diodes, thus explaining why oxygen‐treated diodes are superior. [ABSTRACT FROM AUTHOR]

A fresh approach to thin‐film transistor (TFT) modeling is offered, involving use of the Enz, Krummenacher, Vittoz (EKV) compact model. Accurate TFT simulation requires precise modeling of the drift mobility. The utility of this model is demonstrated via simulation of single‐and dual‐layer amorphous oxide semiconductor TFTs. [ABSTRACT FROM AUTHOR]

Amorphous oxide semiconductor thin‐film transistors (AOS TFTs) are ever‐increasingly utilized in displays. However, to bring high mobility and excellent stability together is a daunting challenge. Here, the carrier transport/relaxation bilayer stacked AOS TFTs are investigated to solve the mobility‐stability conflict. The charge transport layer (CTL) is made of amorphous In‐rich InSnZnO, which favors big average effective coordination number for all cations and more edge‐shared structures for better charge transport. Praseodymium‐doped InSnZnO is used as the charge relaxation layer (CRL), which substantially shortens the photoelectron lifetime as revealed by femtosecond transient absorption spectroscopy. The CTL and CRL with the thickness suitable for industrial production respectively afford minute potential barrier fluctuation for charge transport and fast relaxation for photo‐generated carriers, resulting in transistors with an ultrahigh mobility (75.5 cm2 V−1 s−1) and small negative‐bias‐illumination‐stress/positive‐bias‐temperature‐stress voltage shifts (−1.64/0.76 V). The design concept provides a promising route to address the mobility‐stability conflict for high‐end displays. [ABSTRACT FROM AUTHOR]

The energetic disorder has been known for decades to limit the performance of structurally disordered semiconductors such as amorphous silicon and organic semiconductors. However, in the past years, high‐performance organic solar cells have emerged showing a continuously reduced amount of energetic disorder. While searching for future high‐efficiency material systems, it is therefore important to correctly characterize this energetic disorder. While there are several techniques in the literature, the most common approaches to probe the density of defect states are using optical excitation as in external quantum efficiency measurements, or sequential filling of the tail states by applying an external voltage as in admittance spectroscopy. A metanalysis of available literature, as well as the experiments using four characterization techniques on two material systems, reveal that electrical, voltage‐dependent measurements frequently yield higher values of energetic disorder than optical measurements. With drift‐diffusion simulations, it is demonstrated that the approaches probe different energy ranges of the subband‐gap density of states. The limitations of the techniques are further explored and it is found that extraction of information from a capacitance‐voltage curve can be inhibited by internal series resistance. Thereby, the discrepancies between measurement techniques with sensitivity to different energy ranges and electronic parameters are explained. [ABSTRACT FROM AUTHOR]

Amorphous Cu–Sn–I is a promising p‐type transparent semiconductor. Therefore, herein, composition and structure of sputtered Cu–Sn–I thin films with varying thickness and Sn content are investigated by different electron microscopy techniques, energy‐dispersive X‐ray spectroscopy, and X‐ray absorption spectroscopy at the Cu, Sn, and I K‐edge. After exposure to air, the sputtered films are found to contain significant amounts of oxygen, leading to a complete phase separation of the resulting Cu–Sn–I–O films. Spatially‐resolved compositional analysis and high‐resolution transmission electron microscopy reveal that one phase consists of crystalline γ‐CuI while the other phase is composed of amorphous Cu–Sn–O, most likely a mixture of SnO2 and Cu2O/CuO. X‐ray absorption spectroscopy confirms that the local structural environment of the Sn and I atoms is similar to that in amorphous SnO2 and crystalline CuI, respectively. In contrast, the X‐ray absorption near edge structure and the extended X‐ray absorption fine structure of the Cu K‐edge both demonstrate that Cu atoms are not only bonded to I but also to O atoms. The incorporation of oxygen into the sputtered films thus completely alters the material and therefore clearly needs to be inhibited. [ABSTRACT FROM AUTHOR]

We report the effects of sputter‐based multi‐stack interlayer on the electrical contact properties of a‐IGZO TFTs. The a‐IGZO TFTs with a multi‐stack interlayer of TiN and IGTO showed remarkable outcomes, including the lowest specific contact resistivity (ρC) and the highest field‐effect mobility (μFET). This research suggests a highly effective approach to reduce the contact resistivity of oxide semiconductors by nearly two orders magnitude. [ABSTRACT FROM AUTHOR]

Quantum dot (QD) hybrid phototransistors based on high‐mobility channel semiconductors have attracted great interest due to their outstanding photonic characteristics with diverse and broadband optoelectronic functionalities. However, difficulties for precise control of electronic coupling between QD particles and lack of QD/semiconductor interface analysis have limited the use of these platforms into practical optoelectronic applications. Here, the authors report a new strategy to high‐performance phototransistors based on CdSe QD/amorphous oxide semiconductor heterostructures using trap‐reduced chelating chalcometallate surface ligands by optimizing the QD layer thickness and interface engineering to enhance photogenerated charge transfer properties. Furthermore, based on performance parameters extracted from experimental structure and electrical characteristics, Technology Computer‐Aided Design (TCAD) modeling reveals carrier flow between the QDs in the semiconductor layer in agreement with various spectroscopic data. These modeling results indicate that interface engineering of QD with chalcometallate ligand results in very efficient photo‐induced charge transfer characteristics. Thus, high‐performance chalcometallate ligand QD‐based phototransistors are successfully realized with enhanced responsivity (2.12 × 104 A W−1) and photodetectivity (2.74 × 1016 Jones) compared with conventional monodentate ligand functionalized (SCN−) QD‐based devices (8.79 × 103 A W−1 and 8.8 × 1010 Jones, respectively). This is the demonstration of systematic analysis of QD‐based hetero‐structured phototransistors with light‐mediated interfacial physical modeling and electrochemical measurement. [ABSTRACT FROM AUTHOR]

The large‐area low‐temperature processing capability and versatile characteristics of amorphous oxide semiconductor (AOS) thin‐film transistors (TFTs) are highly expected to promote the developments of next‐generation displays, 3D integrated circuit (3DIC), flexible chips, and electronics. However, the abundant native defects in AOSs engrain an inherent trade‐off between high mobility and trustworthy stability in AOS TFTs, fundamentally limiting the performance metrics and integration scale of oxide‐based electronics. To surmount this obstacle, the bilayer AOS channel is highly expected to combine the merits of diversified AOSs, while the efficiency of such an AOS "heterojunction" is debatable. This work systematically compares the TFTs based on amorphous InGaZnO (a‐IGZO), amorphous InZnO (a‐IZO), and a‐IZO/a‐IGZO bilayer. The active cation interaction between metal‐oxide semiconductors gives rise to a mixed AOS layer rather than a heterojunction channel, corresponding to moderate performance metrics. Such a spontaneous cation interdiffusion is effectively prevented using a dense metal‐oxide dielectric interlayer, aluminum oxide (AlOx). The sharpened interface effectively forms an abrupt metal‐oxide heterojunction, while the electron can still tunnel through the ultrathin AlOx to create a quantum well of 2D electron gas (2DEG). The overall performance and reliability of multilayer AOS TFT are synergistically enhanced using the proposed abrupt metal‐oxide heterojunction architecture. [ABSTRACT FROM AUTHOR]

Amorphous oxide semiconductor thin‐film transistors (AOS TFTs) have shown significant potential in the applications of increasingly advanced transparent and flexible electronic devices, where high speed, high transparency, and low power consumption are highly demanded. Yet, typical back‐channel etch (BCE) configuration used in the majority of TFTs still suffers from poor gate controllability, severe electrical field dispersion, relatively large parasitic capacitance and contact resistance. Here, a new embedded structure for TFTs with self‐alignment and even simpler fabrication process, outperforming conventional BCE counterpart in above aspects, is proposed in this work. More concentrated electrical field, improved gate control ability accompanied with lower contact resistance are achieved in the embedded TFTs. Consequently, superior electrical characteristics with subthreshold swing of 106.7 mV dec−1 and mobility as high as 32.10 cm2 V−1 s−1 are obtained. In addition, leakage current as well as contact resistance evidently decline compared to that in traditional BCE TFTs. By the assistance of Silvaco TCAD simulation, the performance and mechanism behind are cross‐validated from another perspective. Overall, such embedded configuration has equipped TFTs with appealing performance and it is also possible to enable other devices exploiting such structure with new possibility and thus a broader application. [ABSTRACT FROM AUTHOR]

Artificial synapses, such as ferroelectric field‐effect transistors, aspire the brain‐like computation in real life and are likely to replace conventional computing methods in the future. Amorphous SiZnSnO (a‐SZTO)‐based ferroelectric field‐effect transistor is fabricated using the organic poly(vinylidene fluoride‐trifluoroethylene) P(VDF‐TrFE) ferroelectric gate insulating layer. First, the ferroelectric properties of P(VDF‐TrFE) are analyzed depending on the crystallization temperature for artificial synaptic transistor applications. The ferroelectricity becomes prominent with the evolution of the β‐phase till 140 °C and degrades thereafter. The a‐SZTO‐based ferroelectric field‐effect transistors employing P(VDF‐TrFE) show anticlockwise hysteresis, typical for a ferroelectric field‐effect transistor. The nonlinearity for the potentiation and depression and the dynamic range is confirmed to be increased with higher β‐phase concentration. The rise in the concentration is related to the elevated thermodynamic stability of the β‐phase between curie temperature and the melting point. Utilizing the parameters obtained from the a‐SZTO‐P(VDF‐TrFE) synaptic transistor, the simulation studies exhibit a high recognition rate of 86.8%, which makes it a promising candidate for artificial intelligence applications. [ABSTRACT FROM AUTHOR]

Memristor crossbar arrays can compose the efficient hardware for artificial intelligent applications. However, the requirements for a linear and symmetric synaptic weight update and low cycle‐to‐cycle (C2C) and device‐to‐device variability as well as the sneak‐path current issue have been delaying its further development. This study reports on a thin‐film amorphous oxide‐based 4×4 1‐transistor 1‐memristor (1T1M) crossbar. The a‐IGZO crossbar is built on a flexible polyimide substrate, enabling IoT and wearable applications. In the novel framework, the thin‐film transistor and memristor are fabricated at the same level, with the same processing steps and sharing the same materials for all layers. The 1T1M cells show linear and symmetrical plasticity characteristic with low C2C variability. The memristor performs like an analog dot product engine and vector–matrix multiplications in the 4×4 crossbars is demonstrated experimentally, in which the sneak‐path current issue is successfully suppressed, resulting in a proof‐of‐concept for a cost‐effective, flexible artificial neural networks hardware. [ABSTRACT FROM AUTHOR]

The degradation and breakdown behaviors of top‐gate self‐aligned a‐InGaZnO thin‐film transistors (TFTs) under dynamic current stresses (DCSs) were systematically investigated. Both linear‐ and saturation‐regime DCSs were found to be capable of causing the self‐heating degradations, including the negative shift of threshold voltage, the increase of subthreshold slope and drain current. While the linear DCS eventually forms a conductor‐like channel, the saturation DCS causes an additional hot carrier (HC) effect to form a defective drain regions of high energy barrier, disconnecting the �conductor channel� from the drain side. [ABSTRACT FROM AUTHOR]

The low‐temperature‐processed amorphous oxide semiconductors (AOSs) exhibit remarkable potentials in large‐area, flexible, and hybrid‐integrated electronics, while the performance and stability of AOS devices highly depend on the proper manipulation of abundant native defects in AOS, especially for AOS Schottky barrier diode (SBD) with the naturally defective metal–semiconductor interface. Here, a hydrogenated‐InGaZnO SBD with a hydrogen‐rich passivation layer (PL) is reported. With the hydrogenation effectively suppressing interface defects and meanwhile donating electrons, a near‐ideal Schottky contact and more‐conductive drift region are simultaneously achieved, as proven by the perfect ideality factor of 1.08, a Schottky barrier height of 0.87 eV, a high rectification ratio ≈4.5 × 108. Moreover, such sophisticated hydrogenation is self‐stabilized by the bilayer structure of PL, contributing to the record‐high stabilities under harsh environmental and electrical stresses. [ABSTRACT FROM AUTHOR]

The development of the next‐generation display technologies requires thin‐film transistors (TFTs) with high mobility and good negative‐bias‐illumination stress (NBIS) stability. Here, a tetravalent‐terbium‐doped indium oxide (Tb:In2O3) semiconductor is reported, which can effectively improve the NBIS stability of the TFT while ensuring high mobility. The TFT with Tb:In2O3 channel layer exhibited remarkable performance with a saturation mobility of 45.0 cm2 V–1 s–1 (with average mobility of 38.6 cm2 V–1 s–1), a turn‐on voltage (Von) of −1.1 V, and an on‐off current ratio of 108. In addition, the Tb:In2O3 TFT showed greatly improved NBIS stability with Von shift (ΔVon) of −3.9 V (with average ΔVon of 4.0 V) under 3600 s stress with −20 V gate voltage and white light illumination (compared to ΔVon of −11.7 V for the pure In2O3 TFT). Comprehensive studies reveal that the effective improvement of NBIS stability after Tb4+ doping is mainly attributed to the wide‐band absorption of the incident blue light by the Tb4f 7—O2p6 to Tb4f 8—O2p5 charge transfer (CT) transition that has smaller overall lattice expansion/contraction and shorter relaxation time compared to VO ionization. [ABSTRACT FROM AUTHOR]

The energy band dependent mobility in heterojunction amorphous oxide semiconductor thin‐film transistors (TFTs) is investigated. Results indicate that both of the energy band configurations with potential well (PW) and barrier (PB) formation could allow TFT with high‐mobility operation. Specifically, TFT with PW only exhibits high mobility when the gate electric field direction is consistent with that of build‐in electric field in PW, whereas TFT with PB could exhibit high mobility no matter what the electric field direction configuration is. [ABSTRACT FROM AUTHOR]

The tellurium (Te)‐doped Ag60‐xSe40Tex (x = 0%, 5%, 10%, 15%) thin films of thickness ∼800 nm were prepared from the bulk sample by thermal evaporation method on a glass substrate. The X‐ray diffraction study revealed the amorphous nature of the films whereas the change in vibrational modes was noticed from the Raman spectroscopy. The composition of the films was verified by energy dispersive X‐ray analysis and the surface morphology pictures were taken by field emission scanning electron microscopy and atomic force microscope. The changes in optical properties (linear and non‐linear) with Te addition were studied from UV‐Visible spectroscopy data and related empirical formulas. The addition of Te reduced the bandgap values significantly and the reduction in transmission resulted in the increase of the linear refractive index. The decrease in optical bandgap is due to an increase in disorder while the width of the tail in the gap increased with Te%. The optical density, dispersion energy, extinction coefficient, carrier concentration, dielectric constant, oscillator wavelength increased while the oscillator energy, oscillator strength, optical electronegativity decreased with Te content. The electrical susceptibility increased with Te content. The non‐linear susceptibilities and the non‐linear refractive index increased which is good for the nonlinear photonic devices. [ABSTRACT FROM AUTHOR]

To provide a unique opportunity for on‐chip scaled bioelectronics, a symmetrically gated metal‐oxide electric double layer transistor (EDLT) with ion‐gel (IG) gate dielectric and simple in‐plane Corbino electrode architecture is proposed. Using amorphous indium‐gallium‐zinc oxide (a‐IGZO) semiconductor and IG dielectric layers, low‐voltage driven EDLTs with high ionotronic effects can be realized. More importantly, in contrast to the conventional asymmetric rectangular EDLTs which can cause non‐uniform potential variation in the active channel layer and eventually degrade the sensing performance, the new symmetrical in‐plane type EDLTs achieve high and spatially uniform ion responsive behaviors. The symmetrically gated a‐IGZO EDLTs exhibited a responsivity of 129.4% to 5 ppm mercury (Hg2+) ions which are approximately three times higher than that with conventional electrode structure (responsivity of 38.5%). To confirm the viability of the new device architectures and the findings, the detailed mechanism of the symmetric gating effects in the in‐plane EDLTs with a variety of electrical characterization and 3D fine element analysis simulations is also discussed. [ABSTRACT FROM AUTHOR]

Chalcogenide glasses have been widely adopted as a material platform for achieving reconfigurable metamaterials and metasurfaces, primarily through exploiting nonvolatile phase transitions inherent to these semiconductors. In such devices, the atomic lattice of the nanostructured medium reversibly changes between amorphous and crystalline phases, invoked through an energy‐intensive melt/quench process that can reduce device endurance due to chemical and geometrical drift. Metal‐doped amorphous chalcogenide semiconductors (MdACs) exhibit a directional photoinduced movement of their constituent metal‐ions when exposed to light with a photon energy equivalent or higher than the bandgap of the host chalcogenide glass. This "photoionic" movement results in nonvolatile changes of refractive index and conductivity at the nanoscale enabling a nonvolatile, nonbinary dynamic modulation of light removing the need for a phase transition. It is shown here that this photoionic movement in silver‐doped amorphous germanium selenide metasurfaces enables reversible optical switching. Understanding and integrating the photoionic mechanism within various optoelectronic device platforms presents significant potential for realizing a range of nonvolatile optically reconfigurable nanophotonic devices for emerging display, data storage, and signal processing applications. [ABSTRACT FROM AUTHOR]

The present paper investigated the influence of Bi concentration on the structural, linear, and non‐linear optical properties of thermally evaporated BixIn35‐xSe65 (x = 0, 5, 7, 10, 15 at %) thin films. The structural analysis by the XRD measurements showed the crystalline nature at 7 and 15% Bi while the other concentrations showed amorphous nature. The corresponding bonding change was analyzed by Raman spectroscopy. The optical study by UV‐Vis spectroscopy showed the decrease in transmittance and an increase in absorbance property. The linear optical parameters such as absorption coefficient, extinction coefficient, optical density increased while skin depth decreased with Bi additives. The direct, as well as the indirect optical bandgap, decreased along with the decrease in the Tauc parameter. The variation is well explained on the basis of density of defect states by the Mott and Davis model. The non‐linear refractive index and non‐linear susceptibility increased significantly with Bi % which is good for non‐linear optical applications. The static linear refractive index as calculated by the Dimirov and Sakha empirical relation showed an incremental behavior with Bi% concentration and satisfied Moss's rule. The surface structure and elemental concentration were analyzed by FESEM and EDX analysis. The result of the above investigation suggests that these materials can be used as an absorbing layer for several optoelectronic and photonic applications. [ABSTRACT FROM AUTHOR]

The hole mobility of an organic semiconductor film that consists of N,N'‐di (1‐naphthyl)‐N,N'‐diphenyl‐benzidine (α‐NPD) is evaluated at various film formation processes, such as vacuum deposition and capillary injection. The mobility varies with the film formation process. From the temperature dependence of mobility, the Poole−Frenkel model and disorder model are discussed. From the analysis based on the Poole−Frenkel model, activation energies of the vacuum‐deposited film, the slowly cooled‐melted film, and the rapidly cooled‐melted film are 0.28, 0.20, and 0.40 eV, respectively. This result suggests that organic semiconductor thin films formed by different film formation methods have different molecular aggregation states. [ABSTRACT FROM AUTHOR]

As solid‐state light sources based on amorphous organic semiconductors, organic light‐emitting diodes (OLEDs) are widely used in modern smartphone displays and TVs. Due to the dramatic improvements in stability, efficiency, and brightness achieved over the last three decades, OLEDs have also become attractive light sources for compact and "imperceptible" biomedical devices that use light to probe, image, manipulate, or treat biological matter. The inherent mechanical flexibility of OLEDs and their compatibility with a wide range of substrates and geometries are of particular benefit in this context. Here, recent progress in the development and use of OLEDs for biomedical applications is reviewed. The specific requirements that this poses are described and compared to the current state of the art, in particular in terms of the brightness, patterning, stability, and encapsulation of OLEDs. Examples from several main areas are then discussed in some detail: on‐chip sensing and integration with microfluidics, wearable devices for optical monitoring, therapeutic devices, and the emerging use in neuroscience for targeted photostimulation via optogenetics. The review closes with a brief outlook on future avenues to scale the manufacturing of OLED‐based devices for biomedical use. [ABSTRACT FROM AUTHOR]

Flash pyrolysis, which combines conventional pyrolysis with flash sintering, was first conducted to produce polymer derived SiC‐TiC nanocomposites. Pre‐pyrolysis at 800℃ allows the conversion from titanium isopropoxide (TTIP) modified polysiloxane to an amorphous SiTiOC ceramic. The subsequent application of an electric field gives rise to the formation of turbostratic carbon and creates Joule heating to obtain a sample internal temperature of ~1400℃. The precipitation of β‐SiC, TiC, as well as titanium oxides is realized upon carbothermal reduction of extensively phase separated SiO2 and TiO2 with carbon. Increasing TTIP content embodies the nanocomposites with prominent electrical percolation behaviors. The electrical transport of the synthesized ceramics follows an amorphous semiconductor mechanism. High thermal stability in air is guaranteed, thanks to the in‐situ formed TiC nanocrystals and preferentially reduced amorphous carbon. Flash pyrolyzed nanocomposite with a Ti:Si molar ratio of 0.20 exhibits the highest electrical conductivity (0.696 S/cm) and minimum mass change (~2%) at 1000℃, serving as a competitive candidate for electro‐discharge machining (EDM) applications or self‐standing conducting devices that must withstand high temperature conditions. [ABSTRACT FROM AUTHOR]

Thin‐film transistors (TFTs) based on amorphous indium‐gallium‐zinc‐oxide (a‐IGZO) have attracted vast attention for use in organic light‐emitting diode (AMOLED) displays due to their high electron mobility and large current on–off ratio. Although amorphous oxide semiconductors show considerably less threshold voltage (Vth) variation than poly‐silicon, large‐area processing and degradation effects can impede the characteristic parameters of a‐IGZO TFTs, which manifests in an uneven brightness distribution across the display panel. Such Vth variations are usually reduced by additional compensation circuits consisting of TFTs and capacitors. Herein, a new approach to compensate such variabilities is demonstrated: the integration of a programmable ferroelectric (FE) film in the gate stack of the TFT. This simplifies the complexity of the pixel cell and potentially minimizes the need for compensation circuits, which is crucial for transparent displays. To test this new approach, fully integrated FE‐TFTs (i.e., with vias contacting a structured bottom gate electrode from the top) based on a‐IGZO and FE hafnium‐zirconium oxide (HZO) are developed. A single low‐temperature post‐fabrication treatment at 350 °C for 1 h in air is used to simultaneously crystallize the HZO film in the FE phase and to reduce the number of defects in the a‐IGZO channel. The structural and electrical characterizations provide comprehensive guidance for the design of effective FE‐TFT gate stacks and device geometries. An accurate control of the polarization state and linear switching between multiple intermediate states is shown by using programming pulses of various amplitudes and widths. Furthermore, a direct correlation between the channel length and the applied pulse width for programming is observed. [ABSTRACT FROM AUTHOR]

Recently, amorphous oxide semiconductors (AOSs) have attracted much attention owing to their various advantages. The intrinsic nature of AOSs enables to achieve high‐performance thin‐film transistors (TFTs) using low‐temperature process, which would be a strong point for next‐generation flexible electronics. However, most AOS TFTs still require postannealing treatments (>300 °C) for structural relaxation to suppress defects, which lead to the issue of thermal resistance of plastic substrates. Therefore, a strategy for obtaining both low‐temperature process and defect suppression is highly demanded for flexible electronics. To solve the former issue, a Sn–Si–O system is proposed in this paper. It is clarified that Si cations play the roles of amorphousizing SnO2 and suppressing carrier concentration. As a result, room‐temperature fabricable flexible Sn–Si–O TFTs with high mobility and high reliability are demonstrated. It is also suggested that obtaining a rigid film structure is quite important to fabricate high performance TFTs without any further postannealing treatment. The obtained saturation mobility (μsat) and on/off ratio are 7.59 cm2 V−1 s−1 and 1.59 × 107, respectively. This work suggests that amorphous Si doped SnO2 has the potential for the application to the flexible driving backplane in display industry. [ABSTRACT FROM AUTHOR]

We investigated amorphous metal‐oxide semiconductor based electronics for flexible and stretchable applications. In particular, we demonstrated a‐IGZO and SWCNT hybrid flexible amplifiers on PI substrate. Also, mesa structured a‐IGZO TFTs showed stable electrical operation under 125 μm bending radius up to 10000 cycles, enabling ultra‐flexible 7‐stage ring oscillator circuit. [ABSTRACT FROM AUTHOR]

The Hf‐doped indium zinc tin oxide (Hf:InZnSnO) channel for high performance and stable transparent thin film transistors (TFTs) is developed by using a simultaneous cosputtering of InZnSnO and HfO2 targets. The effects of In and Hf composition in Hf:InZnSnO channel on the performance and stability under bias stress for the Hf:InZnSnO channel‐based TFTs are investigated. Herein, the In cations enhance the electrical properties, while the Hf cations reduce the oxygen vacancies in the Hf:InZnSnO channel layer. Adjusting the atomic ratio of In of the InZnSnO target improves the performance of the Hf:InZnSnO‐based TFTs, while introducing an adequate amount of HfO2 improves the bias stabilities and hysteresis characteristics of the Hf:InZnSnO‐based TFTs. The transparent TFT with optimized Hf:InZnSnO channel, with a stoichiometry of Hf0.27In25.96Zn6.99Sn6.16O60.62, that is cosputtered at RF power of 100 W applied to InZnSnO target (In:Zn:Sn = 4:1:1 at%), and RF power of 50 W applied to HfO2 target exhibits a field effect mobility of 11.84 cm2 V−1 s−1 and low shift of threshold voltage of less than 2.5 V under bias stress for 3000 s. The high performance and stability of the Hf:InZnSnO channel‐based TFTs demonstrate the feasibility of transparent TFTs‐related next‐generation display applications. [ABSTRACT FROM AUTHOR]

This report is on the electrical properties of all‐amorphous junction field‐effect transistors (JFETs) based on n‐type zinc oxynitride (ZnON) as a channel material and room‐temperature deposited p‐type ZnCo2O4 (ZCO) as a heterojunction gate. Devices with different channel thicknesses are thereby compared. Best devices with 48 nm channel layer thickness achieve drain current on/off–ratios of 105 and low subthreshold swing of 134 mV dec−1 within a gate voltage sweep of less than 2 V. The channel mobility extraction is reliable for 90 nm‐thick channels yielding saturation mobility values over 50 cm2 V−1 s−1. For JFETs with 48 nm‐thick channels an overestimation of the saturation mobility due to deviations from the ideal transistor characteristics is determined. [ABSTRACT FROM AUTHOR]

A charge‐trap flash (CTF) device is fabricated using atomic‐layer‐deposited zinc tin oxide (ZTO) as an n‐type amorphous oxide semiconductor (AOS) channel layer and its program/erase characteristics are examined. When a positive voltage of 20 V is applied to the gate electrode, electrons are fluently injected into the adopted SiNx charge trap layer, resulting in a program operation showing a threshold voltage (Vth) shift of 3.7 V. However, even when −20 V is applied for up to 10 s, the trapped electrons are not detrapped. Instead, it is possible to recover Vth to its initial value only by the irradiation of white light. To understand this phenomenon, a ZTO CTF device is modeled using the technology computer‐aided design (TCAD) simulation package. The high hole injection barrier between the source/drain and the ZTO channel prohibits hole injection, which is the cause of the inefficient erasing. It is also confirmed that an AOS CTF with sufficient program and erase speed would be limited by the inherent energy band structure of AOS with its wide bandgap of over 3 eV. An alternative method of using the fringing field effect according to channel length scaling is proposed. [ABSTRACT FROM AUTHOR]

This study presents a novel high gain operational amplifier (op‐amp) and a comparator using n‐type all enhancement amorphous indium‐gallium‐zinc‐oxide (a‐IGZO) thin‐film transistors (TFTs). The proposed op‐amp employs regulated cascode topology in conjunction with capacitive bootstrap load, which enhances the gain to 159.87% (V/V) as compared to op‐amp with bootstrapping load. In addition, common mode feedback is introduced in the circuit which improves the common‐mode rejection ratio (CMRR) of the amplifier without hampering the output voltage swing. The proposed op‐amp offers a voltage gain of 46.2 dB, phase margin of 67°, CMRR of 51.8 dB, unity gain frequency of 215 kHz and power consumption of 0.22 mW. Furthermore, a novel comparator circuit at a clock frequency of 50 kHz is reported. The power consumption of the circuit is 0.248 mW and it can discriminate a minimum voltage of 50 mV. The performance of the proposed circuits is demonstrated using an analytical model of a‐IGZO in Cadence environment with a channel length of 20 µm at a supply voltage of 10 V. Further with the help of the circuits reported in this work, many sensing systems of practical importance can be developed, such as smart packaging and bio‐medical wearable devices using flexible electronics. [ABSTRACT FROM AUTHOR]

Thin‐film transistors (TFTs) based on transparent amorphous oxide semiconductors (TAOSs) have become essential building blocks for a broad range of electronics, since TAOSs facilitate large‐scale fabrication at moderate temperatures and hence feature compatibility with flexible substrates. An emerging indium‐free alternative to the widely commercially exploited indium gallium zinc oxide (IGZO) is amorphous zinc tin oxide (ZTO); however, according to previous reports, achieving acceptable performance of ZTO‐based devices fabricated at temperatures below 300 °C is still challenging to date. Here, key properties of the first all‐oxide and fully transparent metal‐semiconductor field‐effect transistors (MESFETs), metal‐insulator‐semiconductor field‐effect transistors (MISFETs) and junction field‐effect transistors (JFETs) based on amorphous ZTO are compared, employing PtOx, HfOy, and p‐type NiO as gate, respectively. All individual layers have been deposited exclusively at room temperature and do not require any additional postdeposition annealing to obtain sufficient device functionality. Demonstrated TFTs exhibit reasonable current on/off ratios of over six orders of magnitude with subthreshold swings as low as 61 mV dec–1 at room temperature. Transistor characteristics have been recorded for several weeks to study performance consistency over time and are further investigated regarding their stability under bias stress. [ABSTRACT FROM AUTHOR]

Amorphous indium‐gallium‐zinc‐oxide (a‐IGZO) based memristive devices with molybdenum contacts as both top and bottom electrodes are presented aiming to be used in neuromorphic applications. Devices down to 4 µm2 are fabricated using conventional photolithography processes, with an extraordinary yield of 100%. X‐ray photoelectron spectroscopy and transmission electron microscopy performed on the developed structures confirm the presence of a thin intermixed oxide layer (4–5 nm) containing Mo6+ oxidation state at the interface with the bottom contact. This results in Schottky diode‐like characteristics at the pristine state with a rectification ratio of 3 orders of magnitude. The devices have electroforming‐free and area‐dependent analog resistive switching properties. Temperature analysis of resistive switching I–V data reveals barrier height variations of the junction. Several synaptic functions, such as synaptic potentiation and depression as response to programmed pulses, short‐ to long‐term plasticity transition (STP to LTP) and "learning experience" properties are presented. The Mo/IGZO/Mo memristive device shows potential application of an electronic synapse for brain‐inspired computing application. Integration in System‐on‐Panel architectures is possible at negligible cost, because all materials are used in commercial IGZO thin‐film transistor fabrication. [ABSTRACT FROM AUTHOR]

The accumulation of dust on any given photovoltaic (PV) module surface depends on the type of dust, environment, surroundings, weather, module properties, and its installation design. In this research, equations were developed for the preliminary evaluation and comparison of the reduction in power from PV modules because of dust soiling. Use of these equations shows that dust accumulation decreases solar irradiance and thus the power output of modules, and that there is a linear relationship between the power output degradation and density or amount of accumulated dust. The equations can be used to conduct analysis of average photon energy and the PV module power output reduction from accumulated dust. The study also showed that type of PV module can also affect the degree of power output reduction. The amorphous silicon PV modules are more affected compared to poly crystalline silicon PV modules as the latter has a spectrum response which still has the range that can produce full energy and therefore, dust soiling has lesser impact on them. PV power plants should regularly clean the modules, if not, production of electricity decreases, and so too the revenue from selling electricity, making the payback of the power plant longer. [ABSTRACT FROM AUTHOR]

Recently, Jun et al. (Adv. Mater.2018, 30, 1706573) reported Sn‐doped amorphous phases of CuI (a‐CuI) as a new class of transparent p‐type semiconductors. It is surprising that high mobilities are found despite amorphous structures tend to localize carriers, particularly the directional p orbitals of anions. To reveal the microscopic origin of the new p‐type amorphous semiconductors, density functional theory calculations are performed, and structural and electrical properties of a‐CuI are investigated. Amorphous models from melt‐quench simulations consist of structural motifs that resemble local orders in crystalline polymorphs of CuI. Despite the absence of translational symmetry, states at valence band maximum (VBM) are substantially extended in linear ways due to the hybridization between I‐5p states, explaining the high hole mobilities in the experiment. Sn‐doped a‐CuI is also investigated and it is found that Sn atoms stabilize the amorphous structure without disturbing the hole transport. Furthermore, results on nonstoichiometric models show that Cu‐deficiency increases the hole concentration in a‐CuI and also enhances the delocalization of VBM states, which is consistent with the experimental observation that the hole mobility increases with doping concentrations. Herein, the origin of hole conduction in amorphous CuI is enlightened, which is believed to contribute in the development of high‐performance p‐type amorphous materials. [ABSTRACT FROM AUTHOR]

This study presents a novel voltage‐programmed, amorphous‐indium–gallium–zinc oxide (a‐IGZO) thin‐film transistor (TFT)‐based active‐matrix organic light‐emitting diode (AMOLED) pixel circuit. The circuit utilises the threshold voltage (VTH) sensing ability of a diode‐connected transistor to compensate for the spatial as well as the temporal variation of the threshold voltage of the driving transistor and supply a constant current to the OLED. The circuit has been simulated in Cadence Spectre using a‐IGZO TFT and OLED simulation program with integrated circuit emphasis (SPICE) models, and the analysis is presented to prove the VTH compensating capability of the proposed circuit. For small currents, about 50nA, the error is suppressed to <9% whereas for large currents, about 2.5 µA, the error is only 1.05%. This performance has been achieved using only five TFTs and two storage capacitors. [ABSTRACT FROM AUTHOR]

We investigated high‐performance amorphous metal‐oxide semiconductor based optoelectronics using low‐temperature and solution process technologies. In particular, metal‐oxide and quantum dots hybrid phototransistors exhibited ultra‐high photodetectivity up to 4×1017Jones in a broad range of detection wavelength from ultraviolet to infrared ranges. In addition, we employed artificial visual perception circuit based on metal‐oxide synaptic transistors with metal chalcogenide semiconductors for optoelectronic neuromorphic devices. We also demonstrated large‐scaled ultra‐flexible and stretchable device showing promising next‐generation wearable optoelectronics. [ABSTRACT FROM AUTHOR]