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Purpose Active matrix flat-panel imagers, which typically incorporate a pixelated array with one a-Si:H thin-film transistor (TFT) per pixel, have become ubiquitous by virtue of many advantages, including large monolithic construction, radiation tolerance and high DQE. However, at low exposures such as those encountered in fluoroscopy, digital breast tomosynthesis and breast computed tomography, DQE is degraded due to the modest average signal generated per interacting x-ray relative to electronic additive noise levels of ~1000 e, or greater. A promising strategy for overcoming this limitation is to introduce an amplifier into each pixel, referred to as the active pixel (AP) concept. Such circuits provide in-pixel amplification prior to readout as well as facilitate correlated multiple sampling, enhancing signal-to-noise and restoring DQE at low exposures. In this study, a methodology for theoretically investigating the signal and noise performance of imaging array designs is introduced and applied to the case of AP circuits based on low-temperature polycrystalline silicon (poly-Si), a semiconductor suited to manufacture of large area, radiation tolerant arrays. Methods Computer simulations employing an analog circuit simulator and performed in the temporal domain were used to investigate signal characteristics and major sources of electronic additive noise for various pixel amplifier designs. The noise sources include photodiode shot noise and resistor thermal noise, as well as TFT thermal and flicker noise. TFT signal behavior and flicker noise were parameterized from fits to measurements performed on individual poly-Si test TFTs. The performance of three single-stage and three two-stage pixel amplifier designs were investigated under conditions relevant to fluoroscopy. The study assumes a 20×20 cm2, 150 μm pitch array operated at 30 fps and coupled to a CsI:Tl x-ray converter. Noise simulations were performed as a function of operating conditions, including sampling mode, of the designs. The total electronic additive noise included noise contributions from each circuit component. Results The total noise results were found to exhibit a strong dependence on circuit design and operating conditions, with TFT flicker noise generally found to be the dominant noise contributor. For the single-stage designs, significantly increasing the size of the source-follower TFT substantially reduced flicker noise -NDASH- with the lowest total noise found to be ~574 e [rms]. For the two-stage designs, in addition to tuning TFT sizes and introducing a low-pass filter, replacing a p-type TFT with a resistor (under the assumption in the study that resistors make no flicker noise contribution) results in significant noise reduction -NDASH- with the lowest total noise found to be ~336 e [rms]. Conclusions A methodology based on circuit simulations which facilitates comprehensive explorations of signal and noise characteristics has been developed and applied to the case of poly-Si AP arrays. The encouraging results suggest that the electronic additive noise of such devices can be substantially reduced through judicious circuit design, signal amplification and multiple sampling. This methodology could be extended to explore the noise performance of arrays employing other pixel circuitry such as that for photon counting as well as other semiconductor materials such as a-Si:H and a-IGZO. This article is protected by copyright. All rights reserved.

In this letter, W-band mixers (resistive and diode mixers) are designed using a 0.15 μm GaAs pseudo-morphic high electron mobility transistor process for frequency-modulated continuous wave radars. The measurement shows that both mixers can achieve a good conversion gain of −9 dB with high linearity performance. In addition, noise figures (NFs) of both mixers are measured especially at low intermediate frequency (IF) using a gain method. The resistive mixer exhibits 10.3–11.2 dB lower NF than the diode mixer at low IF from 100 kHz to 1 MHz. This result is also supported by the measurement of the flicker noise of HEMT and diode at each operating bias condition. © 2016 Wiley Periodicals, Inc. Microwave Opt Technol Lett 59:275–278, 2017

Correlated double-sampling CDS is widely used to suppress the effect of flicker noise in switched-capacitor SC circuits. Once the flicker noise is suppressed by CDS, the noise of the SC circuits is ultimately determined by the thermal noise. In this work, we develop a method to calculate the thermal noise in SC integrators as functions of a variety of circuit parameters such as capacitor size and switch resistance; this methodology is then applied to a CDS integrator as well as a conventional integrator. We found that for the CDS integration scheme, in order to avoid significantly increasing the noise power of the integrator, the size of the CDS capacitor should be comparable to that of the sampling capacitor. We also found that if the CDS capacitor is sufficiently large, the noise power of a CDS integrator is almost the same as that of a conventional integrator with the same sampling capacitor size. These findings are explained based on the bandwidth of the transfer functions. Copyright © 2016 John Wiley & Sons, Ltd.

This letter presents the design and measurement of high OIP3, low flicker noise double-balanced Gilbert cell down conversion mixer in CMOS process. The key features of proposed mixer are dynamic current injection and derivative superposition. Since the flicker noise (1/f noise) have a strongly affect mixer's noise figure (NF), a dynamic current injection is used to reduce the flicker noise. The derivative superposition method has an auxiliary common gate stage of radio-frequency (RF) input stage to cancel each third order intermodulation distortion (IMD3) and can provide a high third order output intercept point (OIP3). The proposed down conversion mixer is fabricated in 0.18 μm CMOS technology. And this letter highlights the performances of the proposed mixer in terms of: flicker noise (i.e., noise figure: 5 dB at 100 kHz), third order output intercept point (i.e., OIP3, typically 35 dBm), and the conversion gain (i.e., typ. 17.3 dB) from −20 dBm RF input at 2.4 GHz. © 2016 Wiley Periodicals, Inc. Microwave Opt Technol Lett 58:1720–1723, 2016

Summary This paper reports a phase noise analysis in a differential Armstrong oscillator circuit topology in CMOS technology. The analytical expressions of phase noise due to flicker and thermal noise sources are derived and validated by the results obtained through SpectreRF simulations for oscillation frequencies of 1, 10, and 100 GHz. The analysis captures well the phase noise of the oscillator topology and shows the impact of flicker noise contribution as the major effect leading to phase noise degradation in nano-scale CMOS LC oscillators. Copyright © 2016 John Wiley & Sons, Ltd.

In this letter, we evaluate the noise figure (NF) improvement that results from controlling the parasitic gate resistance of a radio-frequency (RF) low noise amplifier (LNA). By optimizing the number of gate contacts and wiring modifications in our fabricated device, the customized layout exhibited an approximately 25% reduction in the gate electrode resistance (Relect) when compared to a reference device provided by the foundry. The fabricated LNA, which used a customized layout in a 0.18 μm standard CMOS process, improved the NF by almost 6% without affecting the Si area and DC power consumption, and exhibited a NF of 2.57 dB, gain of 11.6 dB, DC power dissipation of 4.0 mW, and return loss at both the input and output of more than 10 dB. © 2017 Wiley Periodicals, Inc. Microwave Opt Technol Lett 59:1405–1407, 2017

An analysis of the flicker noise conversion to close-in phase noise in complementary metal-oxide semiconductor CMOS differential inductance-capacitance LC-voltage controlled oscillator is presented. The contribution of different mechanisms responsible for flicker noise to phase noise conversion is investigated from a theoretical point of view. Impulse sensitivity function theory is exploited to quantify flicker noise to phase noise conversion process from both tail and core transistors. The impact of different parasitic capacitances inside the active core on flicker noise to phase noise conversion is investigated. Also, it is shown how different flicker noise models for core metal-oxide semiconductor MOS transistors may result in different close-in phase noise behaviors. Based on the developed analysis, design guidelines for reducing the close-in phase noise are introduced. Copyright © 2015 John Wiley & Sons, Ltd.

Summary Analytical expressions for the noise parameters of radio frequency metal oxide semiconductor field effect transistors (MOSFETs) are presented in this paper. These expressions are derived from an accurate small-signal and noise equivalent circuit model, which takes into account the substrate parasitics and series inductances. Further, simplified expressions for noise parameters in the low-frequency range are given. Good agreement is obtained between measured and calculated results up to 14 GHz for 0.35 µm MOSFET over a wide range of bias points. Copyright © 2015 John Wiley & Sons, Ltd.

The extraction of a high-frequency ivalent circuit model plays a fundamental role for the development of any emerging transistor technology. Indeed, an equivalent circuit can provide a valuable support for microwave engineers to ensure a fast and reliable optimization of both device fabrication and circuit design. As far as gallium nitride (GaN) HEMTs are concerned, research efforts have been mostly focused on determining equivalent circuits able to reproduce their large-signal behavior. Nevertheless, an increasing amount of interest is also being devoted to noise equivalent circuits, due to the interesting GaN technology noise performance. Within this context, the purpose of the present paper is to extract and fully validate an accurate noise model for GaN HEMTs based on a simple, fast, and reliable extraction procedure. The noise model is obtained by assigning an equivalent noise temperature to each resistor of the small-signal equivalent circuit. The accuracy of the extracted noise model is confirmed by the good agreement between measured and simulated high-frequency noise parameters. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:937–942, 2015

In this paper, we discuss the experimental determination of noise parameters for high-electron-mobility transistor (HEMT) devices and analyze the problems encountered with conventional extraction techniques. HEMT devices are distinguished by a very small minimum noise figure of only a fraction of a dB, and this minimum noise is accomplished with a source reflection coefficient very close to the edge of the Smith chart. These properties impede a direct experimental determination of the optimum noise impedance by means of a tuner, and it has to be extrapolated from measurements of a large number of tuner states. Common linear regression techniques are found to yield erroneous results and even may fail completely to determine the noise parameters. We develop criteria to check the uncertainty of the result from the linear regression and show that, in general, the result needs to be examined for consistency. The occasional failure of extraction is traced back to a consistency violation in the conditions the elements of the correlation matrix need to satisfy. A new iterative technique is suggested for the extraction of noise parameters that warrants consistency. Moreover, a correction of the receiver gain is found to be necessary to obtain a good reproduction of the measured power patterns by the extracted noise parameters. This fact was attributed to thermal drift of the receiver. Copyright © 2015 John Wiley & Sons, Ltd.

Summary In this paper, two new techniques are proposed to improve the second-order input intercept point (IIP2) and conversion-gain in double-balanced Gilbert-cell complementary metal-oxide semiconductor (CMOS) mixers. The proposed IIP2 improvement technique is based on canceling the common-mode second-order intermodulation (IM2) component at the output current of the transconductance stage. Additionally, the conversion-gain is improved by increasing the fundamental component of the transconductance stage output current and creating a negative capacitance to cancel the parasitic capacitors. Moreover, in the proposed IM2 cancelation technique, by decreasing the bias current of the switching transistors, the flicker noise of the mixer is reduced. The proposed mixer has been designed with input frequency and output bandwidth equal to 2.4 GHz and 20 MHz, respectively. Spectre-RF simulation results show that the proposed techniques simultaneously improve IIP2 and conversion-gain by approximately 23.2 and 5.7 dB, respectively, in comparison with the conventional mixer with the same power consumption. Also, the noise figure (NF) at 20 kHz, where the flicker noise is dominant, is reduced by 4.9 dB. The average NF is increased nearly 0.9 dB, and the value of third-order input intercept point (IIP3) is decreased approximately 1.8 dB. Copyright © 2014 John Wiley & Sons, Ltd.

This work presents high-frequency noise measurements and compact modeling for a 90-nm silicon complementary metal-oxide-semiconductor CMOS technology in terms of radio frequency RF figures of merit FoMs. Minimum noise figure NFmin, equivalent noise resistance Rn, optimum source reflection coefficient i¾?opt, thermal noise excess factor and a recently introduced FoM for common-source low-noise amplifier LNA design are presented from a circuit design perspective. For this purpose, the behavior of the above mentioned RF FoMs is investigated over the level of channel inversion, providing insight from a circuit design point of view. The EKV3 MOSFET advanced compact model has been used in Spectre simulator, and results are validated over a large range of frequencies, channel lengths and bias points, for both N-type and P-type MOS devices. Optimum performance is shown to be shifted from higher to lower levels of inversion in moderate inversion, when scaling from 240nm down to 100nm. This is of great significance considering that the demand for low-power RF circuits becomes more and more imperative, as planar silicon CMOS technology is scaled to the deca-nanometer regime. Copyright © 2014 John Wiley & Sons, Ltd.

In order to pursue Moore's law, material engineering has constituted a real focus during the last decade. In particular, the recent introduction of new Gate stack using High-k dielectrics and Metal Gate H-k/MG for CMOS was a key point to downscale the 'Equivalent Oxide Thickness'. Within this context, this paper intends to investigate radio frequency RF and broadband noise performance of a recent Low Power 28-nm H-k/MG CMOS Bulk Technology. For this purpose, S-parameters carefully measured up to 110GHz allowed the selection of the best RF transistor, leading to the best trade-off for fT/fmax. For this transistor, multi-bias RF Small Signal Equivalent Circuit SSEC was extracted, while its noise performance was assessed through different noise measurement methods and within different frequency ranges. It turned out that H-k/MG 28-nm CMOS Technology offers a minimum noise figure NFmin of 0.8dB with an associated gain Ga equal to 14dB at 20GHz, for a quite low DC drain current of 135mA/mm. Moreover, despite the aggressive length down-scaling, the validity of the two-temperature noise model was verified both in W band and through tuner based noise measurement in 6-18GHz frequency range. Finally, the noise performance were benchmarked with the best ones reported for H-k/MG CMOS technology up-to-date. Copyright © 2014 John Wiley & Sons, Ltd.

In this article, we proposed a new flicker noise simulation methodology within an orthogonal frequency-division multiplexing (OFDM) PHY layer, which offers accurate analyses of the flicker noise effect.To prove this effect, we examine bit error rate performance with flicker noise by generating raw and channel-coded data. Experiment results are demonstrated using Reed Solomon channel coding. The proposed simulation methodology offers precise results for deciding flicker noise requirement on RF building blocks for OFDM systems. © 2013 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:1171–1174, 2013; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27502

In this paper, a full-band Monte Carlo simulator is employed to study the dynamic characteristics and high-frequency noise performances of a double-gate (DG) metal–oxide–semiconductor field-effect transistor (MOSFET) with 30 nm gate length. Admittance parameters (Y parameters) are calculated to characterize the dynamic response of the device. The noise behaviors of the simulated structure are studied on the basis of the spectral densities of the instantaneous current fluctuations at the drain and gate terminals, together with their cross-correlation. Then the normalized noise parameters (P, R, and C), minimum noise figure (NFmin), and so on are employed to evaluate the noise performances. To show the outstanding radio-frequency performances of the DG MOSFET, a single-gate silicon-on-insulator MOSFET with the same gate length is also studied for comparison. The results show that the DG structure provides better dynamic characteristics and superior high-frequency noise performances, owing to its inherent short-channel effect immunity, better gate control ability, and lower channel noise. Copyright © 2012 John Wiley & Sons, Ltd.

In order to explore the long-term influence of seismic events on the GPS time series, 10 a long processing results of the Sichuan GPS network before and after the 2008 Wenchuan M8.0 earthquake were used for the multi-parameter noise model analysis. Based on the maximum likelihood estimator method and spectrum analysis, the noise components in the station coordinate time series were extracted. Through Λ-statistical tests, we found ‘white noise+ flicker noise’ is the best combination that can best fit the Sichuan local area network. Meanwhile, it is noted that apparent variations in the noise component of GPS, including white noise, flicker noise, and random walk nose, occurred before and after the seismic event, which demonstrates that the traditional processing mode which simply splices and resolves the pre-seismic and post-seismic data together is unacceptable. The common mode error analytical method and velocity variation information were used for the initial physical interpretation of such apparent noise component change.

This article proposes a low-voltage, low-power, low-noise, wideband receiver front-end consisting of a low-noise amplifier (LNA) and a mixer. The LNA stage uses a current-reuse technique for low-power consumption and high gain. A switched biasing technique is then used to reduce the flicker noise of the mixer. A bulk injection structure is adopted for low-voltage operation of the mixer. The proposed receiver front-end achieves input impedance matching of less than −10 dB from 3.1 to 10.6 GHz, a minimum noise figure of 4.9 dB, and a maximum power gain of 17.7 dB while consuming 8.25 mW from 6.87 mA and 1.2 V. This receiver front-end is fabricated using a 0.18-μm CMOS process. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:278–281, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27299

A relaxation oscillator design is described, which has a phase noise rivaling ring oscillators, while also featuring linear frequency tuning. We show that the comparator in a relaxation-oscillator loop can be prevented from contributing to 1/f2 colored phase noise and degrading control linearity. The resulting oscillator is implemented in a power efficient way with a switched-capacitor circuit. The design results from a thorough analysis of the fundamental phase noise contributions. Simple expressions modeling the theoretical phase noise performance limit are presented, as well as a design strategy to approach this limit. To verify theoretical predictions, a relaxation oscillator is implemented in a baseline 65nm CMOS process, occupying 200µm × 150µm. Its frequency tuning range is 1-12MHz, and its phase noise is L100kHz=-109dBc/Hz at fosc=12MHz, while consuming 90µW. A figure of merit of -161dBc/Hz is achieved, which is only 4dB from the theoretical limit. Copyright © 2012 John Wiley & Sons, Ltd.

Autocorrelation within ecological time series and synchrony between them may provide insight into the main drivers of observed dynamics. We here present methods that analyse autocorrelation and synchrony in ecological datasets using a spectral approach combined with Bayesian inference. To exemplify, we implement the method on dendrochronological data of the pedunculate oak (Quercus robur). The data consist of 110 years of growth of 10 live trees and seven trees that died during a synchronized oak death in Sweden in c. 2002-2007. We find that the highest posterior density is found for a noise colour of tree growth of gamma approximate to 0.95 (i.e. pink noise) with little difference between trees, suggesting climatic variation as a driving factor. This is further supported by the presence of synchrony, which we estimate based on phase-shift analysis. We conclude that the synchrony is time-scale dependent with higher synchrony at larger time-scales. We further show that there is no difference between the growth patterns of the alive and dead tree groups. This suggests that the trees were driven by the same factors prior to the synchronized death. We argue that this method is a promising approach for linking theoretical models with empirical data.

We demonstrated a 10.4-in on-cell touch-panel LCD using an ITO layer formed on a color filter substrate as a capacitive sensor. To enhance noise immunity for larger capacitive sensors, we developed a correlated noise subtraction method, which improves the signal-to-noise ratio even under an environment where noise frequency coincides with signal frequency.

This letter proposes a BiCMOS voltage-controlled oscillator (VCO), which was implemented in the standard TSMC 0.18 μm SiGe 3P6M BiCMOS process. The VCO consists of an nMOSFET cross-coupled oscillator stacked in series with source degenerated HBT diodes. SiGe HBT has an inherently low flicker noise compared to CMOS devices. At the supply voltage of 1.5 V, the output phase noise of the VCO is −122.01 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.6 GHz, and the figure of merit is −190.43 dBc/Hz. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:605–608, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26619

A hybrid ΔΣ modulator for audio applications is presented in this paper. The pulse generator for digital-toanalog converter alleviates the requirement of the external clock jitter and calibrates the coefficient variation due to a process shift and temperature changes. The input resistor network in the first integrator offers a gain control function in a dB-linear fashion. Also, careful chopper stabilization implementation using return-to-zero scheme in the first continuous-time integrator minimizes both the influence of flicker noise and inflow noise due to chopping. The chip is implemented in a 0.13 μm CMOS technology (I/O devices) and occupies an active area of 0.37 mm 2 . The ΔΣ modulator achieves a dynamic range (A-weighted) of 97.8 dB and a peak signal-to-noise-plus-distortion ratio of 90.0 dB over an audio bandwidth of 20 kHz with a 4.4 mW power consumption from 3.3 V. Also, the gain of the modulator is controlled from –9.5 dB to 8.5 dB, and the performance of the modulator is maintained up to 5 nsRMS external clock jitter.

This article presents a low flicker noise (1/f), double-balanced Gilbert-cell mixer. As the down converted base-band signal is strongly affected by the low-frequency flicker noise, resulting in mixer signal-noise ratio (SNR) degradation, a dynamic current injection technique has been used to reduce the flicker noise corner frequency. Differential active inductor has been used to tune the tail capacitance at the node between the local oscillator (LO) switches and the radio frequency (RF) transconductance stages, resulting in reduction of RF leakage. RF and LO leakage has been minimized by adding an on-chip low-pass filter to the mixer output. The mixer has been designed and fabricated using Taiwan Semiconductor Manufacture Company (TSMC) 0.18-μm 1P6M complementary metal-oxide-semiconductor FET (CMOS) process. The performance of the fully integrated mixer is given. With RF of 2.4 GHz, intermediate frequency of 10 MHz and LO power of −5 dBm, conversion gain of 12 dB, input third order intercept point (IIP3) of −5.5 dBm, and single-side band noise (SSB-NF) figure of 15 dB with flicker noise corner frequency of 300 KHz had been measured. The mixer consumes 19.8 mW from 1.8 V supply. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:2553–2556, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26366

Gallium nitride has attracted a great deal of interest in recent years due to its power handling ability. In addition, its noise performance is known to be good. In this letter, we present a method for determining the bias current density needed to obtain optimal noise figure for gallium nitride high-electron mobility transistors (HEMTs). Particle swarm optimization is used to fit transistor S parameters to a model, enabling the calculation of the transistor's two-port noise parameters. This process is performed for different bias points for different-sized transistors, leading to the conclusion that a current density of 0.3 mA/μm yields the best minimum noise figure. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:652–656, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.25758

An X-band push–push dielectric resonator (DR) oscillator with injection locking capability has been developed.Two injection locking methods, i.e., the in-phase method and the out-of-phase method, are studied. It is found that the out-of-phase method has wider locking range and much less effects on fundamental suppression than that of the in-phase method. The oscillator generates an output power of 9.5 dBm at 12.4 GHz and has a fundamental suppression of 32.5 dBc. Despite using a high quality (Q) factor DR, wide locking range has been obtained. SiGe HBTs with good flicker noise performance were chosen for low phase noise design. The phase noise values of the free running oscillator are −104.4 dBc/Hz, −120.2 dBc/Hz, and −142.6 dBc/Hz at 10 kHz, 100 kHz, and 1 MHz offsets from the carrier frequency, respectively. The phase noise performance is superior or comparable to the reported designs. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52:2448–2452, 2010; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.25510

We report on 1/f noise measurements in amorphous selenium p-i-n devices, where the p- and n-layers are trapping layers for electrons and holes respectively. Under forward bias, the normalized 1/f noise power is 5 × 104 times less than that of a single i-layer device. At frequencies above 100 Hz, a region of white noise is observed that we attribute to partial shot noise. We propose that the reduction in 1/f noise and the region of shot noise are a result of the trapping layers acting as reservoirs of charge carriers. The traps randomize the charge carriers producing the observed white noise and act as the source of the device current. Sourcing the current in this way suppresses the very noisy charge injection from the metal electrodes which controls the current in single i-layer devices (© 2010 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

In this article, a CMOS multistandard wireless direct-conversion receiver is designed. The receiver is composed of three components: low noise amplifier, voltage-controlled oscillator, and mixer. In details, the designed receiver adopts direct-conversion architecture and accommodates three standards: WCDMA, Wibro (or mobile WIMAX), and CDMA 2000 1×: 1.84–2.4 GHz. The designed mixer is a passive sub-harmonic doubly balanced structure, the VCO is a back-gate coupling quadrature VCO, and the LNA is a differential structure. Each component is designed with relevance to direct-conversion architecture. The designed mixer has no flicker noise theoretically because the mixing transistors operate in the triode region. Also, DC offset problem is avoided, because local oscillator frequency is half of RF frequency and the port isolation is improved by the innate characteristic of a balanced structure. The VCO generates a quadrature signal and the oscillation frequency is half of RF frequency to drive designed sub-harmonic mixer. No coupling transistors are needed due to the use of back-gate coupling to reduce flicker noise. Back-gate coupling means that the body of a transistor is used as another gate. The LNA, which adopts a well-known cascade structure, is designed as a differential structure to suppress common mode noise and to drive a doubly balanced mixer. All designed components are fabricated by the TSMC 0.18-μm RF CMOS process. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 718–721, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24989

passed from the Cgate to the bulk ground. In Figure 4, the measured MOS varactor flicker noise, where the dimensions of W L G B 1.6 0.4 8 64, has presented a different flicker noise level at 1.2 V as a result of the leakage current being one order of magnitude higher compared with other DC bias conditions. This can be explained by the fact that an increased modeling parameter for Igate results in an increased leakage current of NMOS varactor at 1.2 V. It was noticed that there was an increase in noise when the current was higher than 10 4 mA. This phenomenon did not occur when the leakage current is 10 5 and 10 6 mA at 1.2 and 0 V, respectively, Also, Igate changes the flicker noise level, as Igate rises above than 10 4 mA. Moreover, it was found that measured results for PMOS varactor are always lower than 10 5 mA between the 1.2 and 1.2 V, so would have no impact on the noise level variation. Although the measured noise of MOS varactor has a lower level than the one created by MOSFET, adding the fitting parameters to the simulator is an unavoidable trend as noise level rapidly increases with increased leakage current. 5. CONCLUSIONS In this study, we investigated the optimum 65 nm LP MOS varactors geometrical relation in terms of microwave characteristics and low frequency noise performances. The equivalent circuit model also achieves precisely extracting parasitic parameters and agrees with measured results. The Igate parameter of the MOS varactor model also can be validated as a relationship with flicker noise on MOS varactor. ACKNOWLEDGMENTS

In this article, a low-power low-phase-noise 48-GHz CMOS LC voltage-control oscillator (VCO) using standard 0.13-μm CMOS technology is reported. Low-power consumption is achieved by maximizing the equivalent parallel resistance of the LC tank, while low-phase-noise is achieved by suppressing the up-conversion of the flicker noise of the PMOS current source to 1/f3-shaped phase noise close to the carrier. The VCO dissipated 5.556 mW power, and achieved state-of-the-art phase noise of −105 dBc/Hz at 1-MHz offset from 47.85 GHz. The corresponding figure-of-merit (FOM) was −191.1 dBc/Hz, which is better than those of the reported CMOS LC VCOs around 48 GHz in the literature. The chip area was 0.94 × 0.9 mm2 including the test pads. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 997–1000, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24256

In this article, we describe a method of design of very low phase noise dielectric resonators oscillators at 13 GHz. By using two Silicon Germanium transistors with total gains 8 dB and lower flicker noise corner between 10 kHz and 40 kHz, the phase noise of the oscillators can be achieved −125 dBc/Hz at 10 kHz offset. The resonator has unloaded Q around 14,000 at operating frequency and is then optimized and coupled to the amplifiers for minimum phase noise where QL/Q0 = 1/2 hence S21 = −6 dB. To incorporate tuning, phase shifter is also investigated. The phase noise measurement system is also presented using two identical oscillators phase locked at the same frequency.© 2009 Wiley Pe riodicals, Inc. Microwave Opt Technol Lett 51: 1312–1316, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24334

This letter analyses the low frequency noise performance in Gilbert-cell-based zero-IF mixers. Several issues for optimizing the flicker noise performance while keeping a good mixer performance in terms of gain, noise figure, and power consumption are introduced in a quantitative manner. A CMOS zero-IF mixer has been fabricated and measured. A flicker noise reduction up to 10.4 dB is achieved at 10 kHz with a power consumption of only 5.4 mW. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 3128–3131, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23940

In this article, design and characterization results of a fully integrated 5.8 GHz low noise amplifier (LNA) using 0.13-μm CMOS technology are presented. Commonly adopted inductive source degeneration for input impedance matching is eliminated to achieve smaller chip area while providing reasonable 50-Ω matching. Also by adding a capacitor between the gate and the source of the input transistor, a noise source from the gate resistance is partly suppressed. The layout of the designed LNA occupies total area of 0.68 mm2 and the results show forward power gain (S21) of 12.7 dB and noise figure of 3.9 dB while consuming 6.85 mW from 1.2-V DC supply. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 2300–2304, 2008; Published online in Wiley InterScience (www.interscience.wiley.com).DOI 10.1002/mop.23702

Characteristics of daily position time series from January 2001 to August 2007 at 12 GPS stations in the Hong Kong GPS fiducial network are investigated. A spatial filtering algorithm based on principal component analysis is employed to remove the common mode errors from the daily position time series. The noise characteristics of the filtered position time series are assessed by the method of maximum likelihood estimation. Contributions from atmospheric, nontidal oceanic, snow and soil moisture mass loading are evaluated. The results indicate that spatial filtering is an effective way to improve the precision of GPS position time series. The common mode errors have strong seasonal variations. The about 3 mm annual vertical variation of the common mode errors can be explained by the joint contribution of the seasonal surface mass redistributions. After removing these surface mass loading effects, the residual common mode errors are highly related to the higher-order ionospheric effects. The noise in the filtered position time series can be described as a combination of variable white noise and flicker noise. The velocity uncertainties are about 2~6 times larger if only variable white noise is assumed. The maximum relative horizontal velocity between the sites is 1.5 mm/yr, which indicates some local fault activities. In addition, there are obvious 1~2 mm local seasonal signals in the filtered position time series of some of the sites. The residual scatters of all filtered time series also show strong seasonal characteristics.

The noise power spectral density of the mesoscopic devices was measured at low temperatures with two homemade systems for low- and high-frequency ranges. By measuring the noise of the devices at finite bias voltages in the low-freqiency setup, we estimated a typical cut-off frequency to avoid the 1/f noise. We developed a high-frequency measurement system with an cryogenic amplifier and a resonant circuit and calibrated it by measuring the Johnson-Nyquist noise. We compare these two systems and discuss the advantage of the high-frequency measurement system. (© 2008 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

This work presents a receiver front-end that targets mobile video applications, and integrates a dual-band LNA, a current-mode passive mixer, a reference Gilbert mixer, and a digitally-controlled oscillator providing the quadrature LO signal for the mixers. The conversion gain and thermal noise performances of the current-mode passive mixer are studied. Design tradeoffs among noise, linearity, and conversion gain are performed. Measured performance of the receiver front-end shows a flicker noise corner of 70 kHz, a noise figure (NF) of 4.4 dB, an input third-order intermodulation product (IIP3) of −2 dBm, and DCO phase noise of −128 dBc/Hz at 1-MHz offset. The receiver consumes less than 24 mA of current in a 1.2-V 90-nm standard digital CMOS process. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 2138–2142, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23587

Department of Physics, Stuttgart University, Stuttgart, Germany Received 5 June 2006, revised 18 October 2006, accepted 18 October 2006 Published online 22 January 2007 PACS 72.70.+m, 81.05.Ea, 85.30.De, 85.30.Tv We report experimental investigation of laser-assisted debonding of GaN high electron mobility transis-tors (HEMTs) grown by metalorganic chemical vapor deposition (MOCVD) technique on sapphire sub-strates. The debonded HEMTs were transferred onto silicon substrate for better thermal dissipation during operation. Dc characterization indicated no degradation in the I–V characteristics as long as the optimized laser power was used in the debonding process. Transmission electron microscopy (TEM) of the AlGaN/GaN heterojunctions before and after the laser debonding process did not indicate any increase in the dislocation density at the heterointerface. We have also conducted detailed characterizations of the low-frequency noise properties to investigate the defect properties over the entire active area of the device. Experimental data on the voltage noise power spectra measured from the same device before and after laser debonding indicated no significant change in the magnitude of the flicker noise over a wide temperature range. The results of XRD measurements revealed that the FWHM values before and after debonding are basically the same and also suggested that both out-of-plane tensile and in-plane compres-sive stresses present were both removed after the laser processing. Our results clearly demonstrate that the laser-assisted debonding process did not result in the increase in the material defect density.

The level of internal noise of the transistors, diodes, and other semiconductor components limits the successful design of any low noise electronic system. All types of noise, namely, Johnson, 1/f, and so forth, are generated due to activity of crystalline defects such as vacancies, dislocations, and others. The intensity of the electron scattering and recombination processes, inflicted by defects (traps), controls the level of noise. Dependent on the dynamic operation condition of semiconductor devices, such as external biases and level of current injection, the traps will generate certain type and level of noise. Material growth or device processing technologies could introduce all kind of defects. Therefore, characterization of the semiconductor wafer in the early stages of processing (at least before packaging) could help to predict the level of noise due to the type and density of defects present on the wafer. Sorting out bad semiconductor chips could save money and effort in the radio frequency design of low-noise circuits. This current study focuses on 1/f noise modeling, which involves most powerful generators of noise and linear defects, named dislocations. The study also examines the possibility of assessing this noise by quantitative electron beam-induced conductivity (EBIC) measurements. These defects could be found in the bulk as well as at the epitaxial interfaces of a semiconductor device. The nanoscale size of these defects makes the scanning electron beam an instrument of choice for the proposed study. Conventional EBIC produces images of the defects, where contrast is proportional to the recombination rate at the site of a defect. Since contrast is measured as a fraction of one percent, the relative nature of contract value precludes quantitative measurements of the recombination rate, thus making quantitative assessment of 1/f noise impossible. In our model, using the Boltzman continuity equation, the recombination-generation processes per unit of length of a dislocation was defined for two operational conditions of EBIC, namely, for low and high intensity of an electron beam. The experimental technique of the quantitative measurement of carrier recombination (Mil'shtein 2001) consists of taking two EBIC scans along the selected defect at two different beam intensities, digitally subtracting the first scan from the second one and normalizing the result to the size of the electron range. The value of the recombination rate, extracted from the model, could then be used to predict the level of 1/f noise in the tested semiconductor sample.

The electrical and low frequency noise properties of 4H-SiC p+–n–n+ junctions have been investigated at different temperatures. The forward current–voltage characteristics are described as the sum of a recombination current originating from carrier recombination on the sidewall of the circular mesa of the diodes and a diffusion volume current. In the current region where the recombination mechanism is dominant, the main noise sources are attributed to carrier recombination at the perimeter surface of the diode and to a generation-recombination noise related to a local trap level. In the current region where the diffusion current becomes important, the noise originates from mobility and diffusivity fluctuations in the space charge region of the p+–n junction. Analysis of the current and noise data allowed us to determine the density of surface states and the Hooge factor, characterizing the surface and the bulk quality of the diode. (© 2006 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

A novel model for analyzing differential LC oscillator noise is presented. The proposed analysis enables us to separately compute the impacts of white and flicker noise on the oscillator phase noise in terms of simple analytical expressions. Further, the analysis also takes into account the contribution of the tail noise of a differential LC oscillator to the total phase noise. © 2006 Wiley Periodicals, Inc. Microwave Opt Technol Lett 48: 806–808, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.21480

In this paper, we propose two LC voltage-controlled oscillators (VCOs) that improve both phase noise and tuning range. With both 1/ƒ induced low-frequency noise and low-frequency thermal noise around DC or around harmonics suppressed significantly by the employment of a current-current negative feedback (CCNF) loop, the phase noise in the CCNF LC VCO has been improved by about 10 dB at 6 MHz offset compared to the conventional LC VCO. The phase noise of the CCNF VCO was measured as -112 dBc/Hz at 6 MHz offset from 5.5 GHz carrier frequency. Also, we present a bandwidth-enhanced LC VCO whose tuning range has been increased about 250 % by connecting the varactor to the bases of the crosscoupled pair. The phase noise of the bandwidth-enhanced LC-tank VCO has been improved by about 6 dB at 6 MHz offset compared to the conventional LC VCO. The phase noise reduction has been achieved because the DCdecoupling capacitor Cc prevents the output commonmode level from modulating the varactor bias point, and the signal power increases in the LC-tank resonator. The bandwidth-enhanced LC VCO represents a 12 % bandwidth and phase noise of -108 dBc/Hz at 6 MHz offset.

Channel noise enhancement due to MOSFET scaling and its influence on phase noise estimation of fully integrated VCO have been studied. The channel noise of MOSFET increases due to the hot electron effect of small geometry MOSFET is obvious. The channel noise coefficient, γ, of NMOS is 3.5 for 40-nm gate length, 2.0 for 90-nm gate length in spite of being ⅔ for long channels MOSFET. Simultaneously, calculation of phase noise of fully integrated VCO shows large difference using γ=⅔ because the part of noise performance of VCO gain-cell depends on channel noise of MOSFET. Calculated phase noise showed good agreement with measured data when the optimum value of channel noise of MOSFET was adopted. Copyright © 2005 John Wiley & Sons, Ltd.