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RF and broadband noise investigation in High-k/Metal Gate 28-nm CMOS bulk transistor

Authors :
Patrick Scheer
B. Dormieu
L. Poulain
Y. Tagro
Daniel Gloria
Gilles Dambrine
Sylvie Lepilliet
Francois Danneville
Source :
International Journal of Numerical Modelling: Electronic Networks, Devices and Fields. 27:736-747
Publication Year :
2014
Publisher :
Wiley, 2014.

Abstract

In order to pursue Moore's law, material engineering has constituted a real focus during the last decade. In particular, the recent introduction of new Gate stack using High-k dielectrics and Metal Gate H-k/MG for CMOS was a key point to downscale the 'Equivalent Oxide Thickness'. Within this context, this paper intends to investigate radio frequency RF and broadband noise performance of a recent Low Power 28-nm H-k/MG CMOS Bulk Technology. For this purpose, S-parameters carefully measured up to 110GHz allowed the selection of the best RF transistor, leading to the best trade-off for fT/fmax. For this transistor, multi-bias RF Small Signal Equivalent Circuit SSEC was extracted, while its noise performance was assessed through different noise measurement methods and within different frequency ranges. It turned out that H-k/MG 28-nm CMOS Technology offers a minimum noise figure NFmin of 0.8dB with an associated gain Ga equal to 14dB at 20GHz, for a quite low DC drain current of 135mA/mm. Moreover, despite the aggressive length down-scaling, the validity of the two-temperature noise model was verified both in W band and through tuner based noise measurement in 6-18GHz frequency range. Finally, the noise performance were benchmarked with the best ones reported for H-k/MG CMOS technology up-to-date. Copyright © 2014 John Wiley & Sons, Ltd.

Details

ISSN :
08943370
Volume :
27
Database :
OpenAIRE
Journal :
International Journal of Numerical Modelling: Electronic Networks, Devices and Fields
Accession number :
edsair.doi...........e74197d2071e4d2b3aacb720a271fb67