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Microwave-driven trapped ion logic gates offer a promising avenue for advancing beyond laser-based logic operations. In future microwave-based operations, however, the joule heat produced by large microwave currents flowing through narrow microwave electrodes would potentially hinder improvements in gate speed and fidelity. Moreover, scalability, particularly in cryogenic trapped ion systems, is impeded by the excessive joule heat. To address these challenges, we present a novel approach: superconducting surface trap chips that integrate high-Q microwave resonators with large current capacities. Utilizing sub-ampere microwave currents in superconducting Nb resonators, we generate substantial magnetic field gradients with significantly reduced losses compared to conventional metal chips. By harnessing the high Q factors of superconducting resonators, we propose a power-efficient two-qubit gate scheme capable of achieving a sub-milliwatt external microwave input power at a gate Rabi frequency of 1 kHz. [ABSTRACT FROM AUTHOR]

As CMOS technology approaches its physical and technical limits, alternative technologies such as nanotechnology or quantum computing are needed to overcome the challenges of lithography, transistor scaling, interconnects, and miniaturization. This article introduces a novel nanotechnology that uses atomic-scale silicon dangling bonds (ASDB) to create high-performance, low-power, nanoscale logic circuits. DBs are atoms that can form basic logic gates on a silicon surface using a scanning tunneling microscope device. ASDB can also be an alternative to the existing complementary metal oxide semiconductor (CMOS) technology. The article also proposes a new bar-shaped pattern to design gates and logic circuits with ASDB nano tecnolgoy. The bar-shaped pattern improves the reliability of the output, reduces the area and power consumption, and solves the problem of interatomic energy effects of ASDB. The article demonstrates the efficiency of the bar-shaped pattern by implementing two-input gates such as AND, NAND, OR, NOR, XOR, XNOR, and a 2:1 multiplexer with ASDB. The article also uses a powerful tool called SiQAD to simulate and verify the performance of the proposed structures with ASDB. According to the simulation results, the proposed logic gates are more energy efficient, stable, and compact than the previous structures. They consume 35% and 24.34% less energy and have 14.18% more stability, respectively. [ABSTRACT FROM AUTHOR]

One of the major study areas in VLSI system design is the creation of an area-efficient, high-speed adder. So this paper focused on an effective adder design as an Area Effective Novel Sum Generator (AENSG) to make it suitable for real-time applications. The major operations involved in this adder are Brent Kung addition, group kill and generate (KG) signal generation, Kill Generate Propagate (KGP) signal generation, and various sum generation categories. In the sum-generating block, AENSG is utilized to minimize the space by a reduction in the number of logic gates. Xilinx ISE 13.1 is used to synthesize and validate the suggested adder design. The 64-bit AENSG adder has 37.98%, 9.09% lesser number of logic gates and 34.81%, 28.40% lesser delay when compared with PPF/CSSA_4 and hybrid adder respectively. [ABSTRACT FROM AUTHOR]

Bistability, a universal phenomenon found in diverse fields such as biology, chemistry, and physics, describes a scenario in which a system has two stable equilibrium states and resets to one of the two states. The ability to switch between these two states is the basis for a wide range of applications, particularly in memory and logic operations. Here, we present a universal approach to achieve bistable switching in magnonics, the field processing data using spin waves. A pronounced bistable window is observed in a 1 μm wide magnonic conduit under an external rf drive. The system is characterized by two magnonic stable states defined as low and high spin-wave amplitude states. The switching between these two states is realized by another propagating spin wave sent into the rf driven region. This magnonic bistable switching is used to design a magnonic repeater, which receives the original decayed and distorted spin wave and regenerates a new spin wave with amplified amplitude and normalized phase. Our magnonic repeater can be installed at the inputs of each magnonic logic gate to overcome the spin-wave amplitude degradation and phase distortion during previous propagation and achieve integrated magnonic circuits or magnonic neuromorphic networks. A repeater takes an input signal and retransmits is, and a vital component for extending the range of signals. Here, Wang et al. demonstrate a magnon repeater, based on the bistable switching between low and high amplitude spin-waves. [ABSTRACT FROM AUTHOR]

A promising alternative for the CMOS technology is the Quantum-dot Cellular Automata (QCA) technology. In this technology, the low-latency, ultra-dense, and low-power consumption digital circuits are designed. Until now, many digital circuits are designed and improved in the QCA technology. The Arithmetic Logic Unit (ALU) is an important digital circuit that designed in this technology. The reversible logic gates such as NOT, Feynman, and Fredkin gates are important elements in the arithmetic circuits and processors design. In addition, considering the cell arrangements has a great influence on the area and speed of execution of computing devices in the QCA technology. This paper's goal is to build a new multilayer QCA Reversible ALU (RALU). In this paper, we used one HN and three Fredkin gates to design and implement a new and efficient RALU circuit in the QCA technology. The proposed QCA RALU circuit is simulated and tested using QCADesigner tool. The simulation results demonstrate that the developed QCA multilayer RALU has 489 cells, 0.36 µm2 area, 3.75 clock cycles delay, 2.02 meV average energy, and 5.41 nW power dissipation. In addition, the comparison indicates that the developed QCA RALU circuit has advantages compared to other QCA RALU circuits with regards to energy, area, latency, and cost. [ABSTRACT FROM AUTHOR]

The blockchain-based Electronic Medical Record (EMR) data storage system encounters challenges which are data leakage, insufficient access control, and low retrieval efficiency. In response to these issues, this paper proposes a lightweight searchable encryption and access control system for sharing EMR data securely. The lightweight searchable encryption scheme which is achieved by integrating the trapdoor verification phase with the keyword retrieval phase is constructed using BGG13 + and MP12. User access control is implemented through a Boolean circuit to replace arithmetic operations and thus improve arithmetic efficiency. Since logic operations can reduce the computation time, this paper uses Boolean circuits for user rights verification implementation. In addition, this paper adopts the Bloom filter as the system index to enhance the efficiency of block-chain data retrieval. According to the simulation results, there is a performance advantage of this system over similar systems. [ABSTRACT FROM AUTHOR]

Increasing demand for bio-interfaced human-machine interfaces propels the development of organic neuromorphic electronics with small form factors leveraging both ionic and electronic processes. Ion-based organic electrochemical transistors (OECTs) showing anti-ambipolarity (OFF-ON-OFF states) reduce the complexity and size of bio-realistic Hodgkin-Huxley(HH) spiking circuits and logic circuits. However, limited stable anti-ambipolar organic materials prevent the design of integrated, tunable, and multifunctional neuromorphic and logic-based systems. In this work, a general approach for tuning anti-ambipolar characteristics is presented through assembly of a p-n bilayer in a vertical OECT (vOECT) architecture. The vertical OECT design reduces device footprint, while the bilayer material tuning controls the anti-ambipolarity characteristics, allowing control of the device's on and off threshold voltages, and peak position, while reducing size thereby enabling tunable threshold spiking neurons and logic gates. Combining these components, a mimic of the retinal pathway reproducing the wavelength and light intensity encoding of horizontal cells to spiking retinal ganglion cells is demonstrated. This work enables further incorporation of conformable and adaptive OECT electronics into biointegrated devices featuring sensory coding through parallel processing for diverse artificial intelligence and computing applications. Stable anti-ambipolar organic materials are limited, thus preventing the design of integrated, tunable, and multifunctional neuromorphic systems. Here, the authors report a small form factor neuromorphic circuit based on organic anti-ambipolar materials, mimicking the pre-processing functions of the retina. [ABSTRACT FROM AUTHOR]

One of the important problems in the environment is heavy metal pollution, and fluorescence is one of the best methods for their detection due to its sensitivity, selectivity, and relatively rapid and easy operation. In this study, 1,8-diaminonaphthalene functionalized super-stable mesoporous silica (DAN-LUS-1) was synthesized and used as a fluorescence probe to identify Hg2+ and Fe3+ in food samples. The TGA and FT-IR spectra illustrated that 1,8-diaminonaphthalene was grafted into LUS-1. XRD patterns verified that the LUS-1 and functionalized mesoporous silica have a hexagonal symmetrical array of nano-channels. SEM images showed that the rod-like morphology of LUS-1 was preserved in DAN-LUS-1. Also, surface area and pore diameter decreased from 824 m2 g⁻1 and 3.61 nm for the pure LUS-1 to 748 m2 g⁻1 and 3.43 nm for the DAN-LUS-1, as determined by N₂ adsorption–desorption isotherms. This reduction demonstrated that 1,8-diaminonaphthalene immobilized into the pore of LUS-1. The DAN-LUS-1 fluorescence properties as a chemical sensor were studied with a 340/407 nm excitation/emission wavelength that was quenched by Hg2+ and Fe3+ ions. Hg2+ and Fe3+ were quantified using the fluorescence response in the working range 8.25–13.79 × 10–6 and 3.84–10.71 × 10–6 mol/L, with detection limits of 8.5 × 10–8 M and 1.3 × 10–7 M, respectively. Hg2+ and Fe3+ were measured in vetiver grass and spinach. Since the Fe3+ quenching can move in the opposite direction with sodium hexametaphosphate (SHMP) as a hiding compound for Fe3+, consequently, the circuit logic system was established with Fe3+, Hg2+, and SHMP as inputs and the fluorescent quench as the output. [ABSTRACT FROM AUTHOR]

Networks throughout physics and biology leverage spatiotemporal dynamics for computation. However, the connection between structure and computation remains unclear. Here, we study a complex-valued neural network (cv-NN) with linear interactions and phase-delays. We report the cv-NN displays sophisticated spatiotemporal dynamics, which we then use, in combination with a nonlinear readout, for computation. The cv-NN can instantiate dynamics-based logic gates, encode short-term memories, and mediate secure message passing through a combination of interactions and phase-delays. The computations in this system can be fully described in an exact, closed-form mathematical expression. Finally, using direct intracellular recordings of neurons in slices from neocortex, we demonstrate that computations in the cv-NN are decodable by living biological neurons as the nonlinear readout. These results demonstrate that complex-valued linear systems can perform sophisticated computations, while also being exactly solvable. Taken together, these results open future avenues for design of highly adaptable, bio-hybrid computing systems that can interface seamlessly with other neural networks. Neural networks perform computations through finely tuned patterns of connections, but it remains unclear how these connections lead to specific computations. Here, the authors introduce a neural network that can perform computations while also being mathematically solvable, providing new insights into the link from connections to computation. [ABSTRACT FROM AUTHOR]

Computational technologies based on coupled oscillators are of great interest for energy efficient computing. A key to developing such technologies is the tunable control of the interaction among oscillators which today is accomplished by additional electronic components. Here we show that the synchronization of closely spaced vanadium dioxide (VO2) oscillators can be controlled via a simple thermal triggering element that itself is formed from VO2. The net energy consumed by the oscillators is lower during thermal coupling compared with the situation where they are oscillating independently. As the size of the oscillator shrinks from 6 μm to 200 nm both the energy efficiency and the oscillator frequency increases. Based on such oscillators with active tuning, we demonstrate AND, NAND, and NOR logic gates and various firing patterns that mimic the behavior of spiking neurons. Our findings demonstrate an innovative approach towards computational techniques based on networks of thermally coupled oscillators. The tunable control of the interaction among oscillators usually requires additional electronic components. Here, Li et al. show that the thermal coupling synchronizes neighboring VO2 oscillators without any extra electronic components, reducing the energy consumption. [ABSTRACT FROM AUTHOR]

In this work, an innovative design model aimed at enhancing the efficacy of ground-state probabilistic logic with a binary energy landscape (GSPL-BEL) is presented. This model enables the direct conversion of conventional CMOS-based logic circuits into corresponding probabilistic graphical representations based on a given truth table. Compared to the conventional approach of solving the configuration of Ising model-basic probabilistic gates through linear programming, our model directly provides configuration parameters with embedded many-body interactions. For larger-scale probabilistic logic circuits, the GSPL-BEL model can fully utilize the dimensions of many-body interactions, achieving minimal node overhead while ensuring the simplest binary energy landscape and circumventing additional logic synthesis steps. To validate its effectiveness, hardware implementations of probabilistic logic gates were conducted. Probabilistic bits were introduced as Ising cells, and cascaded conventional XNOR gates along with passive resistor networks were precisely designed to realize many-body interactions. HSPICE circuit simulation results demonstrate that the probabilistic logic circuits designed based on this model can successfully operate in free, forward, and reverse modes, exhibiting the simplest binary probability distributions. For a 2-bit × 2-bit integer factorizer involving many-body interactions, compared to the logic synthesis approach, the GSPL-BEL model significantly reduces the number of consumed nodes, the solution space (in the free-run mode), and the number of energy levels from 12, 4096, and 9–8, 256, and 2, respectively. Our findings demonstrate the significant potential of the GSPL-BEL model in optimizing the structure and performance of probabilistic logic circuits, offering a new robust tool for the design and implementation of future probabilistic computing systems. [ABSTRACT FROM AUTHOR]

Highlights: Transient response plays a crucial role as a performance indicator for organic electrochemical transistors (OECTs), particularly in their application in high-speed logic circuits and neuromorphic computing systems. This review presents a systematic overview on the fundamental principles underlying OECT transient responses, emphasizing the essential roles of transient electron and ion dynamics, as well as structural evolution, in both volatile and non-volatile behaviors. We also discuss the materials, morphology, device structure strategies on optimizing transient responses. The rapid development of organic electrochemical transistors (OECTs) has ushered in a new era in organic electronics, distinguishing itself through its application in a variety of domains, from high-speed logic circuits to sensitive biosensors, and neuromorphic devices like artificial synapses and organic electrochemical random-access memories. Despite recent strides in enhancing OECT performance, driven by the demand for superior transient response capabilities, a comprehensive understanding of the complex interplay between charge and ion transport, alongside electron–ion interactions, as well as the optimization strategies, remains elusive. This review aims to bridge this gap by providing a systematic overview on the fundamental working principles of OECT transient responses, emphasizing advancements in device physics and optimization approaches. We review the critical aspect of transient ion dynamics in both volatile and non-volatile applications, as well as the impact of materials, morphology, device structure strategies on optimizing transient responses. This paper not only offers a detailed overview of the current state of the art, but also identifies promising avenues for future research, aiming to drive future performance advancements in diversified applications. [ABSTRACT FROM AUTHOR]

CRISPR/Cas system has been widely applied in the assay of disease-related nucleic acids. However, it is still challenging to use CRISPR/Cas system to detect multiple nucleic acids at the same time. Herein, we combined the preponderance of DNA logic circuit, label-free, and CRISPR/Cas technology to construct a label-free "AND" logical gate for multiple microRNAs detection with high specificity and sensitivity. With the simultaneous input of miRNA-155 and miRNA-141, the logic gate starts, and the activation chain of Cas12a is destroyed; thus, the activity is inhibited and the fluorescence of the signal probe ssDNA-AgNCs is turned on. The detection limit of this method for simultaneous quantitative detection of double target is 84 fmol/L (S/N = 3). In this "AND" logic gate, it is only necessary for the design of a simple DNA hairpin probe, which is inexpensive and easy, and since this method involves only one signal output, the data processing is very simple. What is more important, in this strategy two types of microRNAs can be monitored simultaneously by only using CRISPR/Cas12a and a type of crRNA, which offers a new design concept for the exploitation of single CRISPR/Cas system for multiple nucleic acid assays. [ABSTRACT FROM AUTHOR]

With their regulated Boolean logic operations in vitro and in vivo, DNA logic circuits have shown great promise for target recognition and disease diagnosis. However, significant obstacles must be overcome to improve their operational efficiency and broaden their range of applications. In this study, we propose an Exo III-powered closed-loop DNA circuit (ECDC) architecture that integrates four highly efficient AND logic gates. The ECDC utilizes Exo III as the sole enzyme-activated actuator, simplifying the circuit design and ensuring optimal performance. Moreover, the use of Exo III enables a self-feedback (autocatalytic) mechanism in the dynamic switching between AND logic gates within this circulating logic circuit. After validating the signal flow and examining the impact of each AND logic gate on the regulation of the circuit, we demonstrate the intelligent determination of miR-21 using the carefully designed ECDC architecture in vitro. The proposed ECDC exhibits a linear detection range for miR-21 from 0 to 300 nM, with a limit of detection (LOD) of approximately 0.01 nM, surpassing most reported methods. It also shows excellent selectivity for miR-21 detection and holds potential for identifying and imaging live cancer cells. This study presents a practical and efficient strategy for monitoring various nucleic acid-based biomarkers in vitro and in vivo through specific sequence modifications, offering significant potential for early cancer diagnosis, bioanalysis, and prognostic clinical applications. [ABSTRACT FROM AUTHOR]

A novel fluorescence chemosensor BDP (2-(1-(benzothiazol-2-yl)-5-(4-(diphenylamino)phenyl)-4,5-dihydro-1H-pyrazol-3-yl)phenol) has been synthesized and its sensing behavior has been screened towards various cations by absorption, emission and mass spectroscopic techniques. The probe BDP detects Cu2+ ions preferentially over other metal ions, and the resulting BDP-Cu2+ ensemble acts as a secondary sensor for cyanide anion detection over other anions. The fluorescence intensity of the probe BDP is quenched when it comes into contact with Cu2+ ions, but it is increased reversibly when it comes into contact with cyanide anion, according to spectroscopic measurements. Along with this, optical studies indicate that the sensor BDP has capability to sense Cu2+ and CN- ions selectively over other examined competitive ions with the LOD of 2.57×10-8 M and 2.98×10-8 M respectively. The detection limit of Cu2+ ions is lower than the WHO recommended Cu2+ ions concentration (31.5 µM) in drinking water. On the basis of "on-off-on" fluorescence change of the probe BDP upon interaction with Cu2+ and CN- ions, a possible mechanism for this selective sensing behavior was presented and IMPLICATION logic gate was successfully designed. Furthermore, cell imaging investigations were used to investigate the probe BDP's biological applicability. [ABSTRACT FROM AUTHOR]

A new phenanthroimidazole-based fluorescence probe for selective detection of HClO was synthesized and characterized using 1HNMR, 13CNMR, IR, and HRMS. With benzenesulfonohydrazide as the identification group, the probe demonstrated a fast fluorescence response from yellow-green to blue when the HC = N double bond was oxidized and broken into an aldehyde group by HClO. The probe showed high selectivity and sensitivity towards HClO with approximately 4.5-fold fluorescence enhancement and has been successfully applied in the molecular logic gate, determination of HClO in environmental water samples, and portable HClO detection. [ABSTRACT FROM AUTHOR]

Traditional logic circuit emits energy into the environment due to information loss, and it is referred to be irreversible logic circuits. Reversible logic circuit is capable of diminishing power loss, quantum cost, and garbage output. Many academics have recently embraced reversible logic-based circuits exploiting all-optical technology to conduct their research. In this article, all-optical reversible adder and subtractor have been implemented using microring resonator-based Naveen Raymond reversible logic gate, for the first time to our knowledge. MATLAB serves as the tool for design and analysis of the proposed architecture at almost 260 Gbps operational speed. The ultrafast response times and compact design of the microring resonator-based circuits make them especially useful for digital signal processing and communication systems. Some performance reflecting factors such as "quality factor", "photon cavity lifetime", "extinction ratio", "contrast ratio", "amplitude modulation", "on-off ratio", and "relative eye opening" are explored and analyzed. Optimized design parameters have been selected in order to build the model practically. [ABSTRACT FROM AUTHOR]

Control of heat flow is critical for thermal logic devices and thermal management and has been explored theoretically. However, experimental progress on active control of heat flow has been limited. Here, we describe a nanoscale radiative thermal transistor that comprises of a hot source and a cold drain (both are ~250 nm-thick silicon nitride membranes), which are analogous to the source and drain electrodes of a transistor. The source and drain are in close proximity to a vanadium oxide (VOx)-based planar gate electrode, whose dielectric properties can be adjusted by changing its temperature. We demonstrate that when the gate is located close (< ~1 µm) to the source-drain device and undergoes a metal-insulator transition, the radiative heat transfer between the source and drain can be changed by a factor of three. More importantly, our nanomembrane-based thermal transistor features fast switching times (~ 500 ms as opposed to minutes for past three-terminal thermal transistors) due to its small thermal mass. Our experiments are supported by detailed calculations that highlight the mechanism of thermal modulation. We anticipate that the advances reported here will open new opportunities for designing thermal circuits or thermal logic devices for advanced thermal management. Authors make a nanoscale photonic thermal transistor capable of modulating thermal currents by a factor of 3 and a fast-switching time of ~500 ms, opening new opportunities for designing thermal circuits or thermal logic devices. [ABSTRACT FROM AUTHOR]

The paper reports simple yet effective circuits for realizing XOR and XNOR logic operations with polarity, each employing a single current conveyor. The proposed polar logic circuits require four MOS switches and two resistors, besides a single CCII+ (second generation current conveyor), in each case. The new proposed circuits are simulated using 0.18 µm CMOS process parameters with a ± 1.8 V supply voltage and reference DC voltage of 1 V, thus enabling polar logic outputs. The polar output for logic 0 and 1 is in form of − 1 V and + 1 V respectively. The results included in support of the work are promising for future applications of the proposal in design of communication circuits. To facilitate better integration prospects, the proposed circuits are further simplified by removing one of the two used resistors and replacing CCII by CCCII (current controlled current conveyor). The simplified polar XOR gate is also verified through simulations. System design applications are expected to evolve from proposed work. The new proposed circuits are expected to significantly contribute to the advancement of circuit design. [ABSTRACT FROM AUTHOR]

In traditional von Neumann computing architecture, the efficiency of the system is often hindered by the data transmission bottleneck between the processor and memory. A prevalent approach to mitigate this limitation is the use of non-volatile memory for in-memory computing, with spin–orbit torque (SOT) magnetic random-access memory (MRAM) being a leading area of research. In this study, we numerically demonstrate that a precise combination of damping-like and field-like spin–orbit torques can facilitate precessional magnetization switching. This mechanism enables the binary memristivity of magnetic tunnel junctions (MTJs) through the modulation of the amplitude and width of input current pulses. Building on this foundation, we have developed a scheme for a reconfigurable spintronic logic gate capable of directly implementing Boolean functions such as AND, OR, and XOR. This work is anticipated to leverage the sub-nanosecond dynamics of SOT-MRAM cells, potentially catalyzing further experimental developments in spintronic devices for in-memory computing. [ABSTRACT FROM AUTHOR]

Today, almost all information processing is performed using electronic logic circuits operating at several gigahertz frequency. All-optical logic holds the promise to allow for up to three orders of magnitude higher speed. Whereas essential all-optical transistor functionalities were demonstrated across a range of platforms, utilising them to implement a complete Boolean logic gate set and in particular negation, i.e. switching off an optical signal with another, weaker, optical signal, poses a major challenge. Here, we realize a cascadable NOT gate by introducing the concept of non-ground-state polariton amplification in organic semiconductor microcavities under non-resonant optical excitation. We unravel the importance of vibron-mediated stimulated scattering in room temperature operation of the inverter. Moreover, we extend the concept to a multi-input universal NOR logic gate, where in the presence of any of the input signals non-ground-state amplification supersedes spontaneous ground-state condensation, resulting in a NOR gate with ~1 ps switching time. The realisation of an ultrafast universal logic gate constitutes an essential step for more complex optical circuitry that could boost information processing applications. A cascadable all-optical NOT gate is a requirement for full-logic in optical computing. By introducing the concept of non-ground-state polariton amplification in organic semiconductor microcavities, the authors realized the operation of an all-optical cascadable universal gate. [ABSTRACT FROM AUTHOR]

Nonreciprocal quantum transport effect is mainly governed by the symmetry breaking of the material systems and is gaining extensive attention in condensed matter physics. Realizing electrical switching of the polarity of the nonreciprocal transport without external magnetic field is essential to the development of nonreciprocal quantum devices. However, electrical switching of superconducting nonreciprocity remains yet to be achieved. Here, we report the observation of field-free electrical switching of nonreciprocal Ising superconductivity in Fe3GeTe2/NbSe2 van der Waals (vdW) heterostructure. By taking advantage of this electrically switchable superconducting nonreciprocity, we demonstrate a proof-of-concept nonreciprocal quantum neuronal transistor, which allows for implementing the XOR logic gate and faithfully emulating biological functionality of a cortical neuron in the brain. Our work provides a promising pathway to realize field-free and electrically switchable nonreciprocity of quantum transport and demonstrate its potential in exploring neuromorphic quantum devices with both functionality and performance beyond the traditional devices. The authors demonstrate magnetic-field-free electric switching of superconducting nonreciprocity in Fe3GeTe2/NbSe2 heterostructures. They apply this to propose and demonstrate a proof-of-concept "neural transistor", a tetrode device that realizes an XOR gate with only a single transistor. [ABSTRACT FROM AUTHOR]

A rapid and effective strategy has been devised for the swift development of a Zn(II)-ion-based supramolecular metallohydrogel, termed Zn@PEH, using pentaethylenehexamine as a low molecular weight gelator. This process occurs in an aqueous medium at room temperature and atmospheric pressure. The mechanical strength of the synthesized Zn@PEH metallohydrogel has been assessed through rheological analysis, considering angular frequency and oscillator stress dependencies. Notably, the Zn@PEH metallohydrogel exhibits exceptional self-healing abilities and can bear substantial loads, which have been characterized through thixotropic analysis. Additionally, this metallohydrogel displays injectable properties. The structural arrangement resembling pebbles within the hierarchical network of the supramolecular Zn@PEH metallohydrogel has been explored using FESEM and TEM measurements. EDX elemental mapping has confirmed the primary chemical constituents of the metallohydrogel. The formation mechanism of the metallohydrogel has been analyzed via FT-IR spectroscopy. Furthermore, zinc(II) metallohydrogel (Zn@PEH)-based Schottky diode structure has been fabricated in a lateral metal–semiconductor-metal configuration and it's charge transport behavior has also been studied. Notably, the zinc(II) metallohydrogel-based resistive random access memory (RRAM) device (Zn@PEH) demonstrates bipolar resistive switching behavior at room temperature. This RRAM device showcases remarkable switching endurance over 1000 consecutive cycles and a high ON/OFF ratio of approximately 270. Further, 2 × 2 crossbar array of the RRAM devices were designed to demonstrate OR and NOT logic circuit operations, which can be extended for performing higher order computing operations. These structures hold promise for applications in non-volatile memory design, neuromorphic and in-memory computing, flexible electronics, and optoelectronic devices due to their straightforward fabrication process, robust resistive switching behavior, and overall system stability. [ABSTRACT FROM AUTHOR]

This article, published in Mathematical Notes, discusses the testing of logic circuits that implement Boolean functions. The authors explore the concepts of diagnostic test sets and fault detection test sets for circuits affected by faults. They define these test sets and discuss their cardinality, as well as introduce the Shannon function to measure the cardinality of these test sets. The authors specifically focus on the behavior of diagnostic test sets with respect to local mirror faults at the circuit inputs and provide estimates for the Shannon functions of these test sets. The article concludes with funding information and a declaration of no conflicts of interest. [Extracted from the article]

Quantum-dot Cellular Automata (QCA) is an emerging nanotechnology that explores the potential of using quantum effects to build compact and energy-efficient computational devices. The hardware attacks on QCA primarily target understanding the physical structure and operation of these nanotechnological circuits. The circuits like cryptographic processors hold sensitive data that needs protection from third-party attacks. Logic locking is a hardware protection technique that adds additional gates to the original circuits to prevent circuits from these attacks. In this work, a new logic locking approach is proposed for QCA based circuits. The new configurable logic gate or key gate is introduced for logic locking. This gate can be configured to either wire or inverter based on key gate inputs. Further, the metaheuristic optimization based optimal key gate placement algorithm proposed to achieve higher security with minimum key gate placement. The proposed approach is verified in QCA benchmark circuits using QCA-Designer. Results shows that the proposed achieves maximum security with minimal gate replacements. [ABSTRACT FROM AUTHOR]

A research project on chemical AI, called the Molecular Cybernetics Project, was launched in Japan in 2021 with the goal of creating a molecular machine that can learn a type of conditioned reflex through the process of classical conditioning. In this project, we have developed a learning method for the network of such learning molecular machines, which is reported in this paper. First, as a model of a learning molecular machine, we formulate a logic gate that can learn conditioned reflex and introduce the network of the logic gates. Then we derive a key principle for learning, called the flipping principle, by which we present a learning algorithm for the network to realize a desired function. [ABSTRACT FROM AUTHOR]

Holonomic quantum computing offers a promising paradigm for quantum computation due to its error resistance and the ability to perform universal quantum computations. Here, we propose a scheme for the rapid implementation of a holonomic swap gate in neutral atomic systems, based on the selective Rydberg pumping mechanism. By employing time-dependent soft control, we effectively mitigate the impact of off-resonant terms even at higher driving intensities compared to time-independent driving. This approach accelerates the synthesis of logic gates and passively reduces the decoherence effects. Furthermore, by introducing an additional atom and applying the appropriate driving field, our scheme can be directly extended to implement a three-qubit controlled-swap gate. This advancement makes it a valuable tool for quantum state preparation, quantum switches, and a variational quantum algorithm in neutral atom systems. [ABSTRACT FROM AUTHOR]

Attribute-based encryption is a new cryptographic primitive that supports fine-grained access control of cloud data, and its access control function relies on the interaction of attributes and access structures. To achieve more flexible access control, attribute revocation has become an important problem that must be considered in the application process of attribute-based encryption. We propose and implement an efficient revocable ciphertext policy attribute-based encryption scheme based on the improvement of the scheme proposed by Tomida et al. Our scheme has the following characteristics: (1) It is adaptively secure under the Matrix Decisional Diffie–Hellman assumption; (2) it supports the multi-use of attribute classes and the negation of attribute values; (3) it supports the revocation of system attributes; and (4) the update of the key and ciphertext is completed by the trusted center and the cloud server, respectively, thereby decreasing revocation overhead for users. [ABSTRACT FROM AUTHOR]

Intensive research has been carried out on two-dimensional materials, in particular molybdenum disulfide, towards high-performance field effect transistors for integrated circuits1. Fabricating transistors with ohmic contacts is a challenging task due to the formation of a high Schottky barrier that severely limits the performance of the transistors for real-world applications. Graphene-based heterostructures can be used in addition to, or as a substitute for unsuitable metals. In this paper, we present lateral heterostructure transistors made of scalable chemical vapor-deposited molybdenum disulfide and chemical vapor-deposited graphene achieving a low contact resistances of about 9 kΩ·µm and high on/off current ratios of 108. Furthermore, we also present a theoretical model calibrated on our experiments showing further potential for scaling transistors and contact areas into the few nanometers range and the possibility of a substantial performance enhancement by means of layer optimizations that would make transistors promising for use in future logic integrated circuits. [ABSTRACT FROM AUTHOR]

mRNA medicines can be used to express therapeutic proteins, but the production of such proteins in non-target cells has a risk of adverse effects. To accurately distinguish between therapeutic target and nontarget cells, it is desirable to utilize multiple proteins expressed in each cell as indicators. To achieve such multi-input translational regulation of mRNA medicines, in this study, we engineered Rhodothermus marinus (Rma) DnaB intein to develop "caged Rma DnaB intein" that enables conditional reconstitution of full-length translational regulator protein from split fragments. By combining the caged Rma DnaB intein, the split translational regulator protein, and target protein-binding domains, we succeeded in target protein-dependent translational repression of mRNA in human cells. In addition, the caged Rma intein showed orthogonality to the previously reported Nostoc punctiforme (Npu) DnaE-based caged intein. Finally, by combining these two orthogonal caged inteins, we developed an mRNA-based logic gate that regulates translation based on the expression of multiple intracellular proteins. This study provides important information to develop safer mRNA medicines. [ABSTRACT FROM AUTHOR]

High leakage power consumption has become one of the main concerns of data security protection with CMOS device scaling. Spintronic technology is one of the efficient solutions to control circuit leakage power consumption by benefiting from its non-volatility property. Spintronic devices such as magnetic tunnel junctions (MTJs) are also compatible with CMOS transistors and suitable for designing hybrid MTJ/CMOS circuits. Hybrid MTJ/CMOS circuits can be used in many applications, such as logic-in-memory (LiM) and high-security structures. These circuits demonstrate enhanced data security compared to CMOS-based circuits by leveraging their non-volatile feature, making information leakage and data access more challenging. However, these circuits are not completely immune to attacks, and information can be revealed by potent power analysis attacks such as differential power analysis (DPA) and correlation power analysis (CPA). This paper investigates the resistance to side-channel attacks, especially DPA and CPA, for the magnetoresistive RAM (MRAM) and hybrid MTJ/CMOS AND, OR, XOR gates, hybrid MTJ/CMOS full-adder, and multiplexer circuits. Comprehensive post-layout simulation results using 40 nm TSMC CMOS technology, Monte-Carlo results, and values of normalized energy deviation (NED), normalized standard deviation (NSD)), and normalized power deviation (NPD) of PCSA-based MRAM indicate that the power consumption pattern remains constant in circuits with symmetrical structures in the reading phase even in the presence of inevitable process variation, so these circuits are resilient to power attacks and are competent for use in high-security applications such as hardware implementation of encryption algorithms. [ABSTRACT FROM AUTHOR]

In this paper, we propose a single photonic crystal structure to implement NOT/XOR/OR optical logic gates using interference phenomenon. The gates are designed as T-shaped waveguides. The filter rods used in the design enhance the contrast ratio by up to 82.25 dB compared with the existing designs reported in the literature so far, and provides a maximum bit rate of 1.567Tbps with a response time of 0.63 ps. The proposed design exhibits minimum power loss, and performance parameters are enhanced compared to existing reported works. Photonic logic gates emerged as a potential substitute for their traditional electronic counterparts due to quick speed, low power consumption, and compatibility with current optical communication networks. The size of the proposed device is 144 μm2, can be used for future optical computing and communications. [ABSTRACT FROM AUTHOR]

There is a rising demand for low-cost, high-information-capacity optical signal processing. The number of devices is limited of performing different Boolean functions using a single unit. In the current manuscript, six basic logic gates, including OR, XOR, NAND, AND, NOR, and XNOR, are implemented in a single unit utilizing all-optical silicon microring resonator. At first, three microring resonators are used to get the AND, XOR and NOR logic functions. Then, beam combiners are used to get the OR, NAND and XNOR functions from AND, XOR, and NOR functions. In MATLAB, the suggested design is numerically simulated to verify the functions at an operational speed of nearly 260 Gbps. The required pump power for switching is only 1.95 mW for microring resonator based switch which is very less comparatively. Also, some performance parameters like "extinction ratio", "contrast ratio", "amplitude modulation", "on–off ratio", and "quality factor" are evaluated. To design the circuit practically, optimized parameters of the circuits have been selected. The obtained values of "extinction ratio" and "contrast ratio" are 14.97 dB and 19.03 dB, respectively. The value of AM is 0.17 dB which is less than 1 dB. The on–off ratio of the MRR is 35.10 dB which is much higher than expected. [ABSTRACT FROM AUTHOR]

Functional circuits are a group of combinational logic circuits which may be utilized for certain tasks and with specific planning. Decoders, multiplexers, and demultiplexers are all functional circuits that come in useful when creating complex systems. Quantum-dot cellular automata (QCA) is a flourishing technology that would be so practical in the field of computational digital circuits in terms of its advantages such as low energy consumption. This paper proposes various quaternary 1:4 decoders (enabling decoder, active-high and active-low decoders). Then, 4:1 multiplexer and 1:4 demultiplexer were architectured using the proposed 1:4 decoder. In the following, a quaternary to the binary converter (a 4-valued digit to a 2-bits circuit) is designed regarding the validated proposed structures. All designs were simulated and verified by QCASim. The total area used for the decoder, multiplexer, demultiplexer, and quaternary to the binary converter are 0.01, 0.19, 0.03, 0.13 μm2. The complexity and delay are 30, 387, 88, 214 and 0.5, 3.25, 1, 2 respectively. This work gets compared to CMOS and carbon nanotube field-effect transistor articles. Furthermore, the proposed 4:1 quaternary QCA multiplexer got compared with the binary QCA multiplexers. The comparison results show that our proposed designs are efficient in terms of having a low delay, area, and complexity. [ABSTRACT FROM AUTHOR]

Skin-like field-effect transistors are key elements of bio-integrated devices for future user-interactive electronic-skin applications. Despite recent rapid developments in skin-like stretchable transistors, imparting self-healing ability while maintaining necessary electrical performance to these transistors remains a challenge. Herein, we describe a stretchable polymer transistor capable of autonomous self-healing. The active material consists of a blend of an electrically insulating supramolecular polymer with either semiconducting polymers or vapor-deposited metal nanoclusters. A key feature is to employ the same supramolecular self-healing polymer matrix for all active layers, i.e., conductor/semiconductor/dielectric layers, in the skin-like transistor. This provides adhesion and intimate contact between layers, which facilitates effective charge injection and transport under strain after self-healing. Finally, we fabricate skin-like self-healing circuits, including NAND and NOR gates and inverters, both of which are critical components of arithmetic logic units. This work greatly advances practical self-healing skin electronics. Integrating self-healing capabilities into skin-like stretchable transistors presents a persistent challenge. Here, by using a supramolecular polymer matrix, the authors develop autonomous self-healing transistors and skin-like logic circuits. [ABSTRACT FROM AUTHOR]

A highly efficient fluorescent sensor (S-DAC) was easily created by functionalizing the SBA-15 surface with N-(2-Aminoethyl)-3-Aminopropyltrimethoxysilane followed by the covalent attachment of 7-diethylamino 3-acetyl coumarin (DAC). This chemosensor (S-DAC) demonstrates selective and sensitive recognition of Fe3+ and Hg2+ in water-based solutions, with detection limits of 0.28 × 10–9 M and 0.2 × 10–9 M for Hg2+ and Fe3+, respectively. The sensor's fluorescence characteristics were examined in the presence of various metal ions, revealing a decrease in fluorescence intensity upon adding Fe3+ or Hg2+ ions at an emission wavelength of 400 nm. This sensor was also able to detect ferric and mercury ions in spinach and tuna fish. The quenching mechanism of S-DAC was investigated using UV–vis spectroscopy, which confirmed a static-type mechanism for fluorescence quenching. Moreovre, the decrease in fluorescence intensity caused by mercury and ferric ions can be reversed using trisodium citrate dihydrate and EDTA as masking agents, respectively. As a result, a circuit logic gate was designed using Hg2+, Fe3+, trisodium citrate dihydrate, and EDTA as inputs and the quenched fluorescence emission as the output. [ABSTRACT FROM AUTHOR]

The most important component of implementation of quantum systems is the quantum gate. Efficient implementation of quantum gates is an important challenge for the development of quantum computing. This research is one of the first approaches in the field of implementation of quantum gates by logic gates using crystal photonics. In this paper, a new structure of CNOT quantum gate is designed using two-dimensional photonic crystals and implemented using XOR logic gate. The overall size of this proposed structure based on photonic crystal with silicon rods is equal to 25 × 35 μm, and the response time is equal to 0.53 ps. The proposed structure offers small area and fast response time that makes it suitable for high-speed applications. Separation between input and output ports is one of the features that has been given special attention in the design. [ABSTRACT FROM AUTHOR]

We construct solutions of the Yang–Baxter equation in any dimension by directly generalizing the previously found solutions for . We equip those solutions with unitarity and entangling properties. Being unitary, they can be turned into -qudit quantum logic gates for qudit-based systems. The entangling property enables each of those solutions, together with all -qudit gates, to form a universal set of quantum logic gates. [ABSTRACT FROM AUTHOR]

Mechanical computing offers a new modality to formulate computational autonomy in intelligent matter or machines without any external powering or active elements. Transition (or solitary) waves, induced by nonreciprocity in mechanical metamaterials comprising a chain of bistable elements, have proven to be a key ingredient for dissipation-free transmission and computation of mechanical information. However, advanced processing of mechanical information in existing designs is hindered by its dissipation when interacting with networked logic gates. Here, we present a metamaterial design strategy that allows non-dispersive mechanical solitary waves to compute multi-level cascaded logic functions, termed 'integrated mechanical computing', by propagating through a network of structurally heterogeneous computing units. From a perspective of characteristic potential energy, we establish an analytical framework that helps in understanding the solitary wave-based mechanical computation, and governs the mechanical design of key determinants for realizing cascaded logic computation, such as soliton profile and logic elements. The developed integrated mechanical computing systems are shown to receive, transmit and compute mechanical information to actuate intelligent soft machine prototypes in a seamless and integrated manner. These findings would pave the way for future intelligent robots and machines that perform computational operations between various non-electrical environmental inputs. Many mechanical computation platforms developed till date lack a rational design strategy and have limited computational functions, such as stand-alone single logic gates, or deformation/transition behaviors. Byun at al. have reported a systematic design principle for integrated mechanical computing that enables the electronics-free design of autonomous and intelligent soft machines, which are seamlessly integrated. [ABSTRACT FROM AUTHOR]

Reconfigurable devices can be used to achieve multiple logic operation and intelligent optical sensing with low power consumption, which is promising candidates for new generation electronic and optoelectronic integrated circuits. However, the versatility is still limited and need to be extended by the device architectures design. Here, we report an asymmetrically gate two-dimensional (2D) van der Waals heterostructure with hybrid dielectric layer SiO2/hexagonal boron nitride (h-BN), which enable rich function including reconfigurable logic operation and in-sensor information encryption enabled by both volatile and nonvolatile optoelectrical modulation. When the partial gate is grounded, the non-volatile light assisted electrostatic doping endowed partially reconfigurable doping between n-type and p-type, which allow the switching of logic XOR and not implication (NIMP). When the global gate is grounded, additionally taking the optical signal as another input signal, logic AND and OR is realized by combined regulation of the light and localized gate voltage. Depending on the high on/off current ratio approaching 105 and reliable & switchable logic gate, in-sensor information encryption and decryption is demonstrated by manipulating the logic output. Hence, these results provide strong extension for current reconfigurable electronic and optoelectronic devices. [ABSTRACT FROM AUTHOR]

The principal design concern in today's very large-scale integration (VLSI) industry is power dissipation. Power dissipation in a chip rises reliability issues. Static power dissipation places a bottleneck in scaling down the dimensions and supply voltage of metal oxide semiconductor field effect transistor (MOSFET). Short channel effects (SCEs) put a limit on MOSFET scaling. At the lower technology nodes, the control of the gate over the channel is lost in MOSFET. Fin-shaped field effect transistor (FinFETs) uses multiple gates to gain much electrostatic control over the channel. FinFET not only improves the drive current but also reduces the subthreshold leakage. This paper proposes a novel power-efficient technique for the nanoscale regime. The simulation results are derived using Mentor Graphics at a 16 nm node. The power is reduced by 91.45% and 89.01% in the proposed MOSFET and FinFET-based inverter, respectively. A chain of 5-inverters is designed as a benchmark circuit to check the performance comparisons. In the proposed MOSFET and FinFET-based benchmark circuit, there is a power delay product (PDP) reduction of 80.28%, and 99.87%, respectively. The effect of process voltage and temperature (PVT) variations for the robustness of the technique is also discussed. The proposed technique provides the power-efficient and robustness operation against the variations as compared to the other methods. [ABSTRACT FROM AUTHOR]

The emergence of high-form-factor electronics has led to a demand for high-density integration of inorganic thin-film devices and circuits with full stretchability. However, the intrinsic stiffness and brittleness of inorganic materials have impeded their utilization in free-form electronics. Here, we demonstrate highly integrated strain-insensitive stretchable metal-oxide transistors and circuitry (442 transistors/cm2) via a photolithography-based bottom-up approach, where transistors with fluidic liquid metal interconnection are embedded in large-area molecular-tailored heterogeneous elastic substrates (5 × 5 cm2). Amorphous indium-gallium-zinc-oxide transistor arrays (7 × 7), various logic gates, and ring-oscillator circuits exhibited strain-resilient properties with performance variation less than 20% when stretched up to 50% and 30% strain (10,000 cycles) for unit transistor and circuits, respectively. The transistors operate with an average mobility of 12.7 (± 1.7) cm2 V−1s−1, on/off current ratio of > 107, and the inverter, NAND, NOR circuits operate quite logically. Moreover, a ring oscillator comprising 14 cross-wired transistors validated the cascading of the multiple stages and device uniformity, indicating an oscillation frequency of ~70 kHz. Developing integrated stretchable metal-oxide transistors and circuits is challenging. Here, Kang et al. leveraged molecular-tailored elastic substrates for enhanced adhesion, thus achieving high performance and logical operation across various circuits under high strain. [ABSTRACT FROM AUTHOR]

Modern applications need to flexibly adjust the processing process according to the different environments and real-time processing, thus putting forward higher requirements for the reconfiguration performance of coarse-grained reconfigurable architecture (CGRA). Traditional dynamic reconfiguration requires constant configuration of the processor by the host computer. Still, this reconfiguration method severely restricts switching different tasks, making it difficult to achieve dynamic real-time reconfiguration and limiting performance improvement. This paper presents a real-time monitoring-based self-reconfiguration mechanism (RMSRM) based on the implementation of CGRA. This mechanism improves the reconfiguration performance by monitoring the execution process of the array in real-time through a programmable controller on the basis of the homogeneous processing element (PE) array and dynamic scheduling of PE array resources according to different application requirements. The proposed RMSRM is capable of feeding array execution state information to the programmable controller within 1 clock cycle, switching configurations between different tasks within 10 clock cycles, and shutting down the unnecessary PE/PEs according to the current configuration. To verify the correctness and efficiency, we model hardware with synthesizable RTL coding and implement it on FPGA and a chip. The experimental results show that RMSRM can effectively reduce the reconfiguration overhead compared with traditional reconfiguration methods. The volume of bits in the configuration file has decreased by an average of 39.37%, and the reconfiguration time has decreased by an average of 43.57%. Based on the SMIC 55nm process, the operating frequency can reach 320 MHz. Meanwhile, the resource consumption is 80506 logic gates, the chip area is 12 mm 2 , and the energy efficiency is 312 GOPS/W. [ABSTRACT FROM AUTHOR]

This work presents a novel approach to quantum computing by proposing a customizable hardware design of a dedicated processor that emulates the execution of quantum algorithms. Unlike software-based quantum computation simulators, which run on standard general-purpose computers and suffer from reduced performance, this hardware design, which is based on classical concepts of bits, registers and memories, aims to leverage pure parallelism and pipelined execution for efficient quantum computations via emulation. The architecture includes several key components: memories, computation unit, measurement unit and control unit. The quantum state memory stores the individual and group states of qubits. This memory is crucial for maintaining the quantum information required for quantum operations. Basic operators are stored in dedicated operator memory. Additionally, a scratch memory allows for larger operators to be dynamically built at runtime. The computation unit is responsible for performing complex number multiplications, which form the basis of tensor and matrix products necessary for executing quantum operations. A measurement unit enables quantum state sampling, which is an essential aspect of quantum computation. Furthermore, a control unit is incorporated to ensure the correct operation of the quantum processor's data path. It utilizes a microprogram to manage and coordinate the functional units. All the functional units communicate with each other through dedicated and shared data buses, depending on the frequency of information exchange. This enables efficient data transfer and coordination among the components. The proposed hardware design has been simulated and proved to be effective in executing quantum operations. By exploiting parallelism and employing a pipelined execution, this architecture overcomes the limitations of software-based simulators, delivering improved performance for emulating quantum algorithms. We use Grover's search algorithm as a benchmark to evaluate the performance of the proposed hardware design and compare it to software-based simulation and to hardware-based algorithm-dedicated emulation. [ABSTRACT FROM AUTHOR]

Arithmetic Optimization Algorithm (AOA) is a heuristic method developed in recent years. The original version was developed for continuous optimization problems. Its success in binary optimization problems has not yet been sufficiently tested. In this paper, the binary form of AOA (BinAOA) has been proposed. In addition, the candidate solution production scene of BinAOA is developed with the xor logic gate and the BinAOAX method was proposed. Both methods have been tested for success on well-known uncapacitated facility location problems (UFLPs) in the literature. The UFL problem is a binary optimization problem whose optimum results are known. In this study, the success of BinAOA and BinAOAX on UFLP was demonstrated for the first time. The results of BinAOA and BinAOAX methods were compared and discussed according to best, worst, mean, standard deviation, and gap values. The results of BinAOA and BinAOAX on UFLP are compared with binary heuristic methods used in the literature (TSA, JayaX, ISS, BinSSA, etc.). As a second application, the performances of BinAOA and BinAOAX algorithms are also tested on classical benchmark functions. The binary forms of AOA, AOAX, Jaya, Tree Seed Algorithm (TSA), and Gray Wolf Optimization (GWO) algorithms were compared in different candidate generation scenarios. The results showed that the binary form of AOA is successful and can be preferred as an alternative binary heuristic method. [ABSTRACT FROM AUTHOR]

Heart disease-related deaths have increased in recent decades, with most patients dying of sudden cardiac arrest. In such instances, the effect of regular electrocardiogram (ECG) measurements is minimal. Therefore, long-term ECG monitoring has become increasingly important. In this paper, we report a non-adhesive high accuracy ECG monitoring system that can be used in various scenarios without interfering with daily activities. The ECG ultra-thin film electrode is made by water-resistant material based on poly(3,4-ethylenedioxythiophene) poly(4-styrenesulfonate) (PEDOT: PSS) electrode doped with ethylene glycol (EG) and xylitol, to improve the noise signal caused by sweat. The optimal ratio of the three ingredients of PEDOT: PSS/xylitol/EG was determined experimentally to accommodate the ECG monitoring. By using the proposed selectively closed multi-channel single-lead logic circuit, the noise of ECG signal received from the proposed film electrode can be successfully reduced during broad-area electrode measurements, thus to improve ECG measurement accuracy. [ABSTRACT FROM AUTHOR]

We propose a quantum processor architecture, the qubit 'pipeline', in which run-time scales additively as functions of circuit depth and run repetitions. Run-time control is applied globally, reducing the complexity of control and interconnect resources. This simplification is achieved by shuttling N-qubit states through a large layered physical array of structures which realise quantum logic gates in stages. Thus, the circuit depth corresponds to the number of layers of structures. Subsequent N-qubit states are 'pipelined' densely through the structures to efficiently wield the physical resources for repeated runs. Pipelining thus lends itself to noisy intermediate-scale quantum (NISQ) applications, such as variational quantum eigensolvers, which require numerous repetitions of the same or similar calculations. We illustrate the architecture by describing a realisation in the naturally high-density and scalable silicon spin qubit platform, which includes a universal gate set of sufficient fidelity under realistic assumptions of qubit variability. [ABSTRACT FROM AUTHOR]

To date, two-qubit quantum logic gates have become an essential part of quantum computing. The study of methods for their implementation is an important practical problem for various quantum optical and information applications. In this paper, we have considered a protocol for multimode quantum non-demolition interaction between an atomic ensemble and multimode light with orbital angular momentum in order to analyze the applicability of this protocol in discrete variables computing. We have developed a multimode interaction Hamiltonian and analyzed the dynamics of field and atomic variables depending on the structure of the driving field. We discuss in detail the procedure for separating qubit noninteracting subsystems on a set of atomic and field modes for various values of the orbital angular momentum of the driving field. Such a procedure helps to reduce the considered protocol to the parallel evolution of two-qubit closed systems. [ABSTRACT FROM AUTHOR]

Logical gates have been used in implementation of logic sequential and combinational circuits especially in computers, DSPs and microprocessors. They are mostly fabricated based on CMOS technology that provides a few nano-seconds of delay for each digital gate. Due to limitations in more scaling CMOS transistors and cause of short channel effects, some engineers and researchers believe that there is a huge demand for new devices and fabrication technologies to produce faster logic gates. In this paper, a new architecture for NAND gate is presented which operates based on mechanical resonance of a network of weakly coupled resonators that resonate in radio frequencies. This design is achieved by employing the associative memory property of Hopfield neural networks and the theory of weakly coupled resonators. The main advantage of the proposed design is in its capability to reach out delay times of the order of 1 nano-seconds or even less. One solution to decrease the delay time can be increasing the resonance frequency of resonators which are processing elements of resonators network. In this paper just the new idea of implementation NAND gate based on weakly coupled RF MEMS resonators is presented and evaluated. Other criteria like gate power consumption, effects of temperature, fan in, fan out and noise margin are not discussed. Regarding the rapid growth in MEMS technology, resonators with super high frequency (SHF 3–30 GHz) are now available and those with Extremely High frequency (EHF 30–300 GHz) will soon be in market which enables the presented design to achieve higher speeds. In addition, mechanical resonators are more fault tolerant than CMOS circuits when utilized in harsh environments which exposed to ionic beams or electron beam radiations. In space applications, the satellite and payload are exposed to huge bombardments of space electrons and ions beams. So, the proposed NAND gate can be a good solution for enhancing reliability of devices and systems exposed to space radiations. [ABSTRACT FROM AUTHOR]

Current-induced domain wall (DW) motion in ferromagnetic nanostructures is an important research area to realize spin-based logic devices. Using micromagnetic simulations, we have designed and demonstrated a NOT gate logic operation via DW chirality flipping in a ferromagnetic nanostructure with an anti-dot. The DW chirality flipping is due to the Walker breakdown occurring at the anti-dot structure. The DW configuration transforms from a transverse DW (TDW) to an anti-vortex DW and back to TDW, however, with opposite chirality when driven by a particular current density. The device is capable of bidirectional operation, wherein the DW driven in both directions undergoes chirality flipping. The DW speed is a critical parameter for the logic operation. The dimensions of the anti-dot govern the DW speed; thus, the successful operation is seen only below the critical anti-dot width. Moreover, the DW needs to travel a certain distance before it can undergo Walker breakdown, making the anti-dot length also a key parameter. Finally, the current density is a pivotal factor in the logic-gate operation. At relatively lower current densities, the DW does not undergo Walker breakdown, whereas it may undergo Walker breakdown with several transformations before it reaches the output at higher current densities. We have shown the window of successful NOT gate logic operation, as a function of anti-dot width, length, and current density. [ABSTRACT FROM AUTHOR]