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This paper presents an extensive comparative analysis of the experimental results of chemical stabilisation of clayey soil in laboratory conditions by comparing the effects of adding conventional stabilisers (lime, cement binder), stabilisers that can be considered as waste material (fly ash, rock flour), as well as alternative chloride-based materials (ferric chloride, calcium chloride, potassium chloride) on the geomechanical properties of the soil. With the aim of determining the stabiliser optimal content in the mixture with the soil, in the first part of the research, the effects of stabilisation of clayey soil of medium plasticity using the considered stabilisers with different percentage share on the change in uniaxial compressive strength (UCS) and pH value of the soil at different time intervals after the treatment were analysed. In the second part of the research, additional tests were conducted on soil samples with optimal content for each of the considered stabilisers by monitoring changes in the physical and mechanical properties of the soil. These include Atterberg’s limits (liquid limit and plasticity limit), modulus of compressibility in the oedometer, California bearing ratio (CBR), and swelling potential at different time intervals after the chemical treatment to determine the durability of stabilisation effects. The results of the conducted research reveal that each of the conventional, waste, and alternative materials considered as chemical stabilisers contributes to the improvement of the geomechanical properties of the clayey soil, primarily in terms of increasing the bearing capacity and reducing the swelling of the treated soil.

This study aimed to comprehensively understand the performance and degradation of both p- and n-channel vertical double diffused MOS (VDMOS) transistors under bias temperature stress. Conducted experimental investigations involved various stress conditions and annealing processes to analyze the impacts of BT stress on the formation of oxide trapped charge and interface traps, leading to threshold voltage shifts. Findings revealed meaningful threshold voltage shifts in both PMOS and NMOS devices due to stresses, and the subsequent annealing process was analyzed in detail. The study also examined the influence of stress history on self-heating behavior under real operating conditions. Additionally, the study elucidated the complex correlation between stress-induced degradation and device reliability. The insights contribute to optimizing the performance and permanence of VDMOS transistors in practical applications, advancing semiconductor technology. This study underscored the importance of considering stress-induced effects on device reliability and performance in the design and application of VDMOS transistors.