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The paper presents a new design for a compact memristor emulator that uses a single active component and a grounded capacitor. This design incorporates a current backward transconductance amplifier as the active element, enabling the emulation of both grounded and floating memristors in incremental and decremental modes. The paper provides an in-depth analysis of the circuit, covering ideal, non-ideal, and parasitic factors. The theoretical performance of the memristor emulator is confirmed through post-layout simulations with 180 nm generic process design kit (gpdk) technology, demonstrating its capability to operate at low voltages (±1 V) with minimal power consumption. Additionally, the emulator shows strong performance under variations in process, voltage, and temperature (PVT) and functions effectively at a frequency of 2 MHz. Experimental validation using commercially available integrated circuits further supports the proposed design. [ABSTRACT FROM AUTHOR]

The memristor, a novel device, has been widely utilized due to its small size, low power consumption, and memory characteristics. In this paper, we propose a new three-dimensional discrete memristor map based on coupling a one-dimensional chaotic map amplifier with a memristor. Firstly, we analyzed the memristor model to understand its characteristics. Then, a Simulink model for this three-dimensional discrete memristor map was developed. Lastly, the complex dynamical characteristics of the system were analyzed via equilibrium points, bifurcation diagrams, Lyapunov exponent spectra, complexity, and multistability. This study revealed the phenomena of coexisting attractors and hyperchaotic attractors. Simulink modeling confirmed that the discrete memristors effectively enhanced the chaos complexity in the three-dimensional discrete memristor map. This approach addresses the shortcomings of randomness, the lack of ergodicity, and the small key space in a one-dimensional chaotic map, thereby enriching the theoretical analysis and circuit implementation of chaos. [ABSTRACT FROM AUTHOR]

The optically gated transistor (OGT) has been previously demonstrated as a viable selector device for memristor devices, and may enable optical addressing within cross-point arrays. The OGT current–voltage response is similar to a MOSFET device, with light activating the gate instead of voltage. The OGT also provides a naturally built-in compliance current for a series resistive memory element, determined by the incident light intensity on the gate, thus keeping the integrated periphery circuitry size and complexity to a minimum for a memory array. The OGT gate comprises an amorphous Ge2Se3 material that can readily be doped with other elements to alter the transistor's electrical properties. In this work, we explore the operation of the OGT when the Ge2Se3 gate material is doped with the Group IVA elements C, Si, Sn, and Pb. The dopant atoms provide changes to the optical and electrical properties that allow key electrical properties such as the dark current, photocurrent, switching speed, and threshold voltage to be tuned. [ABSTRACT FROM AUTHOR]

In this article, we propose a circuit to imitate the behavior of a Reward-Modulated spike-timing-dependent plasticity synapse. When two neurons in adjacent layers produce spikes, each spike modifies the thickness in the shared synapse. As a result, the synapse's ability to conduct impulses is controlled, leading to an unsupervised learning rule. By introducing a reward signal, reinforcement learning is enabled by redirecting the growth and shrinkage of synapses based on signal feedback from the environment. The proposed synapse manages the convolution of the emitted spike signals to promote either the strengthening or weakening of the synapse, represented as the resistance value of a memristor device. As memristors have a conductance range that may differ from the available current input range of typical CMOS neuron designs, the synapse circuit can be adjusted to regulate the spike's amplitude current to comply with the neuron. The circuit described in this work allows for the implementation of fully interconnected layers of neuron analog circuits. This is achieved by having each synapse reconform the spike signal, thus removing the burden of providing enough power from the neurons to each memristor. The synapse circuit was tested using a CMOS analog neuron described in the literature. Additionally, the article provides insight into how to properly describe the hysteresis behavior of the memristor in Verilog-A code. The testing and learning capabilities of the synapse circuit are demonstrated in simulation using the Skywater-130 nm process. The article's main goal is to provide the basic building blocks for deep neural networks relying on spiking neurons and memristors as the basic processing elements to handle spike generation, propagation, and synaptic plasticity. [ABSTRACT FROM AUTHOR]

In continuous neural modeling, memristor coupling has been investigated widely. Yet, there is little research on discrete neural networks in the field. Discrete models with synaptic crosstalk are even less common. In this paper, two locally active discrete memristors are used to couple two discrete Aihara neurons to form a map called DMCAN. Then, the synapse is modeled using a discrete memristor and the DMCAN map with crosstalk is constructed. The DMCAN map is investigated using phase diagram, chaotic sequence, Lyapunov exponent spectrum (LEs) and bifurcation diagrams (BD). Its rich and complex dynamical behavior, which includes attractor coexistence, state transfer, Feigenbaum trees, and complexity, is systematically analyzed. In addition, the DMCAN map is implemented in hardware on a DSP platform. Numerical simulations are further validated for correctness. Numerical and experimental findings show that the synaptic connections of neurons can be modeled by discrete memristor coupling which leads to the construction of more complicated discrete neural networks. [ABSTRACT FROM AUTHOR]

Cerium-based materials (CeO2−x) are of significant interest in the development of vacancy-modulated resistive switching (RS) memory devices. However, the influence of grain boundaries on the performance of memristors is very limited. To fill this gap, this study explores the influence of grain boundaries in cerium-based thin film resistive random-access memory (RRAM) devices. Sm0.2Ce0.8O2−x (SDC20) thin films were deposited on (100)-oriented Nb-doped SrTiO3 (NSTO) and (110)-oriented NSTO substrates using pulsed laser deposition (PLD). Devices constructed with a Pt/SDC20/NSTO structure exhibited reversible and stable bipolar resistive switching (RS) behavior. The differences in conduction mechanisms between single-crystal and polycrystalline devices were confirmed, with single-crystal devices displaying a larger resistance window and higher stability. Combining the results of XPS and I–V curve fitting, it was confirmed that defects near the grain boundaries in the SDC-based memristors capture electrons, thereby affecting the overall performance of the RRAM devices. [ABSTRACT FROM AUTHOR]

Directional ionic migration in ultra-thin metal-oxide semiconductors under applied electric fields is a key mechanism for developing various electronic nanodevices. However, understanding charge transfer dynamics is challenging due to rapid ionic migration and uncontrolled charge transfer, which can reduce the functionality of microelectronic devices. This research investigates the supercapacitive-coupled memristive characteristics of ultra-thin heterostructured metal-oxide semiconductor films at TiO2-In2O3/Au Schottky junctions. Using atomic layer deposition (ALD), we nano-engineered In2O3/Au-based metal/semiconductor heterointerfaces. TEM studies followed by XPS elemental analysis revealed the chemical and structural characteristics of the heterointerfaces. Subsequent AFM studies of the hybrid heterointerfaces demonstrated supercapacitor-like behavior in nanometer-thick TiO2-In2O3/Au junctions, resembling ultra-thin supercapacitors, pseudocapacitors, and nanobatteries. The highest specific capacitance of 2.6 × 104 F.g−1 was measured in the TiO2-In2O3/Au junctions with an amorphous In2O3 electron gate. Additionally, we examined the impact of crystallization, finding that thermal annealing led to the formation of crystalline In2O3 films with higher oxygen vacancy content at TiO2-In2O3 heterointerfaces. This crystallization process resulted in the evolution of non-zero I-V hysteresis loops into zero I-V hysteresis loops with supercapacitive-coupled memristive characteristics. This research provides a platform for understanding and designing adjustable ultra-thin Schottky junctions with versatile electronic properties. [ABSTRACT FROM AUTHOR]

We found that a second-order ideal memristor [whose state is the charge, i.e., x = q in v = R x , i , t i ] degenerates into a negative nonlinear resistor with an internal power source. After extending analytically and geographically the above local activity (experimentally verified by the two active higher-integral-order memristors extracted from the famous Hodgkin–Huxley circuit) to other higher-order circuit elements, we concluded that all higher-order passive memory circuit elements do not exist in nature and that the periodic table of the two-terminal passive ideal circuit elements can be dramatically reduced to a reduced table comprising only six passive elements: a resistor, inductor, capacitor, memristor, mem-inductor, and mem-capacitor. Such a bounded table answered an open question asked by Chua 40 years ago: Are there an infinite number of passive circuit elements in the world? [ABSTRACT FROM AUTHOR]

Chaotic or hyperchaotic systems have a significant role in engineering applications such as cryptography and secure communication, serving as primary signal generators. To ensure stronger complexity, memristors with sufficient nonlinearity are commonly incorporated into the system, suffering a limitation on the physical implementation. In this paper, we propose a new four-dimensional (4D) hyperchaotic system based on the linear memristor which is the most straightforward to implement physically. Through numerical studies, we initially demonstrate that the proposed system exhibits robust hyperchaotic behaviors under typical parameter conditions. Subsequently, we theoretically prove the existence of solid hyperchaos by combining the topological horseshoe theory with computer-assisted research. Finally, we present the realization of the proposed hyperchaotic system using an FPGA platform. This proposed system possesses two key properties. Firstly, this work suggests that the simplest memristor can also induce strong nonlinear behaviors, offering a new perspective for constructing memristive systems. Secondly, compared to existing systems, our system not only has the largest Kaplan-Yorke dimension, but also has clear advantages in areas related to engineering applications, such as the parameter range and signal bandwidth, indicating promising potential in engineering applications. [ABSTRACT FROM AUTHOR]

Memristors, since their inception, have demonstrated remarkable characteristics, notably the exceptional reconfigurability of their memory. This study delves into electroforming-free YMnO 3 (YMO)-based resistive switches, emphasizing the reconfigurable memory effect in multiferroic YMO thin films with metallically conducting electrodes and their pivotal role in achieving adaptable frequency responses in impedance circuits consisting of reconfigurable YMO-based resistive switches and no reconfigurable passive elements, e.g., inductors and capacitors. The multiferroic YMO possesses a network of charged domain walls which can be reconfigured by a time-dependent voltage applied between the metallically conducting electrodes. Through experimental demonstrations, this study scrutinizes the impedance response not only for individual switch devices but also for impedance circuitry based on YMO resistive switches in both low- and high-resistance states, interfacing with capacitors and inductors in parallel and series configurations. Scrutinized Nyquist plots visually capture the intricate dynamics of impedance circuitry, revealing the potential of electroforming-free YMO resistive switches in finely tuning frequency responses within impedance circuits. This adaptability, rooted in the unique properties of YMO, signifies a paradigm shift heralding the advent of advanced and flexible electronic technologies. [ABSTRACT FROM AUTHOR]

This study investigates the effect of a high-temperature annealing process on the characteristics and performance of a memristor based on a Ag/Ga2O3/Pt structure. Through X-ray diffraction analysis, successful phase conversion from amorphous Ga2O3 to β-Ga2O3 is confirmed, attributed to an increase in grain size and recrystallization induced by annealing. X-ray photoelectron spectroscopy analysis revealed a higher oxygen vacancy in annealed Ga2O3 thin films, which is crucial for conductive filament formation and charge transport in memristors. Films with abundant oxygen vacancies exhibit decreased set voltages and increased capacitance in a low-resistive state, enabling easy capacitance control depending on channel presence. In addition, an excellent memory device with a high on/off ratio can be implemented due to the reduction of leakage current due to recrystallization. Therefore, it is possible to manufacture a thin film suitable for a memristor by increasing the oxygen vacancy in the Ga2O3 film while improving the overall crystallinity through the annealing process. This study highlights the significance of annealing in modulating capacitance and high-resistive/low-resistive state properties of Ga2O3 memristors, contributing to optimizing device design and performance. This study underscores the significance of high-temperature annealing in improving the channel-switching characteristics of Ga2O3-based memristors, which is crucial for the development of low-power, high-efficiency memory device. [ABSTRACT FROM AUTHOR]

In this paper, the characteristics of absolute value memristors are verified through the circuit implementation and construction of a chaotic system with a conditional symmetric fractional-order memristor. The dynamic behavior of fractional-order memristor systems is explored using fractional-order calculus theory and the Adomian Decomposition Method (ADM). Concurrently, the investigation probes into the existence of coexisting symmetric attractors, multiple coexisting bifurcation diagrams, and Lyapunov exponent spectra (LEs) utilizing system parameters as variables. Additionally, the system demonstrates an intriguing phenomenon known as offset boosting, where the embedding of an offset can adjust the position and size of the system's attractors. To ensure the practical applicability of these findings, a fractional-order sliding mode synchronization control scheme, inspired by integer-order sliding mode theory, is designed. The rationality and feasibility of this scheme are validated through a theoretical analysis and numerical simulation. [ABSTRACT FROM AUTHOR]

Processing in Memory based on memristors is considered the most effective solution to overcome the Von Neumann bottleneck issue and has become a hot research topic. The execution efficiency of logical computation and in-memory data transmission is crucial for Processing in Memory. This paper presents a design scheme for data transmission and multi-bit multipliers within MAT (a data storage set in MPU) based on the memristive alternating crossbar array structure. Firstly, to improve the data transfer efficiency, we reserve the edge row and column of the array as assistant cells for OR AND (OA) and AND data transmission logic operations to reduce the data transfer steps. Furthermore, we convert the multipliers into multi-bit addition operations via Multiple Input Multiple Output (MIMO) logical operations, which effectively improves the execution efficiency of multipliers. PSpice simulation shows that the proposed data transmission and multi-bit multiplier solution has lower latency and power consumption and higher efficiency and flexibility. [ABSTRACT FROM AUTHOR]

Typically, organic multiferroic junctions (OMFJs) are formed of an organic ferroelectric layer sandwiched between two ferromagnetic electrodes. The main scientific interest in OMFJs focuses on the magnetoresistive properties of the magnetic spin valve combined with the electroresistive properties associated with the ferroelectric junction. In consequence, memristive properties that couple magnetoelectric functionalities, which are one of the most active fields of research in material sciences, are opening a large spectrum of technological applications from nonvolatile memory to elements in logic circuits, sensing devices, energy harvesting and biological synapsis models in the emerging area of neuromorphic computing. The realization of these multifunctional electronic elements using organic materials is presenting various advantages related to their low-cost, versatile synthesis and low power consumption functioning for sustainable electronics; green disintegration for transient electronics; and flexibility, light weight and/or biocompatibility for flexible electronics. The purpose of this review is to address the advancement of all OMFJs including not only the achievements in the charge and spin transport through OMFJs together with the effects of electroresistance and magnetoresistance but also the challenges and ways to overcome them for the most used materials for OMFJs. [ABSTRACT FROM AUTHOR]

We explore security aspects of a new computing paradigm that combines novel memristors and traditional Complimentary Metal Oxide Semiconductor (CMOS) to construct a highly efficient analog and/or digital fabric that is especially well-suited to Machine Learning (ML) inference processors for Radio Frequency (RF) signals. Analog and/or hybrid hardware designed for such application areas follows different constraints from that of traditional CMOS. This paradigm shift allows for enhanced capabilities but also introduces novel attack surfaces. Memristors have different properties than traditional CMOS which can potentially be exploited by attackers. In addition, the mixed signal approximate computing model has different vulnerabilities than traditional digital implementations. However both the memristor and the ML computation can be leveraged to create security mechanisms and countermeasures ranging from lightweight cryptography, identifiers (e.g., Physically Unclonable Functions (PUFs), fingerprints, and watermarks), entropy sources, hardware obfuscation and leakage/attack detection methods. Three different threat models are proposed: (1) Supply Chain, (2) Physical Attacks, and (3) Remote Attacks. For each threat model, potential vulnerabilities and defenses are identified. This survey reviews a variety of recent work from the hardware and ML security literature and proposes open problems for both attack and defense. The survey emphasizes the growing area of RF signal analysis and identification in terms of commercial space, as well as military applications and threat models. We differ from other recent surveys that target ML, in general, neglecting RF applications. [ABSTRACT FROM AUTHOR]

This paper presents an in-depth analysis of an excitable membrane of a biological system by proposing a novel approach that the cells of the excitable membrane can be modeled as the networks of memristors. We provide compelling evidence from the Chay neuron model that the state-independent mixed ion channel is a nonlinear resistor, while the state-dependent voltage-sensitive potassium ion channel and calcium-sensitive potassium ion channel function as generic memristors from the perspective of electrical circuit theory. The mechanisms that give rise to periodic oscillation, aperiodic (chaotic) oscillation, spikes, and bursting in an excitable cell are also analyzed via a small-signal model, a pole-zero diagram of admittance functions, local activity, the edge of chaos, and the Hopf bifurcation theorem. It is also proved that the zeros of the admittance functions are equivalent to the eigen values of the Jacobian matrix, and the presence of the positive real parts of the eigen values between the two bifurcation points lead to the generation of complicated electrical signals in an excitable membrane. The innovative concepts outlined in this paper pave the way for a deeper understanding of the dynamic behavior of excitable cells, offering potent tools for simulating and exploring the fundamental characteristics of biological neurons. [ABSTRACT FROM AUTHOR]

A comprehensive analysis and simulation of two memristor-based neuromorphic architectures for nuclear radiation detection is presented. Both scalable architectures retrofit a locally competitive algorithm to solve overcomplete sparse approximation problems by harnessing memristor crossbar execution of vector–matrix multiplications. The proposed systems demonstrate excellent accuracy and throughput while consuming minimal energy for radionuclide detection. To ensure that the simulation results of our proposed hardware are realistic, the memristor parameters are chosen from our own fabricated memristor devices. Based on these results, we conclude that memristor-based computing is the preeminent technology for a radiation detection platform. [ABSTRACT FROM AUTHOR]

Compared with purely electrical neuromorphic devices, those stimulated by optical signals have gained increasing attention due to their realistic sensory simulation. In this work, an optoelectronic neuromorphic device based on a photoelectric memristor with a Bi2FeCrO6/Al-doped ZnO (BFCO/AZO) heterostructure is fabricated that can respond to both electrical and optical signals and successfully simulate a variety of synaptic behaviors, such as STP, LTP, and PPF. In addition, the photomemory mechanism was identified by analyzing the energy band structures of AZO and BFCO. A convolutional neural network (CNN) architecture for pattern classification at the Mixed National Institute of Standards and Technology (MNIST) was used and improved the recognition accuracy of the MNIST and Fashion-MNIST datasets to 95.21% and 74.19%, respectively, by implementing an improved stochastic adaptive algorithm. These results provide a feasible approach for future implementation of optoelectronic synapses. [ABSTRACT FROM AUTHOR]

Memristor-based design has gained significant attention in recent years due to its potential to revolutionize various fields such as artificial intelligence, neuromorphic computing, non-volatile memory, signal processing, filtering, and radio frequency design. These emerging devices offer unique advantages such as non-volatile memory, low power consumption, and a high integration density. Their scalability and compatibility with existing fabrication processes make them an attractive option for industry adoption, paving the way for faster and more efficient architecture design. Researchers are actively exploring ways to optimize memristor technology for practical applications to harness its full potential. This includes developing novel materials and structures as well as improving the reliability and performance of memristors in various applications. This paper provides a comprehensive overview of the current advancements in memristor technology and their potential impact on the design of future electronic systems, focusing on its applications in the analog domain. By exploring the latest research and development in this field, researchers can gain valuable insights into how analog memristors can be integrated into their designs to achieve enhanced performance and efficiency. The paper delves into the fundamental principles of memristor technology, exploring its unique characteristics and advantages over traditional electronic components. It discusses the potential impact of memristors and challenges in the analog field of electronics, and highlights the progress made in their integration with existing circuitry, enabling novel functionalities and improved performance. Furthermore, it highlights ongoing research efforts to improve the performance and reliability of memristors, as well as the potential limitations and challenges that need to be addressed for widespread adoption, including variability in performance and reliability. [ABSTRACT FROM AUTHOR]

For processing streaming events from a Dynamic Vision Sensor camera, two types of neural networks can be considered. One are spiking neural networks, where simple spike-based computation is suitable for low-power consumption, but the discontinuity in spikes can make the training complicated in terms of hardware. The other one are digital Complementary Metal Oxide Semiconductor (CMOS)-based neural networks that can be trained directly using the normal backpropagation algorithm. However, the hardware and energy overhead can be significantly large, because all streaming events must be accumulated and converted into histogram data, which requires a large amount of memory such as SRAM. In this paper, to combine the spike-based operation with the normal backpropagation algorithm, memristor–CMOS hybrid circuits are proposed for implementing event-driven neural networks in hardware. The proposed hybrid circuits are composed of input neurons, synaptic crossbars, hidden/output neurons, and a neural network's controller. Firstly, the input neurons perform preprocessing for the DVS camera's events. The events are converted to histogram data using very simple memristor-based latches in the input neurons. After preprocessing the events, the converted histogram data are delivered to an ANN implemented using synaptic memristor crossbars. The memristor crossbars can perform low-power Multiply–Accumulate (MAC) calculations according to the memristor's current–voltage relationship. The hidden and output neurons can convert the crossbar's column currents to the output voltages according to the Rectified Linear Unit (ReLU) activation function. The neural network's controller adjusts the MAC calculation frequency according to the workload of the event computation. Moreover, the controller can disable the MAC calculation clock automatically to minimize unnecessary power consumption. The proposed hybrid circuits have been verified by circuit simulation for several event-based datasets such as POKER-DVS and MNIST-DVS. The circuit simulation results indicate that the neural network's performance proposed in this paper is degraded by as low as 0.5% while saving as much as 79% in power consumption for POKER-DVS. The recognition rate of the proposed scheme is lower by 0.75% compared to the conventional one, for the MNIST-DVS dataset. In spite of this little loss, the power consumption can be reduced by as much as 75% for the proposed scheme. [ABSTRACT FROM AUTHOR]

Titanium anodic memristors were prepared in phosphate buffer (PB) and citrate buffer (CB) electrolytes. Studying their I-U sweeps, the memristors presented self-rectifying and volatile behaviors. Transmission electron microscopic analysis revealed crystalline protrusions inside a semi-crystalline Ti oxide. Grounded in this, a hybrid interfacial memristive switching mechanism relaying on partial filaments was proposed. Moreover, both analyzed memristor types demonstrated multilevel switching capabilities. The memristors anodized in the PB and CB showed high-to-low resistance ratios of 4 × 104 and 1.6 × 102, respectively. The observed (more than two order of magnitude) ratio improvement of the PB memristors suggests their better performance, in spite of their modestly high resistive state instabilities, attributed to the thermal stress caused by consecutive switching. The endurance and retention of both the PB and CB memristors was measured over up to 106 cycles, indicating very good lifetimes. Phosphate incorporation into the anodic oxide was confirmed by photoelectron spectroscopy analysis and was related to the improved memristive behavior of the PB sample. The presence of phosphate inside the memristively active layer modifies the availability of free O species (vacancies and ions) in the oxide. Taking all this into consideration, Ti anodic memristors anodized in PB are emphasized as candidates for neuromorphic computing. [ABSTRACT FROM AUTHOR]

Molybdenum disulfide, a two-dimensional material extensively explored for potential applications in non-von Neumann computing technologies, has garnered significant attention owing to the observed hysteresis phenomena in MoS2 FETs. The dominant sources of hysteresis reported include charge trapping at the channel–dielectric interface and the adsorption/desorption of molecules. However, in MoS2 FETs with different channel thicknesses, the specific nature and density of defects contributing to hysteresis remain an intriguing aspect requiring further investigation. This study delves into memristive devices with back-gate modulated channel layers based on CVD-deposited flake-based and thin-film-based MoS2 FETs, with a few-layer (FL) and thin-film (TF) channel thickness. Analysis of current–voltage ( I − V ) and conductance–frequency ( G p / ω − f ) measurements led to the conclusion that the elevated hysteresis observed in TF MoS2 devices, as opposed to FL devices, stems from a substantial contribution from intrinsic defects within the channel volume, surpassing that of interface defects. This study underscores the significance of considering both intrinsic defects within the bulk and the interface defects of the channel when analyzing hysteresis in MoS2 FETs, particularly in TF FETs. The selection between FL and TF MoS2 devices depends on the requirements for memristive applications, considering factors such as hysteresis tolerance and scaling capabilities. [ABSTRACT FROM AUTHOR]

This study investigates the behavior of memristive devices characterized by oxygen-deficient ZnO and HfZrO films under continuous pulse stimulation. This dynamic reflects the adaptability observed in neural synapses when repeatedly subjected to stress, ultimately resulting in a mitigated response to pressure. Observations show that the conductivity of memristors increases with the augmentation of continuous electrical pulses. However, the momentum of this growth trend gradually diminishes, highlighting the devices' capability to adapt to repetitive pressure. This adjustment correlates with the transition of biological synapses from short-term to persistent memory stages, aligning with the principles of the Ebbinghaus memory model. The architecture of memristors, integrating ZnO and HfZrO in a layered manner, holds promising prospects in replicating the inherent synaptic features found in biological organisms. [ABSTRACT FROM AUTHOR]

With the rapid growth of data storage, traditional von Neumann architectures and silicon-based storage computing technologies will reach their limits and fail to meet the storage requirements of ultra-small size, ultra-high density, and memory computing. Memristors have become a strong competitor in next generation memory technology because of their advantages such as simple device structure, fast erase speed, low power consumption, compatibility with CMOS technology, and easy 3D integration. The resistive medium layer is the key to achieving resistive performance; hence, research on memristors mainly focuses on the resistive medium layer. This paper begins by elucidating the fundamental concepts, structures, and resistive-switching mechanisms of memristors, followed by a comprehensive review of how different resistive storage materials impact memristor performance. The categories of memristors, the effects of different resistive materials on memristors, and the issues are described in detail. Finally, a summary of this article is provided, along with future prospects for memristors and the remaining issues in the large-scale industrialization of memristors. [ABSTRACT FROM AUTHOR]

For some so-called computationally difficult problems, using the method of Boolean logic is fundamentally inefficient. For example, the vertex coloring problem looks very simple, but the number of possible solutions increases sharply with the increase of graph vertices. This is the difficulty of the problem. This complexity has been widely studied because of its wide applications in the fields of data science, life science, social science, and engineering technology. Consequently, it has inspired the use of alternative and more effective non-Boolean methods for obtaining solutions to similar problems. In this paper, we explore the research on a new generation of computers that use local active memristors coupling. First, we study the dynamics of the memristor coupling network. Then, the simplified system phase model is obtained. This research not only clarifies a physics-based calculation method but also provides a foundation for the construction of customized analog computers to effectively solve NP-hard problems. [ABSTRACT FROM AUTHOR]

This article investigates resistive random access memory (ReRAM) crossbar memory arrays, which is a notable development in non-volatile memory technology. We highlight ReRAM's competitive edge over NAND, NOR Flash, and phase-change memory (PCM), particularly in terms of endurance, speed, and energy efficiency. This paper focuses on the architecture of crossbar arrays, where memristive devices are positioned at intersecting metal wires. We emphasize the unique resistive switching mechanisms of memristors and the challenges of sneak path currents and delve into the roles and configurations of selectors, particularly focusing on the one-selector one-resistor (1S1R) architecture with an insulator–metal transition (IMT) based selector. We use SPICE simulations based on defined models to examine a 3 × 3 1S1R ReRAM array with vanadium dioxide selectors and titanium dioxide film memristors, assessing the impact of ambient temperature and critical IMT temperatures on array performance. We highlight the operational regions of low resistive state (LRS) and high resistive state (HRS), providing insights into the electrical behavior of these components under various conditions. Lastly, we demonstrate the impact of selector presence on sneak path currents. This research contributes to the overall understanding of ReRAM crossbar arrays integrated with IMT material-based selectors. [ABSTRACT FROM AUTHOR]

Memristors are state-of-the-art, nano-sized, two-terminal, passive electronic elements with very good switching and memory characteristics. Owing to their very low power usage and a good compatibility to the existing CMOS ultra-high-density integrated circuits and chips, they are potentially applicable in artificial and spiking neural networks, memory arrays, and many other devices and circuits for artificial intelligence. In this paper, a complete electronic realization of an analog circuit model of the modified neural net with memristor-based synapses and transfer function with memristors and MOS transistors in LTSPICE is offered. Each synaptic weight is realized by only one memristor, providing enormously reduced circuit complexity. The summing and scaling implementation is founded on op-amps and memristors. The logarithmic-sigmoidal activation function is based on a simple scheme with MOS transistors and memristors. The functioning of the suggested memristor-based neural network for pulse input signals is evaluated both analytically in MATLAB-SIMULINK and in the LTSPICE environment. The obtained results are compared one to another and are successfully verified. The realized memristor-based neural network is an important step towards the forthcoming design of complex memristor-based neural networks for artificial intelligence, for implementation in very high-density integrated circuits and chips. [ABSTRACT FROM AUTHOR]

A broad compositional range of Nb-Ti anodic memristors with volatile and self-rectifying behaviour was studied using a combinatorial screening approach. A Nb-Ti thin-film combinatorial library was co-deposited by sputtering, serving as the bottom electrode for the memristive devices. The library, with a compositional spread ranging between 22 and 64 at.% Ti was anodically oxidised, the mixed oxide being the active layer in MIM-type structures completed by Pt discreet top electrode patterning. By studying I–U sweeps, memristors with self-rectifying and volatile behaviour were identified. Moreover, all the analysed memristors demonstrated multilevel properties. The best-performing memristors showed HRS/LRS (high resistive state/low resistive state) ratios between 4 and 6 × 105 and very good retention up to 106 successive readings. The anodic memristors grown along the compositional spread showed very good endurance up to 106 switching cycles, excluding those grown from alloys containing between 31 and 39 at.% Ti, which withstood only 10 switching cycles. Taking into consideration all the parameters studied, the Nb-46 at.% Ti composition was screened as the parent metal alloy composition, leading to the best-performing anodic memristor in this alloy system. The results obtained suggest that memristive behaviour is based on an interfacial non-filamentary type of resistive switching, which is consistent with the performed cross-sectional TEM structural and chemical characterisation. [ABSTRACT FROM AUTHOR]

The traditional von Neumann architecture of computers, constrained by the inherent separation of processing and memory units, faces challenges, for instance, memory wall issue. Neuromorphic computing and in-memory computing offer promising paradigms to overcome the limitations of additional data movement and to enhance computational efficiency. In this work, transfer-free flexible memristors based on hexagonal boron nitride films were proposed for analog neuromorphic and digital memcomputing. Analog memristors were prepared; they exhibited synaptic behaviors, including paired-pulse facilitation and long-term potentiation/depression. The resistive switching mechanism of the analog memristors were investigated through transmission electron microscopy. Digital memristors were prepared by altering the electrode materials, and they exhibited reliable device performance, including a large on/off ratio (up to 106), reproducible switching endurance (>100 cycles), non-volatile characteristic (>60 min), and effective operating under bending conditions (>100 times). [ABSTRACT FROM AUTHOR]

The title compound, unimer U (tpy stands for 2,2′:6′,2″-terpyridin-4′-yl end-group), by itself shows the memristor effect with a retention time of 18 h and persistence of 11 h. Its coordination copolymer with Co(II) ions, [CoU]n, exhibits multimodal resistance changes similar to the synaptic responses observed in biological systems. More than 320 cycles of potentiation and depression measured in continuous sequence occurred without observing a significant current change, confirming the operational stability and reproducibility of the device based on the [CoU]n polymer. The synaptic effect of a device with an indium tin oxide (ITO)/[CoU]n/top-electrode (TE) configuration is more pronounced for the device with TE = Au compared to devices with TE = Al or Ga. However, the latter TEs provide a cost-effective approach without any significant compromise in device plasticity. The detected changes in the synaptic weight, about 12% for pair-pulse facilitation and 80% for its depression, together with a millisecond trigger and reading pulses that decay exponentially on the time scale typical of neurosynapses, justify the device's ability to learn and memorize. These properties offer potential applications in neuromorphic computation and brain-inspired synaptic devices. [ABSTRACT FROM AUTHOR]

Very recently, the synthesis of 2D MoS2 and WS2 through pulsed laser-directed thermolysis can achieve wafer-scale and large-area structures, in ambient conditions. In this paper, we report the synthesis of MoS2 and MoS2 oxides from (NH4)2MoS4 film using a visible continuous-wave (CW) laser at 532 nm, instead of the infrared pulsed laser for the laser-directed thermolysis. The (NH4)2MoS4 film is prepared by dissolving its crystal powder in DI water, sonicating the solution, and dip-coating onto a glass slide. We observed a laser intensity threshold for the laser synthesis of MoS2, however, it occurred in a narrow laser intensity range. Above that range, a mixture of MoS2 and MoO2 is formed, which can be used for a memristor device, as demonstrated by other research groups. We did not observe a mixture of MoS2 and MoO3 in the laser thermolysis of (NH4)2MoS4. The laser synthesis of MoS2 in a line pattern is also achieved through laser scanning. Due to of the ease of CW beam steering and the fine control of laser intensities, this study can lead toward the CW laser-directed thermolysis of (NH4)2MoS4 film for the fast, non-vacuum, patternable, and wafer-scale synthesis of 2D MoS2. [ABSTRACT FROM AUTHOR]

Memristor devices have diverse physical models depending on their structure. In addition, the physical properties of memristors are described using complex differential equations. Therefore, it is necessary to integrate the various models of memristor into an unified physics-based model. In this paper, we propose a physics-informed neural network (PINN)-based compact memristor model. PINNs can solve complex differential equations intuitively and with ease. This methodology is used to conduct memristor physical analysis. The weight and bias extracted from the PINN are implemented in a Verilog-A circuit simulator to predict memristor device characteristics. The accuracy of the proposed model is verified using two memristor devices. The results show that PINNs can be used to extensively integrate memristor device models. [ABSTRACT FROM AUTHOR]

Memristors have garnered considerable attention within the scientific community as devices for emerging construction of Very Large Scale Integration (VLSI) systems. Owing to their inherent properties, they appear to be promising candidates for pivotal components in computational architectures, offering alternatives to the conventional von Neumann architectures. This work has focused on exploring potential applications of Self-Directed Channel (SDC) memristors as novel RRAM memory cells. The introductory section of the study is dedicated to evaluating the repeatability of the tested memristors. Subsequently, a detailed account of the binary programming testing process for memristors is provided, along with illustrative characteristics depicting the impact of programming pulses on a memory cell constructed from a memristor. A comprehensive data analysis was then conducted, comparing memristors with varying types of doping. The results revealed that SDC memristors exhibit a high level of switching, certainty between the Low Resistance State (LRS) and High Resistance State (HRS), suggesting their capability to facilitate the storage of multiple bits within a single memory cell. [ABSTRACT FROM AUTHOR]

This paper presents a novel Mott memristor-based multi-channel sensing system designed for the simultaneous processing of multiple sensing channels, employing single-wire data fusion and a greedy search strategy for back-end data recovery. Multiple channels of external stimulus information are simultaneously encoded into analog signals with varying frequencies, utilizing a Mott memristor array. Auxiliary circuits then convert the analog sensing signals into square wave signals which are further transformed into narrow (100 ns) pulse signals through pulse generation circuitry. Subsequently, these narrow pulse signals are fused into a single-wire signal by using an OR gate. At the back-end of the system, a greedy searching strategy is applied to accurately identify all frequencies within the fused pulse signal, enabling seamless analog-to-frequency conversion across multiple channels. The system is suitable for a wide range of sensors and can be directly connected to FPGAs for data processing, eliminating the need for traditional analogue front-end and ADC circuits and greatly reducing circuit complexity and power consumption. By leveraging the innovative capabilities of Mott memristors, the proposed system achieves precise analog-to-frequency conversion with significantly reduced power consumption. [ABSTRACT FROM AUTHOR]

Memristors are devices built on the basis of fourth passive electrical elements in nanosystems. Because of the multitude of technologies used for memristor implementation, it is not always possible to obtain analytical models of memristors. This difficulty can be overcome using behavioral modeling, which is when mathematical models are constructed according to the input–output relationships on the input and output signals. For memristor modeling, piecewise neural and polynomial models with split signals are proposed. At harmonic input signals of memristors, this study suggests that split signals should be formed using a delay line. This method produces the minimum number of split signals and, as a result, simplifies behavioral models. Simplicity helps reduce the dimension of the nonlinear approximation problem solved in behavioral modeling. Based on the proposed method, the piecewise neural and polynomial models with harmonic input signals were constructed to approximate the transfer characteristic of the memristor, in which the current dynamics are described using the Bernoulli differential equation. It is shown that the piecewise neural model based on the feedforward network ensures higher modeling accuracy at almost the same complexity as the piecewise polynomial model. [ABSTRACT FROM AUTHOR]

Considering the dynamic characteristics of memristors, a new Jerk-like system without an equilibrium point is addressed based on a Jerk-like system, and the hidden dynamics are investigated. When changing system parameter b and fixing other parameters, the proposed system shows various hidden attractors, such as a hidden chaotic attractor (b = 5), a hidden period-1 attractor (b = 3.2), and a hidden period-2 attractor (b = 4). Furthermore, bifurcation analysis suggests that not only parameter b, but also the initial conditions of the system, have an effect on the hidden dynamics of the discussed system. The coexistence of various hidden attractors is explored and different coexistences of hidden attractors can be found for suitable system parameters. Offset boosting of different hidden attractors is discussed. It is observed that offset boosting can occur for hidden chaotic attractor, period-1 attractor, and period-2 attractor, but not for period-3 attractor and period-4 attractor. The antimonotonicity of the proposed system is debated and a full Feigenbaum remerging tree can be detected when system parameters a or b change within a certain range. On account of the complicated dynamics of the proposed system, an image encryption scheme is designed, and its encryption effectiveness is analyzed via simulation and comparison. [ABSTRACT FROM AUTHOR]

Facing the era of information explosion and the advent of artificial intelligence, there is a growing demand for information technologies with huge storage capacity and efficient computer processing. However, traditional silicon-based storage and computing technology will reach their limits and cannot meet the post-Moore information storage requirements of ultrasmall size, ultrahigh density, flexibility, biocompatibility, and recyclability. As a response to these concerns, polymer-based resistive memory materials have emerged as promising candidates for next-generation information storage and neuromorphic computing applications, with the advantages of easy molecular design, volatile and non-volatile storage, flexibility, and facile fabrication. Herein, we first summarize the memory device structures, memory effects, and memory mechanisms of polymers. Then, the recent advances in polymer resistive switching materials, including single-component polymers, polymer mixtures, 2D covalent polymers, and biomacromolecules for resistive memory devices, are highlighted. Finally, the challenges and future prospects of polymer memory materials and devices are discussed. Advances in polymer-based memristors will open new avenues in the design and integration of high-performance switching devices and facilitate their application in future information technology. [ABSTRACT FROM AUTHOR]

Topological phase transition materials have strong coupling between their charge, spin orbitals, and lattice structure, which makes them have good electrical and magnetic properties, leading to promising applications in the fields of memristive devices. The smaller Gibbs free energy difference between the topological phases, the stable oxygen vacancy ordered structure, and the reversible topological phase transition promote the memristive effect, which is more conducive to its application in information storage, information processing, information calculation, and other related fields. In particular, extracting the current resistance or conductance of the two-terminal memristor to convert to the weight of the synapse in the neural network can simulate the behavior of biological synapses in their structure and function. In addition, in order to improve the performance of memristors and better apply them to neuromorphic computing, methods such as ion doping, electrode selection, interface modulation, and preparation process control have been demonstrated in memristors based on topological phase transition materials. At present, it is considered an effective method to obtain a unique resistive switching behavior by improving the process of preparing functional layers, regulating the crystal phase of topological phase transition materials, and constructing interface barrier-dependent devices. In this review, we systematically expound the resistance switching mechanism, resistance switching performance regulation, and neuromorphic computing of topological phase transition memristors, and provide some suggestions for the challenges faced by the development of the next generation of non-volatile memory and brain-like neuromorphic devices based on topological phase transition materials. [ABSTRACT FROM AUTHOR]

Nowadays, the utilization of memristors to enhance the dynamical properties of chaotic systems has become a popular research topic. In this paper, we present the design of a novel 2D memristor-enhanced polynomial hyper-chaotic map (2D-MPHM) by utilizing the cross-coupling of two TiO 2 memristors. The dynamical properties of the 2D-MPHM were investigated using Lyapunov exponents, bifurcation diagrams, and trajectory diagrams. Additionally, Kolmogorov entropy and sample entropy were also employed to evaluate the complexity of the 2D-MPHM. Numerical analysis has demonstrated the superiority of the 2D-MPHM. Subsequently, the proposed 2D-MPHM was applied to a multi-channel image encryption algorithm (MIEA-MPHM) whose excellent security was demonstrated by key space, key sensitivity, plaintext sensitivity, information entropy, pixel distribution, correlation analysis, and robustness analysis. Finally, the encryption efficiency of the MIEA-MPHM was evaluated via numerous encryption efficiency tests. These tests demonstrate that the MIEA-MPHM not only possesses excellent security but also offers significant efficiency advantages, boasting an average encryption rate of up to 87.2798 Mbps. [ABSTRACT FROM AUTHOR]

When the memristor was fabricated for the first time, it launched an entirely new field of research. Many of the published papers regarding memristors are primarily theoretical and are based on computer simulations. Some recent papers analyze the memristor's programming circuits, but to the best of the authors' knowledge, no memristor has been embedded into a commercial analog circuit. This paper is practically oriented and it is based on the experimental results obtained by measurements on the circuit prototype. We present a solution for automated programming of a commercially available memristor and its implementation in tunable active bandpass filter design. The novelty of this paper is that the active bandpass filter's central frequency could be programmed during the filter operation, so a pause for memristor state-switching is not required. The experimental results are promising, and open up possibilities for the memristor's application in analog systems. [ABSTRACT FROM AUTHOR]

Memristors, known for their adjustable and non-volatile resistance, offer a promising avenue for emulating synapses. However, achieving pulse frequency-dependent synaptic plasticity in memristors or memristive systems necessitates further exploration. In this study, we present a novel approach to modulate the conductance of a memristor in a capacitor–memristor circuit by finely tuning the frequency of input pulses. Our experimental results demonstrate that these phenomena align with the long-term depression (LTD) and long-term potentiation (LTP) observed in synapses, which are induced by the frequency of action potentials. Additionally, we successfully implement a Hebbian-like learning mechanism in a simple circuit that connects a pair of memristors to a capacitor, resulting in observed associative memory formation and forgetting processes. Our findings highlight the potential of capacitor–memristor circuits in faithfully replicating the frequency-dependent behavior of synapses, thereby offering a valuable contribution to the development of brain-inspired neural networks. [ABSTRACT FROM AUTHOR]

The von Neumann architecture has faced challenges requiring high-fulfillment levels due to the performance gap between its processor and memory. Among the numerous resistive-switching random-access memories, the properties of hexagonal boron nitride (BN) have been extensively reported, but those of amorphous BN have been insufficiently explored for memory applications. Herein, we fabricated a Pt/BN/TiN device utilizing the resistive switching mechanism to achieve synaptic characteristics in a neuromorphic system. The switching mechanism is investigated based on the I–V curves. Utilizing these characteristics, we optimize the potentiation and depression to mimic the biological synapse. In artificial neural networks, high-recognition rates are achieved using linear conductance updates in a memristor device. The short-term memory characteristics are investigated in depression by controlling the conductance level and time interval. [ABSTRACT FROM AUTHOR]

Memristors possess non-volatile memory, adjusting their electrical resistance to the current that flows through them and allowing switching between high and low conducting states. This technology could find applications in fields such as IT, consumer electronics, computing, sensors, and medicine. In this paper, we report successful electrodeposition of thin-film materials consisting of copper tungstate and copper molybdate (CuWO4 and Cu3Mo2O9), which showed notable memristive properties. Material characterisation was performed with techniques such as XRD, XPS, and SEM. The electrodeposited materials exhibited the ability to switch between low and high resistive states during varied cyclic scans and short-term impulses. The retention time of these switched states was also explored. Using these materials, the effects seen in biological systems, specifically spike timing-dependent plasticity, were simulated, being based on analogue operation of the memristors to achieve multiple conductivity states. Bio-inspired simulations performed directly on the material could possibly offer energy and time savings for classical computations. Memristors could be crucial for the advancement of high-efficiency, low-energy neuromorphic electronic devices and technologies in the future. [ABSTRACT FROM AUTHOR]

As one of the solutions to overcome the current problems of computing systems, a resistive switching device, the TiN/TaOx/fluorine-doped tin oxide (FTO) stacked device, was fabricated to investigate its capability in embodying neuromorphic computing. The device showed good uniformity during the resistive switching phenomenon under time and cycle-to-cycle dependent switching, which may be due to the oxygen reservoir characteristics of the FTO bottom electrode, storing oxygen ions during resistive switching and enhancing the device property. Based on the uniform switching phenomenon of the TiN/TaOx/FTO device, the pulse applications were performed to seek its ability to mimic the biological brain. It was revealed that the volatile and non-volatile nature of the device can be altered by controlling the pulse stimuli, where strong stimuli result in long-term memory while weak stimuli result in short-term memory. To further investigate the key functions of the biological brain, various learning rules such as paired-pulse facilitation, excitatory postsynaptic current, potentiation and depression, spike-rate dependent plasticity, and spike-time dependent plasticity were tested, with reservoir computing implemented based on the volatile characteristic of the TiN/TaOx/FTO device. [ABSTRACT FROM AUTHOR]

Recently, the application of memristors in chaotic systems has been extensively studied. Unfortunately, there is limited literature on the introduction of discrete memristors into chaotic maps, especially into non-classical multidimensional maps. For this reason, this paper establishes a new three-dimensional parabolic chaotic map model; in order to improve the complexity and randomness of the map, it is coupled with a square-charge-controlled discrete memristor to design a new four-dimensional memristive hyperchaotic map. Firstly, the stability of the two maps is discussed. And their dynamical properties are compared using Lyapunov exponential spectra and bifurcation diagrams. Then, the phase diagram and iteration sequence of the 4D memristive hyperchaotic map are obtained. Meanwhile, we investigate the hyperchaotic states, the transient chaos, state transfer and attractor coexistence phenomena of the four-dimensional memristive map. In particular, the special state transfer phenomenon of switching from a periodic attractor to a quasi-periodic attractor and the special coexistence phenomenon of a quasi-periodic attractor coexisting with a quasi-periodic attractor around fixed points are found, which have not been observed in other systems. Finally, the phase-track diagrams and iterative sequence diagrams of the four-dimensional memristive map are verified on a digital experimental platform, revealing its potential for practical applications. [ABSTRACT FROM AUTHOR]

Memristor crossbar arrays are a promising platform for neuromorphic computing. In practical scenarios, the synapse weights represented by the memristors for the underlying system are subject to process variations, in which the programmed weight when read out for inference is no longer deterministic but a stochastic distribution. It is therefore highly desired to learn the weight distribution accounting for process variations, to ensure the same inference performance in memristor crossbar arrays as the design value. In this paper, we introduce a design methodology for fault-tolerant neuromorphic computing using a Bayesian neural network, which combines the variational Bayesian inference technique with a fault-aware variational posterior distribution. The proposed framework based on Bayesian inference incorporates the impacts of memristor deviations into algorithmic training, where the weight distributions of neural networks are optimized to accommodate uncertainties and minimize inference degradation. The experimental results confirm the capability of the proposed methodology to tolerate both process variations and noise, while achieving more robust computing in memristor crossbar arrays. [ABSTRACT FROM AUTHOR]

Given its advantageous power- and area-efficiency characteristics and its compatibility with traditional CMOS technology, the memristor has emerged as a promising candidate for low-power applications. To leverage these capacities, a new edge-triggered DFF was proposed, feeding back the master latches' output to the input of the memristor-based NOR two-stage inverse-phase memristor-based master–slave DFF. Then, a 3-bit flash ADC was designed using the new DFF and simulated to demonstrate its feasibility and correctness. Additionally, a 4-bit flash ADC was implemented and utilized to sample an analog signal, resulting in a correct digital signal. Herein, the 50 nm BSIM4 models were applied. The 3- and 4-bit flash ADCs, respectively, consumed 1.33 mw and 5.84 mw power at a 1 V supply with delay times of 17.8 ns and 70 ns. Compared with previous work, the new 4-bit flash ADC has fewer transistors and smaller power consumption, with about a 25.57% reduction according to the 90 nm process. [ABSTRACT FROM AUTHOR]

Flexible nonvolatile memristors have potential applications in wearable devices. In this work, a helical polymer, poly (N, N-diphenylanline isocyanide) (PPIC), was synthesized as the active layer, and flexible electronic devices with an Al/PPIC/ITO architecture were prepared on a polyethylene terephthalate (PET) substrate. The device showed typical nonvolatile rewritable memristor characteristics. The high-molecular-weight helical structure stabilized the active layer under different bending degrees, bending times, and number of bending cycles. The memristor was further employed to simulate the information transmission capability of neural fibers, providing new perspectives for the development of flexible wearable memristors and biomimetic neural synapses. This demonstration highlights the promising possibilities for the advancement of artificial intelligence skin and intelligent flexible robots in the future. [ABSTRACT FROM AUTHOR]

The use of the advancements in memristor technology to construct chaotic maps has garnered significant research attention in recent years. The combination of memristors and nonlinear terms provides an effective approach to proposing novel maps. In this study, we have leveraged memristors and sine terms to develop three-dimensional maps, capable of processing special fixed points. Additionally, we have conducted an in depth study of a specific example (TDMM 1 map) to demonstrate its dynamics, feasibility, and application for lightweight encryption. Notably, our general approach could be extended to develop higher-dimensional maps, including four- and five-dimensional ones, thereby opening up the possibility to create numerous higher-dimensional maps. [ABSTRACT FROM AUTHOR]

In this paper, we fabricate an ITO/SiN/TaN memristor device and analyze its electrical characteristics for a neuromorphic system. The device structure and chemical properties are investigated using transmission electron microscopy and X-ray photoelectron spectroscopy. Uniform bipolar switching is achieved through DC sweep under a compliance current of 5 mA. Also, the analog reset phenomenon is observed by modulating the reset voltage for long-term memory. Additionally, short-term memory characteristics are obtained by controlling the strength of the pulse response. Finally, bio-inspired synaptic characteristics are emulated using Hebbian learning rules such as spike-rate-dependent plasticity (SRDP) and spike-timing-dependent plasticity (STDP). As a result, we believe that the coexistence of short-term and long-term memories in the ITO/SiN/TaN device can provide flexibility in device design in future neuromorphic applications. [ABSTRACT FROM AUTHOR]