Search

Simultaneous multithreading (SMT) processors might be good candidates to fulfill the ever increasing performance needs of embedded applications. However, off-the-shelves SMT architectures do not fit the timing predictability requirements of hard real-time systems: to schedule critical threads so that they are guaranteed to meet their deadlines, it is necessary to estimate their Worst-Case Execution Times which is not possible when simultaneous threads might interfere. In this paper, we propose an SMT architecture designed to enforce isolation of hard real-time threads so that their worst-case execution time can be safely estimated. We report experimental results that show that this architecture still provides a high level of performance and we give an insight into how the thread isolation feature could be controlled by a real-time task scheduler.

The time predictability of the components of a real-time system is required whenever it must be guaranteed that deadlines will be met. Various techniques have been proposed to evaluate the Worst-Case Execution Time (WCET) of programs but current high-performance processors still cannot be safely modelled. We acknowledge the difficulty of taking into account more and more dynamic mechanisms within static analysis and this motivates the approach we propose here. The main idea is that the processor architecture should be adapted to fit WCET estimation techniques. We focus on dynamically-scheduled superscalar pipelines which have been proved unpredictable due to the possible temporal interactions between distant blocks. We propose to include a hardware mechanism that regulates the instruction flow so that subsequent basic blocks execute independently one of each other. This would allow any WCET estimation tool to consider only the individual execution times of the basic blocks.

La particularite des systemes temps-reel strict est de devoir respecter de maniere imperative des contraintes temporelles, qui sont le plus souvent des echeances de terminaison au plus tard. Dans de tels systemes, il est courant d'utiliser des methodes d'analyse d'ordonnancement, qui a partir de l'ensemble des tâches du systeme, determinent si les echeances seront ou non respectees. La plupart de ces methodes reposent sur la connaissance d'une borne superieure du temps d'execution de chaque tâche du systeme, nommee WCET pour Worst-Case Execution Time. Cet article propose une synthese des travaux effectues dans le domaine du calcul du WCET.