1. Improvement of threshold voltage deviation in damascene metal gate transistors
- Author
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Tomohiro Saito, K. Suguro, Tsuyoshi Shibata, Seiji Inumiya, Tsunetoshi Arikado, K. Matsuo, Kazuaki Nakajima, Y. Tsunashima, and Atsushi Yagishita
- Subjects
Materials science ,business.industry ,Gate dielectric ,Electrical engineering ,Time-dependent gate oxide breakdown ,Electronic, Optical and Magnetic Materials ,Threshold voltage ,Gate oxide ,MOSFET ,Optoelectronics ,Field-effect transistor ,Electrical and Electronic Engineering ,Metal gate ,business ,AND gate - Abstract
The metal gate work function deviation (crystal orientation deviation) was found to cause the threshold voltage deviation (/spl Delta/V/sub th/) in the damascene metal gate transistors. When the TiN work function (crystal orientation) is controlled by using the inorganic CVD technique, /spl Delta/V/sub th/ of the surface channel damascene metal gate (Al/TiN or W/TiN) transistors was drastically improved and found to be smaller than that for the conventional polysilicon gate transistors. The reason for the further reduction of the threshold voltage deviation (/spl Delta/V/sub th/) in the damascene metal gate transistors is considered to be that the thermal-damages and plasma-damages on gate and gate oxide are minimized in the damascene gate process. High performance sub-100 nm metal oxide semiconductor field effect transistors (MOSFETs) with work-function-controlled CVD-TiN metal-gate and Ta/sub 2/O/sub 5/ gate insulator are demonstrated in order to confirm the compatibility with high-k gate dielectrics and the technical advantages of the inorganic CVD-TiN.
- Published
- 2001
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