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Quarter-micron InGaAs-GaAs dual-gate HEMTs connected as a cascode MMIC in a compact manner have been fabricated and investigated. The devices show a high output impedance and a very low feedback capacitance, resulting in a high-voltage gain factor /sub gm///sub gd/ of 125 and a C/sub gs//C/sub gd/ ratio of 45. The current gain cutoff frequency f/sub T/ is 45 GHz and the maximum stable gain is 23.5 dB at 10 GHz and 19 dB at 20 GHz. The pseudomorphic cascode HEMTs show a low-noise figure of 1.1 dB with an associated gain of 22 dB at 10 GHz, at 18 GHz the minimum noise figure is 1.9 dB with 16-dB gain. >

This paper describes results of a study on the monolithic integration of AlGaAs light-emitting diodes with GaAs field-effect transistors on a conductive p-GaAs substrate. Using a selective growth technique, a horizontal configuration is fabricated that allows separate optimization of the two types of devices and provides a quasi-planar surface. This approach is compatible with the standard GaAs integrated-circuit technology. By inserting an undoped layer and a p-n junction between the active layer of the FET and the substrate leakage currents below 500 µA for bias voltage up to 9 V are obtained for these insulation structures. The emitted light intensity of the LED, connected in series with the FET, exhibits a nearly linear dependence on the driving gate potential. Temperature or optical crosstalk effects were not observed. Fall and rise times around 20 ns were measured from the pulse response characteristics. This switching time is limited by the LED whereas the FET and isolation layers were found not to affect the switching behavior of the circuit in this time frame.

Si/SiGe heterostructure bipolar transistors (HBTs) were fabricated and compared to Si homojunction transistors with similar doping levels. Low-temperature Si-MBE (molecular-beam epitaxy) was used to form the heterojunction and the homojunction layer sequences. A wet chemical selective etching technique was used to contact the thin (80 nm) base layer of the heterojunction transistor. A peak current gain of 200 to 400 was measured for the heterostructure devices, compared to a gain of two for the homojunction structure. The current gain collector current dependence of the heterostructure device could be due to surface recombination effects. >

GaAs/GaAlAs heterojunction bipolar transistors have been made and integrated to a seven-stage I2L-ring oscillator. The five layer sequence has been grown by MBE. The transistor operating upside down (inverted, collector on the top) exhibits a current gain up to 50 for one collector. A groove isolation technique has been used to isolate the gates from each other. The structure was planarized by polyimide, incorporated Ta thin-film resistors for the injectors as well as implanted resistors. A delay time of 3.0 ns at 60-µW power consumption has been achieved in the low power region which corresponds to a power delay product of 0,18 pJ and a minimum delay time of 700 ps has been obtained at 1 mW.

Lateral pnp bipolar transistors have been fabricated using Be implantation to define the emitter and collector areas. The base area (1 - 2 µm wide) has been protected against Be ions during implantation by SiO 2 and photoresist. The lateral straggling and diffusion during the anneling process reduces the base width, which can be adjusted with the annealing temperature and time. Between the active n-GaAs layer and substrate, a n-Ga 0.7 Al 0.3 As layer is deposited. The Be ions penetrating the GaAs/GaAlAs interface form a pn junction in the GaAlAs layer below the emitter and collector area. This reduces the current by several orders of magnitude through the parasitic emitter-substrate (base) diode compared to a GaAs pn junction, due to the higher band gap. For these devices with an effective base width of 0.5 µm, a current gain of 10 in common emitter configuration has been obtained.

It is shown that by MOCVD growth of a single strained GaAs:In layer, the quality of epitaxial GaAs material can be remarkably enhanced. This is demonstrated with respect to lifetimes and diffusion lengths of minority carriers. This technique permits an improvement of the quality of electronic and optoelectronic bipolar devices.

The Double-Schottky-Interdigitated (DSI) photodetector has been shown to be a very-high-speed optical detector for λ < 0.9 µm. Its major drawback, a high dark current (1 µA at 10 V), has been overcome by quasi-ternary growth of the GaAs epitaxial layer, reducing the dark current by three orders of magnitude.