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Total-ionizing-dose (TID) responses are investigated for 3-D-sequentially integrated fully depleted silicon-on-insulator (FD-SOI) MOSFETs. Strong layer-to-layer coupling of TID response is observed. The simultaneous application of positive bias to the gate of the bottom-layer device and negative bias to the top-layer device leads to the maximum enhancement of positive charge trapping in the top-layer device and the intermediate dielectric layer. This enhancement is due to the upward-directed electric field in the intermediate dielectric layer under these bias conditions. In contrast, electrostatic shielding prevents the gate bias of the top-layer device from affecting the response of the bottom-layer device, as confirmed by experiments and technology computer-aided design (TCAD) simulations. Effects of layer-to-layer coupling are less significant for postirradiation-biased annealing. [ABSTRACT FROM AUTHOR]

Total-ionizing-dose (TID) effects are investigated in a highly-scaled gate-all-around (GAA) FET technology using Si nanowire channels with a diameter of 8 nm. n- and p-FETs are irradiated up to 300 Mrad(SiO2) and annealed at room temperature. TID effects are negligible up to 10 Mrad(SiO2). At ultrahigh doses, the TID degradation depends on the irradiation bias condition, with more severe effects observed in longer channel devices. The worst case irradiation condition is when positive bias is applied to the gate. Threshold-voltage shifts are caused by H+-driven generation of interface traps at the oxide/channel interface. In contrast, FETs irradiated under negative gate bias are dominated by transconductance loss and increases of low-frequency noise, suggesting the activation of border traps. Enhanced off-leakage current is observed in n-FETs due to charge trapping in shallow-trench isolation, and in p-FETs due to trap-assisted recombination at STI sidewalls and/or spacer dielectrics at drain/bulk junctions. [ABSTRACT FROM AUTHOR]

An overview is presented of displacement damage (DD) effects, total-ionizing-dose (TID) effects, and single-event effects in AlGaN/GaN high electron mobility transistors (HEMTs). High-fluence proton-induced DD creates point defects and impurity complexes at fluences that are comparable to or higher than those encountered in space applications. Defect and impurity dehydrogenation also contributes significantly to the DD/TID response at fluences typical of realistic space environments. The bias applied during irradiation can affect the DD/TID response strongly. Bias stress before irradiation can lead to enhanced proton-induced degradation of AlGaN/GaN HEMTs. Low-frequency noise measurements and density functional calculations provide insight into defect microstructures and energy levels. GaN-based HEMTs can be quite vulnerable to single-event effects in space. Of particular concern is single-event burnout (SEB). The vulnerabilities of GaN-based devices to SEB at voltages below rated limits and significant device-to-device variations in SEB response lead to significant voltage derating for GaN-based power devices in space systems. Developing an improved understanding of the effects of defects and hydrogen on the radiation response of AlGaN/GaN HEMTs can improve the DD/TID response by reducing threshold-voltage shifts and transconductance degradation. Reducing defect densities may also reduce the variation in SEB response, enabling reliable device operation at higher voltages in future space systems. [ABSTRACT FROM AUTHOR]

The total-ionizing-dose response of third-generation SiGe HBTs was investigated at elevated temperatures (80 °C and 130 °C) and compared with the response at 30 °C. The devices show less damage to irradiation at higher temperatures. Annealing experiments and TCAD simulations are used to investigate the degradation mechanism. The reduced degradation in forward mode at elevated temperatures is caused by increased annealing of interface traps primarily due to diffusion and reactions of H2 within the oxide/nitride EB spacer. The degradation is modest at all measured temperatures, allowing these devices to be suitable for radiation-rich environments where elevated temperatures are expected. [ABSTRACT FROM AUTHOR]

Negative-bias-stress and total-ionizing-dose (TID) effects in deeply scaled Ge-gate-all-around (GAA) nanowire (NW) devices are characterized for different biasing conditions. Negative-bias-stress-induced degradation in Ge GAA device originates primarily from the interface- and border-trap generation. Devices stressed at high gate voltage show rapid initial degradation and quick saturation dominated by interface-trap generation. Radiation-induced OFF-state leakage current in Ge GAA NWs increases with dose due to enhanced band-to-band tunneling (BTBT) caused by charge trapping in the shallow trench isolation (STI). [ABSTRACT FROM AUTHOR]

Total-ionizing-dose effects are evaluated in vertical-charge-trapping NAND devices with silicon oxynitride (SiON) and SiO2 tunneling layers. Processing splits include SiON tunneling layers with and without H2/D2 high-pressure annealing. Programmed devices were irradiated to 500 krad(SiO2) with 10-keV X-rays and annealed for 30 min. Second programming after annealing does not fully restore the original, programmed state. Radiation-induced trapped holes compensate for deeply trapped electrons that are injected into the dielectric during device programming. Throughout the full irradiation and annealing sequence, threshold voltages remain large enough to enable successful nonvolatile (NV) memory application. [ABSTRACT FROM AUTHOR]

Integrated silicon microwave pin diodes are exposed to 10-keV X-rays up to a dose of 2 Mrad(SiO2) and 14-MeV fast neutrons up to a fluence of $2.2\,\,\boldsymbol {\times }\,\,10\,\,^{\mathrm{ 13}}$ cm−2. Changes in both dc leakage current and small-signal circuit components are examined. Degradation in performance due to total-ionizing dose (TID) is shown to be suppressed by non-quasi-static (NQS) effects during radio frequency (RF) operation. Tolerance to displacement damage from fast neutrons is also observed, which is explained using technology computer-aided design (TCAD) simulations. Overall, the characterized pin diodes are tolerant to cumulative radiation at levels consistent with space applications such as geosynchronous weather satellites. [ABSTRACT FROM AUTHOR]

Effects of ~35 years of aging during storage are investigated on the radiation response and 1/ $f$ noise of Oki nMOS and pMOS transistors with high oxygen vacancy densities in SiO2. Short-term interface-trap buildup during irradiation is enhanced significantly, relative to that observed in 1989, 1997, and 2008. In contrast, a similar latent interface-trap buildup is observed for aged pMOS devices irradiated and annealed at room and elevated temperatures at positive bias in this and earlier studies. The significant latent interface-trap buildup is observed for nMOS devices irradiated at 0 V and annealed at room and elevated temperatures under positive bias, a condition not evaluated in prior work. Results strongly suggest that latent interface-trap buildup is due to H2 diffusion and dissociation at charged or dipolar O vacancies in SiO2, followed by proton transport to the Si/SiO2 interface and reactions with Si–H complexes. Models that attribute latent interface-trap buildup to long-term proton trapping at O vacancies in SiO2 appear to be ruled out by these results. Additional insight is provided into mechanisms of postirradiation interface- and border-trap buildup after long-term MOS device storage. [ABSTRACT FROM AUTHOR]

Total ionizing dose (TID) effects at the 7-nm bulk FinFET node are characterized through changes in ring oscillator (RO) frequencies and current as a function of $V_{\mathrm {DD}}$ to model delay and power degradations in digital circuits. At the 7-nm node, tests show that gate delay decreased, and power consumption increased as TID increased. Percent increase in parameter degradations shows an inverse relationship with supply voltage, while percent increase in power consumption shows a direct relationship with supply voltage. Annealing at room temperature did not affect degradations. Circuit-level degradations for the 7-nm technology were less than 1% after TID exposure of 380 krad(SiO2). These TID exposure results will provide insight to designers about circuit-level parameters of interest concerning the 7-nm technology node. [ABSTRACT FROM AUTHOR]

Analog-to-digital converters (ADCs) with different topologies respond differently to total ionizing dose (TID). A flexible behavioral modeling approach is proposed for system-level simulation of TID effects in successive-approximation-register (SAR) ADCs. The radiation-enabled approach can be adapted for a wide range of ADCs of various resolutions, clock speeds, and manufacturers. The empirical model is calibrated and validated, pre-rad and post-rad, for a particular ADC. Pre-rad calibration is performed by introducing distributions of static parameters corresponding to datasheet specifications. The post-rad calibration is accomplished by introducing error sources associated with the comparator and digital-to-analog converter (DAC), corresponding to experimental data. The calibrated model is used to examine the dynamic performance and to estimate the probability of parametric failure during the mission lifetime. [ABSTRACT FROM AUTHOR]

Total-ionizing-dose (TID) effects and low-frequency noise are evaluated in advanced bulk nMOS and pMOS FinFETs with SiO2/HfO2 gate dielectrics. Otherwise identical devices built with and without through-silicon via (TSV) integration exhibit threshold voltage shifts of less than 25 mV and changes in maximum transconductance of less than 1% up to 2 Mrad(SiO2). TSV integration negligibly impacts threshold shifts and degradation of subthreshold swing and $I_{\mathrm{\scriptscriptstyle ON}}/I_{\mathrm{\scriptscriptstyle OFF}}$ ratios. Similar low-frequency noise magnitudes and frequency dependencies are observed before and after TID irradiation for each device type. Effective densities of the near-interfacial electron traps responsible for the noise in the nMOS devices increase as the surface potential moves toward midgap, while effective densities of the hole traps that cause the noise in the pMOS devices increase as the surface potential moves toward the valence band edge. [ABSTRACT FROM AUTHOR]

Gate-all-around (GAA) silicon nanowire (NW) CMOS transistors demonstrate outstanding total-ionizing-dose (TID) tolerance due to the ultrascaled gate dielectric thickness, enhanced electrostatic gate control, and suppression of parasitic leakage current paths. nFETs and pFETs show similar TID responses, making the GAA NW technology an excellent candidate for CMOS IC applications in high-radiation environments. The slight degradation of the threshold voltage suggests limited charge buildup in the gate dielectrics. However, low-frequency noise and random telegraph noise measurements show the importance of change in trap configurations in both the near-interfacial SiO2 and HfO2 dielectric layers to the radiation response and reliability of GAA NW devices. These traps are most likely due to oxygen vacancies and/or hydrogen complexes. [ABSTRACT FROM AUTHOR]

Total-ionizing-dose (TID) effects are compared in 1) conventional high-temperature processed planar fully-depleted silicon-on-insulator (FD-SOI) p-channel MOSFETs, 2) 3-D sequentially integrated (3DSI) FD-SOI MOSFETs in the bottom layer with additional thermal budget and process flows due to the creation of the top layer, and 3) 3DSI low-temperature-processed FD-SOI MOSFETs in the top layer. When irradiated under worst case negative bias, 3DSI bottom-isolated transistors show significantly enhanced charge trapping and transconductance degradation than planar devices. The enhanced degradation for bottom-isolated devices is attributed primarily to increased interface- and border-trap formation at the buried oxide (BOX)/Si interface and/or lateral charge nonuniformities in the BOX. The radiation-induced transconductance degradation in top-isolated devices is attributed to the increased resistance of the portion of the channel that underlies the source/drain spacers. [ABSTRACT FROM AUTHOR]

Total-ionizing-dose (TID) effects are investigated for 22-nm fully-depleted silicon-on-insulator (FDSOI) and 14-nm bulk FinFET charge-trap memory transistors. Electron trapping in the gate dielectric establishes the programmed memory state for both silicon on insulator (SOI) and bulk devices. To first order, ionizing radiation does not interact strongly with programing-induced charges in the gate dielectric for either device type. Hole trapping in the buried oxide dominates the TID response of the 22-nm FDSOI devices. The 14-nm bulk devices with two fins and total effective fin widths of 150 nm are minimally affected by TID, but the subthreshold leakage of devices with 40 fins and total effective fin widths of $3~\mu \text{m}$ increases with increasing TID. When devices are programmed or reprogrammed after irradiation, significant increases in subthreshold slope are observed due to the generation of interface traps, border traps, and/or charge lateral nonuniformities. [ABSTRACT FROM AUTHOR]

Peak transient currents due to pulsed-laser or heavy-ion irradiation of Ge $p$ MOS FinFETs are nearly independent of gate bias. This is because the prompt photocurrent is due primarily to a transient source–drain shunt. In contrast, long-term diffusion charge collection is strongly gate-bias dependent. This bias dependence results from hole injection from the source in response to the transient increase in electron concentration in the channel. The transients measured at the source terminal change polarity when the strike location moves from the source to the drain, but this effect does not occur for the transients measured at the drain terminal. Charge collection mechanisms are studied using TCAD simulations. [ABSTRACT FROM AUTHOR]

Pulsed-laser-induced single-event current measurements on two geometries of waveguide-integrated germanium photodiodes were conducted over a range of operating voltages to examine the impact of photodiode geometry on the transient response. Vertical p-i-n photodiodes exhibit transients with a duration that is relatively independent of the operating voltage, while the transient duration in lateral p-i-n photodiodes depends on the operating voltage. Furthermore, the experimental measurements facilitate identification of device dimensions that impact the transient response. These results can be used to identify potential radiation mitigation strategies for photodiodes operating in a radiation environment. Understanding the implications of design choices is critical for designing integrated photonic systems that balance system performance with tolerance for radiation degradation. [ABSTRACT FROM AUTHOR]

Heavy-ion, focused X-ray, and pulsed laser single-event transient (SET) experiments are performed on a silicon epitaxial diode. Collected charge, transient rise times, and transient fall times are calculated and compared between different sources. The transient shape characteristics depend on the source (ion, X-ray, or laser), even when similar amounts of charge are generated. The observed differences are examined and explained in terms of basic charge collection mechanisms. [ABSTRACT FROM AUTHOR]

Statistical analysis is performed on the totalionizing-dose (TID) response of fourth-generation silicon–germanium heterojunction bipolar transistors, revealing an increasing variance in base current with increasing dose. A 10-fold increase is observed after 2 Mrad(SiO2) of radiation exposure. The postirradiation performance is shown to be poorly correlated with initial performance, revealing potential difficulties for radiation hardness assurance testing. Simple analytical theory is used to demonstrate how TID exacerbates performance variations due to preexisting process-induced variations. Then, technology computer-aided design (TCAD) simulations are used to investigate the fundamental mechanisms driving these statistical changes, particularly process variations associated with the doping profiles. Simulation results reveal potential methods to both predict TID response and mitigate it at the process level. Finally, implications for hardness assurance testing and radiation-tolerant device and circuit design are discussed, especially the need to consider postirradiation variability in the design process for radiation-intense applications. [ABSTRACT FROM AUTHOR]

The energy distributions of electrons in gate-all-around (GAA) Si MOSFETs are analyzed using full-band 3-D Monte Carlo (MC) simulations. Excellent agreement is obtained with experimental current–voltage characteristics. For these 24-nm gate length devices, the electron distribution features a smeared energy peak with an extended tail. This extension of the tail results primarily from the Coulomb scattering within the channel. A fraction of electrons that enter the drain retains their energy, resulting in an out-of-equilibrium distribution in the drain region. The simulated density and average energy of the hot electrons correlate well with experimentally observed device degradation. We propose that the interaction of high-energy electrons with hydrogen-passivated phosphorus dopant complexes within the drain may provide an additional pathway for interface-trap formation in these devices. [ABSTRACT FROM AUTHOR]

Heavy-ion measurements are used to define a multiply nested sensitive-volume model for a 180-nm static random access memory (SRAM) test structure using the Monte Carlo radiative energy deposition (MRED) tool. We demonstrate that the fundamental assumptions of simple rectangular-parallelepiped (RPP) or integral-RPP models are inappropriate for single-event latchup (SEL) in this test structure, indicating that more advanced modeling is needed. We develop an MRED model that agrees well with latchup data at normal incidence and at roll and tilt angles of 60°. This process should facilitate estimates of SEL cross section and event rates for this and similar technologies in space environments. [ABSTRACT FROM AUTHOR]

The total-ionizing-dose (TID) response of indium gallium arsenide (InGaAs) MOSFETs with Al2O3 gate dielectrics and several channel lengths is evaluated under different biases. DC static characteristics show large negative threshold voltage Vth shifts and subthreshold stretchout (SS), indicating net positive charge trapping in the gate oxide and generation of the interface and border traps. Hysteresis and Id – Vgs measurements from cryogenic to high temperatures show the important role of defects in the Al2O3 gate dielectric to the TID response. Radiation-induced-hole trapping is attributed to oxygen vacancies in the Al2O3. The relatively large hysteresis in these devices is attributed primarily to dangling Al bonds in the near-interfacial Al2O3. Analysis of the temperature dependence of Vth and SS suggests that the rate at which electrons leave the Al2O3 during a positive-to-negative gate-bias sweep is higher than the rate at which they enter during a negative-to-positive gate-bias sweep. [ABSTRACT FROM AUTHOR]

Effects of additional thermal budget associated with a three-dimensional (3D) fabrication sequence are evaluated for the total-ionizing dose radiation response of fully depleted silicon-on-insulator (FD-SOI) MOSFETs. Current-voltage and low-frequency (1/ ${f}$) noise measurements are compared for (1) conventional planar FD-SOI MOSFETs, and (2) MOSFETs formed in the bottom layer of the 3D process and subjected to the process steps associated with formation of a second active layer. Similar radiation-induced voltage shifts and increases of 1/ ${f}$ noise are observed after irradiation for both types of structures. These similar changes in response show that the additional thermal processing involved with 3D fabrication has little effect on border-trap densities and radiation-induced charge trapping in gate and/or buried oxides of MOSFETs formed in the bottom layer of the 3D process. [ABSTRACT FROM AUTHOR]

Charge transport mechanisms of forward and reverse leakage currents in vertical GaN Schottky barrier diodes are investigated by measuring the temperature-dependent current–voltage characteristics. The results show that the leakage current is primarily governed by dislocation-associated thermionic field emission (TFE). The primary transport path is the reduced, localized conduction band around the dislocation core rather than the continuum defect states. A refined phenomenological physical model is developed for conductive dislocations in GaN, emphasizing that: 1) surface donors, surrounding the core of dislocations, can significantly shrink the barrier region after ionization, causing severe TFE leakage; 2) the ON donors likely to be responsible for TFE have a typical density of ~ 1 × 1018 cm−3 at 300 K and activation energy of 78 meV; and 3) the barrier height at donor sites is ~0.65 eV at 300 K, which is reduced by ~0.4 eV with respect to the dislocation-free region. [ABSTRACT FROM AUTHOR]

Neuromorphic computing endeavors to imitate the way biological brains process information and solve problems. Uses for neuromorphic computing span disciplines and include applications in image processing, audio processing, optimization, and more. This work explores the effect of proton-induced single-event upsets (SEUs) on a neuromorphic computing architecture engaged in image recognition. Two main results are found. One, the overall classification accuracy is unchanged although a high number of hidden, tolerable errors occurred. Additionally, SEUs are found to alter the relative occurrence of false positives and false negatives, which occurred despite the overall classification accuracy remaining unaffected. [ABSTRACT FROM AUTHOR]

Total-ionizing-dose (TID) effects and low-frequency noise are evaluated in 30-nm gate-length bulk and silicon-on-insulator (SOI) FinFETs for devices with fin widths of 10–40 nm. Minimal threshold voltage shifts are observed at 2 Mrad(SiO2), but large increases in low-frequency noise are found, and significant changes in defect-energy distributions are inferred. Radiation-induced leakage current is enhanced for narrow- and short-channel bulk FinFETs. Short-channel SOI FinFETs show enhanced degradation compared with longer-channel devices. Narrow- and short-channel SOI devices exhibit high radiation tolerance. Significant random telegraph noise (RTN) is observed in smaller devices due to prominent individual defects. [ABSTRACT FROM AUTHOR]

We evaluate the total-ionizing-dose (TID) responses of InGaAs nMOS fin field-effect transistors (FinFETs) with a modified gate-stack irradiated with 10-keV X-rays under different gate biases. This modified InGaAs nMOS FinFET process shows decreased subthreshold leakage current and increased hysteresis in as-processed devices, and reduced hole trapping in irradiated devices, than first-generation development-stage devices. The reduction in subthreshold leakage current is attributed to changing the buffer layer from GaAs to In0.3Ga0.7As, thereby enhancing the material quality. Both the increased hysteresis in as-processed devices and reduced hole trapping in irradiated devices are attributed primarily to thinning the Al2O3 layer that separates the HfO2 from the InGaAs layers. This facilitates charge exchange with defects at the HfO2/Al2O3 interface and reduces the percentage of radiation-induced holes that are generated in Al2O3 and trapped in HfO2. The removal of a tungsten layer above the TiN gate reduces the interface dose enhancement. [ABSTRACT FROM AUTHOR]

Total-ionizing-dose mechanisms are investigated in 16-nm InGaAs FinFETs with an HfO2/Al2O3 gate-stack. Transistors are irradiated up to 500 krad(SiO2) and annealed at high temperatures. Irradiated devices show negative threshold-voltage Vth shifts, subthreshold stretch-out, and leakage current increases. These result from positive charge trapping in the gate oxide and shallow trench insulators, and increases in the interface and border-trap charge densities. Low-frequency noise measurements at different temperatures indicate a significant increase of noise magnitude in irradiated devices at an activation energy of ~0.4 eV. Density functional theory (DFT) calculations strongly suggest that transistor Vth shifts are due primarily to hole trapping at oxygen vacancies in HfO2, and the increased noise is due primarily to O vacancies in Al2O3. Additional contributions to the noise from defects in the GaAs buffer layer are also likely, primarily at low temperatures. [ABSTRACT FROM AUTHOR]

Pulsed, laser-induced, single-event current measurements on silicon-on-insulator (SOI) FinFETs at subbandgap wavelength (1260 nm) are affected by the polarization of the laser light used in the experimental testing setup. Such polarization dependence is not observed during pulsed laser, single-event effects testing on large-area silicon diodes, suggesting that polarization dependence arises due to the presence of the nanoscale fin. Plasmonic enhancement is proposed as a likely mechanism for the polarization effects due to the metal/dielectric interfaces in the fin region. The observed polarization dependence has ramifications for collection and interpretation of data acquired by pulsed laser testing. Device orientation of FinFETs and other nanoscale devices during pulsed laser testing should be considered in order to ensure consistent testing conditions and reproducible measurement results across multiple measurement campaigns. [ABSTRACT FROM AUTHOR]

A sensitive volume is developed using pulsed laser-induced collected charge for two bias conditions in an epitaxial silicon diode. These sensitive volumes show good agreement with the experimental two-photon absorption laser-induced collected charge at a variety of focal positions and pulse energies. When compared to ion-induced collected charge, the laser-based sensitive volume overpredicts the experimental collected charge at low bias and agrees at high bias. A sensitive volume based on ion-induced collected charge adequately describes the ion experimental results at both biases. Differences in the amount of potential modulation explain the differences between the ion- and laser-based sensitive volumes at the lower bias. Truncation of potential modulation by the highly doped substrate, at the higher bias, results in similar sensitive volumes. [ABSTRACT FROM AUTHOR]

This paper introduces a Monte Carlo (MC) approach based on the binary collision approximation to estimate defect types and densities in proton- and heavy-ion-irradiated graphene layers. The types and concentrations of defects that appear in graphene due to irradiation with various ions with energies ranging from ~100 keV to ~100 MeV are identified. This simple method enables defect introduction rates in graphene to be predicted to within better than a factor of two accuracy, relative to experimental measurements in a beam environment. The results demonstrate that all defects generated by ions with high incident energy are formed via head-on collisions and in-plane recoils, which is unique for 2-D materials. [ABSTRACT FROM AUTHOR]

We evaluate the total ionizing dose (TID) responses of InGaAs nMOS FinFETs with different gate lengths irradiated with 10-keV X-rays under different gate biases. The largest degradation after irradiation occurs at $V_{\mathrm {G}} = -1$ V. Radiation-induced trapped positive charge dominates the TID response of InGaAs FinFET transistors, consistent with previous results for InGaAs multifin capacitors. Shorter gate-length devices show larger radiation-induced charge trapping than longer gate-length devices, most likely due to the electrostatic effects of trapped charge in the surrounding SiO2 isolation and SiO2/Si3N4 spacer oxides. The 1/ $f$ noise measurements indicate a high trap density and a nonuniform defect-energy distribution, consistent with a strong variation of effective border-trap density with surface potential. [ABSTRACT FROM AUTHOR]

Significant threshold voltage $V_{\mathrm {th}}$ shifts are observed during 10-keV X-ray irradiation of AlGaN/GaN high-electron mobility transistors (HEMTs). Shifts are much smaller for lower dose-rate Cs-137 irradiation than that for higher dose-rate X-ray irradiation. This occurs because hydrogen transport and interactions with defects and impurities in these crystalline wide bandgap semiconductor materials differ fundamentally from those in amorphous SiO2. The electric field is also higher in GaN-based HEMTs than in bipolar base oxides. The absence of enhanced low-dose-rate sensitivity in these devices simplifies testing of GaN-based HEMTs for space applications. No significant X-ray-induced $V_{\mathrm {th}}$ shifts are observed in development stage InAlN/GaN HEMTs. [ABSTRACT FROM AUTHOR]

Silicon waveguide (WG) integrated p-i-n germanium photodiodes (PDs) from a monolithic electronic–photonic integrated circuit technology were exposed to ionizing radiation from a 10-keV X-ray source to investigate total ionizing dose effects. Existing work on radiation effects in PDs, which is almost entirely based on normal-incidence PDs (rather than WG-integrated PDs), is reviewed to provide context and a framework for understanding the measurement results. Back-end-of-line considerations suggest the enhancement of the ionizing dose due to high- $Z$ materials near the PD. PD performance was characterized in terms of dark current, S-parameters, dc photocurrent response, and optical-to-electrical conversion frequency response, shortly before and after irradiation. No significant degradation was observed, indicating that these devices may be suitable for applications in harsh radiation environments. [ABSTRACT FROM AUTHOR]

The pulsed-laser single-event transient response of InGaAs FinFETs on bulk silicon substrates is investigated. Charge collection due to a source–drain shunt effect and drain-to-substrate junction charge collection contribute to the observed transients. The transient response of these silicon substrate devices is compared to that of InGaAs FinFETs on semi-insulating substrates. Faster transients with reduced peak currents and peak widths are observed on the silicon substrate devices. Simulations show hole collection by the silicon substrate. This reduces the amount of source-barrier lowering and bipolar-amplification relative to other III–V devices. Moreover, the reduced hole lifetime in the GaAs buffer layer also contributes to the relative reduction of the bipolar amplification in these devices. [ABSTRACT FROM AUTHOR]

Tunneling-dominated charge transport is demonstrated in vertically stacked MoS2/interlayer/MoS2 heterostructures with Al2O3, hexagonal boron nitride (h-BN), and HfO2 dielectrics. All devices are highly resistant to 10-keV X-ray irradiation. Only small transient changes in X-ray-induced photocurrent are observed as a result of trap creation in the thin interlayer dielectric, with rapid passivation. Samples with Al2O3 and h-BN interlayer dielectrics show significant increases in conduction current during proton irradiation, due to displacement-damage-induced defects that lower the effective tunnel-barrier height. Density-functional-theory calculations provide insights into the pertinent defects. Devices with HfO2 interlayer dielectrics show great promise for use in radiation tolerant, ultimately scaled tunnel FETs. [ABSTRACT FROM AUTHOR]

Gate and drain bias dependences of hot carrier degradation are evaluated for AlGaN/GaN HEMTs fabricated via two different process methods. Both positive and negative threshold voltage $V_{\mathbf{th}}$ shifts are observed for each device type, depending on the mode and duration of the stress, indicating the presence of significant densities of donor-like and acceptor-like traps. Worst-case stress bias for transconductance degradation is the “ON” state for both device types. We find that transconductance degradation provides a more effective parameter to monitor defect buildup than $V_{\mathbf{th}}$ shifts, and that a single worst-case stressing bias condition cannot be defined for all varieties of AlGaN/GaN HEMTs. Low-frequency noise measurements versus temperature assist the identification of defects responsible for the observed degradation. Defect dehydrogenation and oxygen impurity centers are found to be particularly significant to the response of these devices. [ABSTRACT FROM AUTHOR]

Total-ionizing-dose effects on electrothermal micro- scanners are investigated using 10-keV X-rays and 14.3-MeV oxygen ions. The corresponding changes in mechanical displacement are measured using an optical microscope. Applied dc voltage and/or radiation-induced charging lead to changes in the vertical position and resistance of the structures. Radiation-induced changes in the vertical position and resistance and postirradiation recovery or superrecovery of these quantities are sensitive to dc biases applied during and/or after irradiation. Simple electrostatic and computational models are qualitatively consistent with observed trends in device response. [ABSTRACT FROM AUTHOR]

Trapping characteristics of MOS structures with $\beta $ -Ga2O3 substrates and Al2O3 gate dielectrics are evaluated via constant-voltage stress and X-ray irradiation. Traps that affect bias-induced charging are located primarily in the Al2O3 dielectric layer, and are distributed broadly in time and/or energy. Stress-induced flatband voltage shifts are reduced by N2 annealing. Trap-assisted tunneling is shown to be responsible for the observed gate leakage. Hole trapping in the Al2O3 dielectric layer dominates device radiation response. The relatively modest radiation-induced charge trapping observed in these devices is promising for the potential future use of Al2O3/ $\beta $ -Ga2O3 devices in a space environment. [ABSTRACT FROM AUTHOR]

The temperature-dependent efficiency droop in InGaN/GaN blue light-emitting diodes (LEDs) has been evaluated. Carrier freeze-out in p-GaN has a strong influence on forward current transport, leading to limited hole density and non-uniform distribution among the quantum wells. Auger recombination is primarily responsible for the observed LED-efficiency droop for temperatures T > 200 K. However, at lower temperatures, electrons can readily tunnel into the p-GaN side to directly compensate Mg acceptors, due to enhanced Coulomb screening. This reduces hole ionization and the emission efficiency. Experimental data agree well with a theoretical model, confirming the dominant role of leakage for the low-temperature efficiency droop. [ABSTRACT FROM AUTHOR]

Nb2O5-based metal–insulator–metal (MIM) diodes are ideal for neuromorphic computing applications because they exhibit desirable rectification, hysteresis, and capacitance characteristics without electroforming. We employ capacitance-frequency measurements to evaluate the total-ionizing-dose res- ponse of these devices to avoid measurement-induced disturbance of trap distributions caused by typical gate-voltage sweeping methods. Power-law dependences are observed for the low-frequency capacitance and conductance, consistent with hopping conduction of carriers through the oxides. Despite their high oxygen-vacancy densities, the Nb2O5-based MIM diodes are radiation tolerant up to at least Mrad(SiO2) doses. [ABSTRACT FROM PUBLISHER]

Two-photon absorption (TPA) pulsed-laser testing is used to analyze the TPA-induced single-event latchup sensitive-area of a specially designed test structure. This method takes into account the existence of an onset region in which the probability of triggering latchup transits between 0 and 1 as the laser pulse energy increases. This variability is attributed to a combination of laser pulse-to-pulse variability and variations in local carrier density and temperature. For each spatial position, the latchup probability associated with a given energy is calculated. Calculation of latchup cross section at lower laser energies, relative to onset, is improved significantly by taking into account the full probability distribution. The transition from low probability of latchup to high probability is more abrupt near the source contacts than for surrounding areas. [ABSTRACT FROM PUBLISHER]

The single-event-transient response of InGaAs FinFETs with different fin widths is examined using pulsed-laser and heavy-ion irradiation. Devices with wider fins collect more charge in both environments. Quantum-well structures confine charge collection in the channel, and determine the sensitive volume. Simulations show that the charge density produced by irradiation is similar for devices with different fin widths, but more charge is collected by wider fin devices due to the larger channel volume. Charge accumulated in the buffer and substrate layers modulates the body potential, altering the degree of back-gate control, leading to additional effects associated with charge accumulation in wider fin devices. Optical simulations for a model system suggest that optical phenomena in the fins should be considered for laser testing. These include optical interference, plasmonic enhancement at the metal–dielectric interfaces, and enhanced electron–hole pair recombination due to multiple reflections in multigate devices with nanoscale dimensions. [ABSTRACT FROM PUBLISHER]

Angular single-event (SE) mechanisms and experimental upset data for 14-/16-nm bulk fin field-effect transistor (FinFET) technologies are presented and analyzed. The discrete structure of FinFETs introduces unique geometrical and orientation dependences for angular SE mechanisms and SE upset (SEU) responses of FinFET circuits. Geometric analyses and 3-D technology computer-aided design results effectively explain the angular mechanisms behind experimentally observed SE crosssectional responses. Results show that angular SEU crosssectional characteristics can be attributed to the proportional contributions of charge deposition regions in the fin structure and the subfin bulk substrate. [ABSTRACT FROM PUBLISHER]