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Blind image quality assessment (BIQA) methods aim to predict quality of images as perceived by humans without access to a reference image. Recently, deep learning methods have gained substantial attention in the research community and have proven useful for BIQA. Although previous study of deep neural networks (DNN) methods is presented, some novelty DNN methods, which are recently proposed, are not summarized for BIQA. In this paper, we provide a survey covering various DNN methods for BIQA. First, we systematically analyze the existing DNN-based quality assessment methods according to the role of DNN. Then, we compare the prediction performance of various DNN methods on the synthetic databases (LIVE, TID2013, CSIQ, LIVE multiply distorted) and authentic databases (LIVE challenge), providing important information that can help understand the underlying properties between different DNN methods for BIQA. Finally, we describe some emerging challenges in designing and training DNN-based BIQA, along with few directions that are worth further investigations in the future.

Memristors are finding applications in memory, logic, neuromorphic systems, and data security. To this end, we leverage the non-linear behaviour of memristors to devise a low overhead physical unclonable function using a memristive chaos circuit in conjunction with a non-linear memristive encoder. We demonstrate the effectiveness of this architecture in Challenge-Response-Pair based authentication, and for its physical uncloneability. This architecture is highly versatile and can be implemented with a single encoder or a number of encoders running in parallel, each one with its own merit, for extending the sizes of CRPs. To demonstrate its effectiveness, we subject the architecture to machine learning based modelling attacks e.g. Logistic Regression, Support Vector Machines, Random Forest, as well as Artificial Neural Network classifiers. We found out that the proposed PUF architecture provides better resistance to such attacks, even for smaller bit sizes and at reduced overheads.

A highly efficient memristor MIN function based activation circuit is presented for memristive neuromorphic systems, using only two memristors and a comparator. The ReLU activation function is approximated using this circuit for the first time. The ReLU activation function helps to significantly reduce the time and computational cost of training in neuromorphic systems due to its simplicity and effectiveness in deep neural networks. A multilayer neural network is simulated using this activation circuit in addition to traditional memristor crossbar arrays. The results illustrate that the proposed circuit is able to perform training effectively with significant savings in time and area in memristor crossbar based neural networks.

Memristor is being considered as a game changer for the realization of neuromorphic hardware systems due to its similarity with biological synapse. Recent studies show that memristor crossbar can provide high density and high performance neural network hardware implementation at low power due to its physical layout, nano scale size and low power consumption feature. This paper describes the training method that can be used for the implementation of memristive multi-layer neural network with ex-situ method. We mimic the behavior of memristor crossbar in software training process to achieve more accurate and close computations to hardware. Voltage divider has been used to calculate the dot product in this method. To demonstrate the accuracy and effectiveness of this method, different patterns and non-separable functions using memristor crossbar structures are simulated. The results demonstrate that more accurate computations can be produced using this learning method for ex-situ. It also reduces the learning time of functions.

The most of the memristor based applications which have been proposed so far have not considered the parasitic components. In this paper, we apply a generic memristor model which includes the parasitic effects to our proposed memristive logic architectures. First, we show that the current response of the memristor has the decaying oscillation when the unit step function is applied. Then we demonstrated that our specific memristive logic structure can almost eliminate those effects which are generated by the parasitic components of the memristor. In addition, the propagation delay and the variation of the memristive XOR gate are increased because of the parasitic components. With the delay analysis on cascaded memristive logic design, the experimental results show that our 3T-4M memristive XOR architecture can build the more robust delay based memristive physical unclonable function (PUF) comparing to the existing memristive PUF.

This paper presents a circuit level analysis of write operation in memristor crossbar memory array with and without line resistance. Three write schemes: floating line, 1/2 and 1/3 are investigated. Analysis shows that floating line scheme could also be considered reliable in arrays with aspect ratio of 1:1 and negligible line resistance just like the latter two schemes. Further analysis also shows that high density crossbar structures cannot be designed using any of the three schemes with worst case line resistance and data distribution within the array. The presented analyses are suitable for modeling the crossbar array as well as evaluating performances during write operation. The output of this work provides the necessary design models that will assist designers in implementation of write techniques in crossbar array in future systems.

We present techniques for realising reliable logic functions and more complex systems based on the switching characteristics of memristors. First we show that memristors have inherent properties for representing multiple valued MIN-MAX logic over the post algebra. We also present efficient architectures for realising multifunction logic gates, and present a technique with hybrid 1T-4M architecture for seamless integration with existing CMOS logic. Memristors have tremendous potential for security aware hardware synthesis. To this end, we present design methods for realising highly efficient Galois Field circuits, which are widely used in crypto hardware, based on our 1T-4M architectures. Experimental results show that our proposed design requires significantly lower power while maintaining reliable operations at high frequencies compared to the CMOS counterparts.

Resistive memories have simpler structures and are capable of producing highly dense memory through crossbar architecture without the use of access devices. Reliability however remains a problem of resistive memories especially in its basic read operation. This paper presents a comprehensive model for resistive devices in crossbar array as well as models for four crossbar read schemes. These models are non-restrictive and are suitable for accurate analytical analysis of crossbar arrays and the evaluation of their performance during read operation.

We consider the problem of distributed estimation, where a set of nodes is required to collectively estimate network parameters from noisy measurements. The problem is important when modeling a wide class of real-time sensor networks, where efficiency, robustness, and low power consumption are desired features. In this work, we focus on diffusion-based adaptive solutions that capable to avoid undue influence from outliers, especially in the presence of impulsive noise or dysfunction of certain nodes. We motivate and propose trimmed diffusion least mean square (TDLMS) algorithm that selects normal neighborhood to update the system estimation. We provide performance analysis together with simulation results comparing with existing methods.

We design a cloud computing service supply chain with a monopoly application infrastructure provider (AIP) and multiple competing application service providers (ASPs) under asymmetric information. We use Bertrand competition to characterize the competitive relationship between ASPs. A service level agreement (SLA) serves as the foundation for the expected level of ASPs' services. The service system of ASPs is modeled as an M/M/1 queueing system while the effects of congestion are considered. We study the problem how to coordinate the cloud computing service supply chain with revenue-sharing contract under asymmetric information ,and propose a new model relevantly. In our model ,the AIP as the leader has the decision-making right for wholesale price and revenue-sharing proportion ,while ASPs as the followers have just the right to conceal the information on marginal cost and determine the ordering computing capacity . We discuss the AIP's optimal revenue sharing strategy in case ASPs conceal the unit application service cost ,with a comparative analysis made under symmetrical information at the same time. A numerical simulation is done and the computing results show that the AIP 's optimal revenue-sharing strategy to spur ASP swill pay a price for the anonymity and unobservability of ASPs' private information and reduce his/her profit ,while ASPs can gain from that.

In this work, we put forward a new adaptation criterion, namely the hybrid criterion (HC), which is a mixture of the traditional mean square error (MSE) and the maximum correntropy criterion (MCC). The HC criterion is developed from the viewpoint of the least trimmed squares (LTS) estimator, a high breakdown estimator that can avoid undue influence from outliers. In the LTS estimator, the data are divided (by ranking) into two categories: the normal data and the outliers, and the outlier data are purely discarded. In order to improve the robustness of the LTS, some data with large values, which may contain some useful information, are also thrown away. Instead of purely throwing away those data, the new criterion applies the robust MCC criterion on the large data, and hence can efficiently utilize them to further improve the performance. We apply the HC criterion to adaptive filtering and develop the hybrid affine projection algorithm (HAPA) and kernel hybrid affine projection algorithm (KHAPA). Simulation results show that the proposed algorithms perform very well.

Feature selection techniques play a crucial role in machine learning tasks such as regression and classification. Many filter methods of feature selection are based on the mutual information (e.g. MIFS, MIFS-U, NMIFS, and mRMR methods). In this work, a new mutual information is defined based on the cross survival information potential (CSIP) and Cauchy-Schwartz divergence (CSD), called the survival Cauchy-Schwartz mutual information (SCS-MI). We apply this new mutual information to select an informative subset of features for a SVM classifier. Experimental results illustrate the desirable performance of the new method.