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A novel triple-layer complementary frequency selective surface (FSS) for the mutual coupling reduction of relay antenna arrays is proposed in this paper. The relay antenna arrays include a 2 × 4 antenna array (the backhaul antenna) and a 1 × 2 antenna array (the access antenna). Four sets of triple-layer complementary frequency selective surface and the metal reflector form a cavity for the backhaul antenna. Simulated results show that the port isolation with the same polarization and the cross polarization can be improved at most 2.7 dB and 7.2dB over the frequency band of 2.5—2.7 GHz, respectively. More importantly, the backhaul antenna still keeps good performance with VSWR

This paper presents one fabrication process of a triple-layer stacked TSV interposer for switch matrix consisting of eight RF chips. There are about 600 TSVs in the interposer and the diameter of TSV is 40um with the aspect ratio being 4:1. The whole area of the interposer is 13.5 mm × 7.5mm and the thickness of the triple-layer stacked interposer is only about 0.7mm. After the process, the electrical properties of RDL and TSV on the interposer are tested and the transmission losses of them are only about 0.2dB and 1.39dB at 4GHz, respectively.

In this paper, a Ku-band high-gain transmitarray design using triple-layer perforated FR-4 dielectric material is presented. Square holes in a sub-wavelength dielectric element are utilized to control the effective material properties. Two matching layers are designed by simply changing the hole size. A phase coverage over 360° with low element loss is achieved. A transmitarray with a circular aperture of 360 mm in diameter is designed and analyzed. Full-wave simulation results show a satisfactory performance with a gain of 30.8 dBi and aperture efficiency of 54.1% at 12.5 GHz.

World is talking about connecting everything to the internet. Electric grids are no exception, and are rather one of the first application areas of the proposal. This connection with the internet has raised concerns about the inherent supervisory control and data acquisition (SCADA) systems, whose structure too is adapting with the upcoming needs. The security concerns also include other vulnerabilities, which are not caused due to the internet connectivity, but rather due to some disgruntled employee or social engineering. The paper incorporates the intrusion detection systems (IDSs) created worldwide and proposes an integrated triple layer module. This includes a novel “What-if” module based layer to predict the malicious intent of a command signal. This module is also expected to predict some impending failure of the system. The other two layers include one communication protection layer and one data authentication layer for field devices. We eventually clarify why all the IDS being proposed worldwide shall benefit if these work in tandem amongst themselves and moreover in tandem with the proposed “What-if” module.

This paper presents the performance of three-phase induction motor with a stator winding comprising of a combination of double and triple layer arrangements in slots, here simply referred to as double-triple stator winding layouts. The proposed layout provides a three-phase induction motor with high torque density and greater efficiency than the conventional machine with double winding layout. Field analysis technique is used to show that this winding arrangement has improved harmonic content and the machine performance is computed using Finite Element Method (FEM). Saturation is accounted for in the computation of the inductances. A 1500 W conventional three-phase induction machine with 36 stator slots is first wound as a four-pole double layer and then as a four-pole double-triple layer for the experimental study. Both windings are chorded with one slot with same number of turns per phase and use the same squirrel cage rotor.

Ultra thin HfO 2 /Al 2 O 3 /HfO 2 triple-layer gate dielectrics for advanced MIS capacitors have been characterized electrically. The triple-layer gate stacks after post-metal annealing (PMA) at various temperatures have been studied. Experimental results including leakage current, C-V characteristics, and TDDB are presented in this paper. It has been found that the addition of Al 2 O 3 into HfO 2 increases the crystallization temperature of the gate dielectric, and thus reduces the leakage current. The best overall characteristics were obtained by applying PMA at 600 °C.

The concept of the urban-rural field is one answer to the major planning challenges in megacities (regions from 10,000 to 50,000 km2). In order to shape the urban rural-field a planning method that is called the ‘triple layer planning method’ is applied in the Netherlands. This method is explained in this paper.

Because of the increasing trend towards deeper mining tunnel, the coalminer and the extraction equipment are working under extreme conditions. In case of accident it is very difficult to rescue the coalminer under these extreme conditions. A passive defense system which must be very strong to withstand various extreme conditions was proposed to prevent harm to labor in the mining accident. The spherical shell which can provide enough rigidity and safe space is an oriental solution to design an emergency shelter. In this article the behaviors of hemispherical shell under the impact and compression condition are discussed. Under the consideration of the behavior of spherical shell some optimization method were proposed for increasing the rigidity of the top point of the shell and the type of construction of double or triple layer hemispherical shell structure is proposed.

Effect of Ti alloying during both RTA and LTA on Ni silicide formation is studied. In the RTA annealed samples, Ni3Si2 was found to be the first silicide formed at 600degC and stable up to 900degC. On the other hand, unique triple layer microstructures were found in the sample after single-pulsed LTA at high laser fluence. Ti rapidly segregates from the alloy melt and forms a protective TiOx overlayer on the surface during rapid solidification

Mass-productive 0.5 /spl mu/m embedded FRAM with triple layer metal (one local interconnect and two Aluminum interconnects) has been developed. Fabrication processes are fully compatible with high-end logic LSIs using W-CVD via filling process. Using the high performance PZT capacitor and optimized metallization processes, we achieved high retention reliability even after triple layer metal process.