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The development of high-performance multispectral photodetector with narrowband and tunable spectral sensitivity is of importance but remains highly challenging to date. Here, we have reported on the fabrication of a Si Au/n-type Si/Au photodetector with tunable narrowband sensitivity not only in ultraviolet but also in near-infrared region, which is related to the controlled charge collection narrowing (CCN) mechanism. What is more, the negative response peak of the device can be readily tuned from 365 to 605 nm, and the positive response peak can be modulated from 938 to 970 nm when the bias varies from 0.1 to −0.1 V. In particular, the full-width at half-maximum is as small as 92 and 117 nm when the negative and positive response peaks approach the ultraviolet short wavelength end and near-infrared long wavelength end, respectively. The opposite polarity of the device responses in ultraviolet-visible and near-infrared regions renders the present Si photodetector potentially important in future multiple band optoelectronic systems. [ABSTRACT FROM AUTHOR]

In this work, a wavelength sensor that is capable of quantitatively distinguishing the wavelength in the range of ultraviolet (UV) to near-infrared (NIR) light (265–1050 nm) is presented. The wavelength sensor is fabricated by depositing two parallel Au electrodes on the two sides of a $200 ~\mu \text{m}$ Si wafer. It is found that the as-formed two photodetectors display completely different optical properties. And then, the relationship between the photocurrent ratio of two photodetectors and incident wavelength can be described as a numerical function, through which the wavelength from 265 to 1050 nm can be precisely calculated. The unique operation mechanism of the Si wavelength sensor is unveiled by technology computer-aided design (TCAD) simulation. Remarkably, the wavelength sensor easily distinguishes the light with a wavelength difference of 1 nm, which is much better than previously reported devices based on the vertically stacked structures and charge collection narrowing mechanism. [ABSTRACT FROM AUTHOR]

This paper proposes and develops a new technique based on low temperature conductance method to quantitatively evaluate the trap densities around NiGe/Ge Schottky junction interface and their time constants. It is found that the Schottky barrier height (SBH) in the NiGe/Ge junction is related with these junction traps. Additionally, the traps around junction interface could strongly affect the electrical properties of Ge MOSFETs, especially the OFF-state currents.

Polymeric materials are emerging as an important component for organic electronics due to their combined features of soft materials and organic semiconductor/conductor. Different from solid-state bulk materials, polymers are synthesized and modulated with a facile method, with their controllable properties. Therefore, polymers have been recently used in Schottky junction devices that demonstrate features of enhanced performances, flexibility, and easy processing. Polymer-based Schottky junctions have drawn a lot of interest in several prototype applications like photodetectors, energy harvesters, and gas sensors. With this review, we summarize recent progress in synthesis and modulation of polymers and fabrication of polymer-based Schottky junction devices. Designs of applications of sensory devices like photodetectors, energy harvesters, and gas sensors are also presented.

Integrated field emission electron sources with low driving voltage are desired for micro/nano vacuum electronics. Herein, we demonstrate the enhanced and stable electron emission from crystalline gold–silver (Au–Ag) alloy nanoparticle capped Si nanowires (SiNWs) and the achieved gated electron sources with low driving voltage (<50 V). Thermally induced self-assembly hemispherical (50–80 nm) crystalline Au–Ag nanoparticles were prepared and used as masks in plasma etching to form vertically aligned high aspect ratio (~14) SiNWs. The nanoparticles were preserved after the etching, forming in situ integrated Au–Ag/Si junctions with each individual SiNWs. The SiNWs with capped nanoparticles possess superior field emission current density (45.80 mA/cm2) and current stability (fluctuation ~6%). A self-aligned process was developed to fabricate gated field emission devices, using the Au–Ag nanoparticle capped SiNWs as cathode. The gated devices showed field emission at low gate voltage (69.52-μA/cm2 at 42.1 V). Experimental and numerical simulation studies demonstrated the Au–Ag/Si contact behaved as space-charge-limited (SCL) Schottky conduction. The idea behind the enhancing and stable emission is that the SCL–Schottky junction undergoes a process of negative feedback and thus suppressed the current and shot-noise from the outstanding SiNWs. Accordingly, more SiNWs were activated and contributed stable and higher field emission current. [ABSTRACT FROM AUTHOR]

Silicon nanowire (SiNW) field-effect transistors (SiNWFETs) are of great potential as a high-sensitivity charge sensor. The signal-to-noise ratio (SNR) of an SiNWFET sensor is ultimately limited by the intrinsic device noise generated by carrier trapping/detrapping processes at the gate oxide/silicon interface. This carrier trapping/detrapping-induced noise can be significantly reduced by replacing the noisy oxide/silicon interface with a Schottky junction gate (SJG) on the top of the SiNW. In this paper, we present a tri-SJG SiNWFET (Tri-SJGFET) with the SJG formed on both the top surface and the two sidewalls of the SiNW so as to enhance the gate control over the SiNW channel. Both experiment and simulation confirm that the additional sidewall gates in a narrow Tri-SJGFET indeed can confine the conduction path within the bulk of the SiNW channel away from the interfaces and significantly improve the immunity to the traps at the bottom buried oxide/silicon interface. Therefore, the optimal low-frequency noise performance can be achieved without the need for any substrate bias. This new gating structure holds promises for further development of robust SiNWFET-based charge sensors with low noise and low operation voltage. [ABSTRACT FROM AUTHOR]

Lead iodide (PbI2) single crystals have been extensively investigated due to their potential applications in nuclear radiation detectors at room temperature. In this letter, the properties of ultrathin PbI2 single crystals were obtained and investigated by X-ray diffraction, ultraviolet-visible diffuse reflection spectroscopy, and field emission scanning electron microscopy. The X-ray photodetector based on ultrathin PbI2 single crystal with a Schottky configuration of Au/PbI2/Mo was also fabricated through a facile method. Especially, the X-ray photodetector exhibits good stability and reproducibility. A large sensitivity of ${0}.{12} \times {10}^{{4}} \mu \text{C}$ /Gyair/cm2 was obtained for X-ray photodetector based on PbI2 single crystal at zero bias under a low radiation dose rate (0.19 mGy/h), which is sixty times higher than that of currently $\alpha $ -Se X-ray detectors at high bias. Moreover, we have further illustrated the working principles of the photodetector at zero, positive and negative bias with and without X-ray illumination. Our investigation substantiates the potential of the self-powered X-ray photodetector based on ultrathin PbI2 single crystal as a candidate device in optoelectronic applications. [ABSTRACT FROM AUTHOR]

For some applications, the CMOS ICs need to be supplied with positive and negative voltage sources for the desired circuit operations. To supply the negative voltage source for circuit operations in the silicon chip with the common p-type substrate grounded, the isolation rings configured with n-well (NW) and deep n-well (DNW) layers must be used to isolate the circuits of nMOS devices operating with negative voltage from the common P-substrate. Such NW/DNW isolation rings in the circuit layouts are often connected to ground (GND =0V) for the circuit operations with negative voltage source. But, a parasitic p-n-p-n path from I/O pMOS to this grounded NW/DNW isolation ring may cause the circuits at high risk to latch-up. In this letter, a novel method to improve latch-up immunity against such parasitic p-n-p-n path by using a Schottky junction is reported. [ABSTRACT FROM AUTHOR]

Mixed-dimensional graphene/single CdSe nanobelt (NB) Schottky junctions are fabricated, and the influence of Schottky barrier inhomogeneity on the electrical transport mechanism is investigated. The ideality factor increases and the zero-bias Schottky barrier height (SBH) decreases monotonically, as temperature decreases from 300 to 80 K. The temperature-dependent electrical transport characteristics can be explained by the SBH inhomogeneity. We use a spatial potential fluctuation model to analyze the conduction mechanism, where the SBH with a Gaussian distribution is assumed. The standard deviations of SBH distribution are up to 13.06% and 14.09% of the mean value of zero-bias SBH in 80–140 and 140–300 K, respectively, implying strong SBH inhomogeneity in typical graphene/CdSe NB junctions. [ABSTRACT FROM AUTHOR]

This letter represents the first direct experimental demonstrations and mechanism proposal regarding abnormal palladium diffusion into germanium (Ge). Our experiments indicated that excess Ge atoms among palladium germanide alloy formation indirectly induce the abnormal out-diffusion of mass palladium atoms into Ge. Consequently, palladium germanide alloy on both n-type and p-type Ge form ohmic-like Schottky junctions. To identify this phenomenon, first-principle calculations and technology computer-aided design simulation were used to evaluate the electrical influence of palladium atoms in Ge. We discovered that the activated palladium atoms in Ge induce large midgap bulk-trap states, which contribute to a severe increment of trap-assisted tunneling current at the palladium germanide/Ge junction. [ABSTRACT FROM AUTHOR]

In this letter, we propose a novel structure of an n-channel silicon-on-insulator junctionless transistor (SOI-JLT) with improved I \mathrm{\scriptscriptstyle ON}/I \mathrm{\scriptscriptstyle OFF} ratio and scalability. A buried metal layer (BML) of appropriate workfunction ( \phi \text {BM} ) is used to create a Schottky junction at the bottom of Si device layer, whereas the source–channel–drain path is junctionless and hence named the buried-metal-SOI-lateral JLT (BM-SOI-LJLT). The BML-induced bottom depletion layer combined with the depletion region due to top gate results in a perfect volume depletion in OFF state. A 2-D calibrated simulation has shown an I \mathrm{\scriptscriptstyle ON}/I \mathrm{\scriptscriptstyle OFF} ratio of ~108 in BM-SOI-LJLT compared to ~2 in the conventional SOI-JLT at \phi \text {BM} of 5.1 eV and a gate length of 20 nm. Furthermore, the lateral band-to-band tunneling parasitic leakage is significantly lower in the BM-SOI-LJLT and does not degrade its I \mathrm{\scriptscriptstyle ON}/I \mathrm{\scriptscriptstyle OFF} ratio. Furthermore, high vertical field due to the Schottky junction minimizes the lateral coupling between the source and drain field lines and thus improves the short-channel-effect suppression and scalability of the proposed device. [ABSTRACT FROM PUBLISHER]

In this paper, we investigate the origin of the nonideal turn- ON characteristics of the graphene-silicon Schottky junction. Native oxide (SiO2) is proved to play a critical role in determining the behavior of a graphene-Si junction. Within the metal–oxide–semiconductor structure, the effective voltage drop across the junction degrades due to the capacitor network, which contributes to an increased ideality factor. Residual metal catalysts are detected, which act as recombination centers in the silicon and further degrade the ideality factor by enhancing the recombination current. The recombination current is found to be the dominant factor in making the junction nonideal. Forming gas annealing and the insertion of an interfacial dielectric restore the ideality of a graphene-Si junction by reducing the interface states and bulk recombination centers. [ABSTRACT FROM AUTHOR]

Graphene–silicon vertical junction is utilized here for fabrication of high-responsivity and broadband phototransistor. Graphene–silicon as a Schottky junction plays the role of collector–base junction in a bipolar junction phototransistor. We propose graphene–silicon-based phototransistor as a promising candidate for fabrication of high-gain photodetector with responsivity as high as 11 A/W. Gain and ON/OFF ratio of our fabricated device reach up to 18 and 100, respectively. Our results show that the graphene–silicon-based phototransistor is sensitive to a broad range of incident light from visible to IR spectrum. Our results open up a way to fabricate highly sensitive photodetectors suitable for silicon integrated electronics. [ABSTRACT FROM PUBLISHER]

In this paper, we demonstrated the enhancement of thermal stability of nickel germanide (NiGe) alloy up to 600 °C by using titanium nitride (TiN) metal capping. A high I \mathrm{\scriptscriptstyle ON}/I \mathrm{\scriptscriptstyle OFF} ratio of 2.9 \times 10^5 was achieved by capping TiN metal on Ni for NiGe alloy formation at 600 °C. Detailed analyses were performed for realizing the mechanism for TiN capping on NiGe/Ge, including vertical element diffusion profile observation through depth-profiling X-ray photoelectron spectroscopy (XPS), element diffusion distribution by energy-dispersive X-ray spectroscopy mapping, and direct junction leakage current path detection by conductive atomic force microscopy. The experimental results indicated that TiN capping can reduce the risk of agglomeration and form a graded NiGe/Ge Schottky junction that is beneficial for suppressing the degradation of junction leakage. Subsequently, we compared the electrical performance of TiN/NiGe/n-Ge at various N/Ti ratios of TiNs. Based on the depth-profiling XPS results and electrical performance, TiN with an N/Ti ratio of approximately 1:1 can resist the Ni and Ge diffusion, which facilitates the suppression of the agglomeration process. However, the TiN capping layers with an N/Ti ratio of less than approximately 1:1 (Ti-rich) were not favorable for resisting Ni and Ge diffusion. [ABSTRACT FROM PUBLISHER]

In this letter, we investigate electrical properties of the indium–tin oxide (ITO)-on-Si Schottky junctions and the effect of a low temperature annealing on the properties. The ITO films are deposited by RF magnetron sputtering on n-type and p-type crystalline Si wafers. By measuring current–voltage and capacitance–voltage characteristics, it is found that a layer of positive fixed charge is formed at the interface between the ITO and the Si by sputtering damage and that the charge layer distorts the barrier height of the ITO-on-Si junction. The low temperature annealing makes the ITO on p- and n-Si junctions ohmic-like and rectifying, respectively, by changing the barrier height. [ABSTRACT FROM PUBLISHER]

Silicon metal–semiconductor FETs (MESFETs) have been fabricated using a 32-nm silicon-on-insulator (SOI) CMOS technology. The MESFET gates are formed during the self-aligned silicide step and show almost ideal Schottky behavior at low drain voltages. However, an anomalous peak in the reverse gate leakage current appears for drain voltages ≥2 V. The anomalous gate current is attributed to impact ionization generating excess holes that exit the channel through the Schottky contact. An analytical model is used to extract the electron impact ionization rate, $\alpha $ , which agrees with three earlier data sets over nearly four orders of magnitude. [ABSTRACT FROM PUBLISHER]

In this letter, a novel photodetector based on graphene–PbSe van der Waals heterostructure for near-infrared detection is demonstrated. Generation and transportation of photocarriers are conducted in the PbSe photosensitive layer and graphene channel, respectively. The proposed structure is benefiting from the premium photoactivity of PbSe and high mobility of graphene with fast response time. Remarkable photoresponse was thus achieved. Photoresponse of the device can be controlled through the modulation on bias state of grapheme–PbSe Schottky heterojunction. The peak gain, responsivity, and detectivity are 7824, 6613 A/W, and $1.16\times 10^{12}$ Jones, respectively. With a response time at millisecond level, fast response speed is also achieved in this structure. [ABSTRACT FROM AUTHOR]

Modeling and simulation of graphene-gated graphene-GaAs Schottky junction field-effect solar cell is performed using in-house developed algorithm based on finite-difference method, where Poisson and drift-diffusion equations are solved in an appropriate way. Our algorithm is verified by comparing the simulated J – V curve of solar cell with the previous experimental one. The carrier generation rate is calculated with light multireflection in the solar cell excluded, due to large optical absorption coefficient of GaAs, and the radiative recombination in GaAs leads to \sim 5 % light generated carrier loss. The charge transfer effect in graphene is investigated, which can affect open circuit voltage, and in particular for the semiconductor substrate with very low hole mobility. It is further numerically demonstrated that: 1) both open circuit voltage and short circuit current J_{\textrm {SC}} of the solar cell are governed by doping concentration through affecting Schottky barrier height and depletion width; 2) the value of V_{\textrm {OC}}$ can be effectively adjusted by decreasing the thickness of gate oxide; however, it may result in oxide breakdown or reliability problem; and 3) there is tunability inertia for V_{\textrm {OC}} with multilayer junction graphene implemented, but it can provide low series resistance. [ABSTRACT FROM AUTHOR]

A self-powered metal–semiconductor Schottky diode with planar interdigital Au–Ti electrodes was fabricated and characterized for the detection of near-infrared light. The devices showed a significant increase in external quantum efficiency (EQE) and photoresponse at zero bias as electrode spacing reduces. A device with an electrode spacing of 5~\mu \textm exhibits EQE of 1% equivalent to responsivity of 6.45 mA/W at a wavelength of 800 nm and 0 V bias. Furthermore, the photocurrent to dark current ratio was 5\times 10^4 with a detectivity of 1.4\times 10^11 cm.Hz ^0.5 /W at 0 V bias. The recovery time constant was calculated from time-resolved photocurrent curve and found to be 0.19 s. The built-in electric field of the device was estimated to be on the order of 35 V/cm. [ABSTRACT FROM PUBLISHER]

We present a novel method for the extraction of the relevant electrical and physical parameters of Schottky diodes realized on polycrystalline thin films. The proposed approach relies on a limited set of current–voltage characteristics measured at different temperatures and does not require the previous knowledge of any semiconductor parameter. The procedure provides satisfactory results in terms of relative errors even in the case of nonideal characteristics, including a very large series resistance and strong temperature and bias dependence of both barrier and ideality factor. We tested the approach on both simulated devices and real Cr–poly-Si Schottky diodes. [ABSTRACT FROM AUTHOR]

We have investigated interfacial crystal structures and non-local spin signals \Delta R of Co2FeAl0.5Si0.5 (CFAS)/n-GaAs junctions. Cross-sectional transmission electron microscopy observations indicated that with the exception of Ga diffusion into CFAS of the sample deposited at 400 °C, the interfacial structure of the junctions and defect density at the interface were not very different for different CFAS fabrication temperatures of the substrate ( T_{\mathrm {CFAS}}) . The obtained reflection high-energy electron diffraction patterns showed that all samples fabricated at T_{\mathrm {CFAS}} varying from room temperature to 400 °C exhibited the L21 ordered structure in the vicinity of CFAS/n-GaAs junctions. It is found that the junctions with larger rectifying characteristic as indicated by the conduction ratio G(0.5~ \text V)/G(-0.5~ \text V) show larger spin signal \Delta R . This may strongly affect the spin injection/detection efficiency. [ABSTRACT FROM AUTHOR]

In this investigation, a novel selective gas sensor for detection of H2S gas is proposed based on graphene/n-Si Schottky junction. The sensor's structure is based on a Schottky junction fabricated by mechanical deposition of highly oriented natural graphite on top of an n-type <;100> silicon substrate. The variation in the forward bias current-voltage characteristics of the diode for different gas concentrations and different temperatures are indications of the gas sensing capability of the proposed sensor. The fabricated graphene-based gas sensor shows good selectivity, reproducibility, and fast response. Considering electrochemical impedance spectroscopy, the sensitivity variation of the sensor in a specific range of frequencies is different for each gas ambient. The response time of about 20 s under the applied voltage of 1 V and 100 ppm of H2S gas ambient is obtained and becomes shorter as the temperature increases. Because of the special structure of the graphene, adsorption, and desorption of the gas occurs fast. Therefore, graphene-based Schottky diodes seem suitable for gas sensing applications. [ABSTRACT FROM PUBLISHER]

ZnO nanowire (NW) UV photodetectors (PDs) have high sensitivity, while their long recovery time is an important limitation for practical applications. We demonstrated that the recovery time of nanostructured ZnO PDs can be significantly improved using the nanobelt (NB) network. The NB-network PDs are fabricated by only one step without tedious and costly lithography processes. As compared with a recovery time of 32.95 s in the single NB-based PD, a fast recovery time of 0.53 s observed in the NB-network PDs is achieved due to the existence of the NB–NB junction barriers. As the junction barriers accounting for the poor conductivity of NB networks hinder the electron transport, the dark current of the NB-network PDs is two orders of magnitude lower than that of the single NB-based PDs. The NB networks can be applicable to the building structures for nanostructured ZnO-based light-sensing applications with wafer-scale uniformity without compromising the unique photodetection properties exclusively provided by high surface-to-volume ratio and reduced dimensionality of an individual NW/NB. [ABSTRACT FROM PUBLISHER]

Amorphous Si (a-Si) rear Schottky junction solar cells with a LiF/Al back electrode are proposed as an alternative prototype for high-efficiency thin-film photovoltaics. This device is free from absorption losses occurring at the rear n-type a-Si layer, and thus, overall power conversion efficiency was improved by 13% compared with a conventional p-i-n type solar cell. An ultrathin LiF layer between the absorber and the rear electrode reduces shunt leakage, as well as series resistance; this, in turn, suppresses degradation of the open-circuit voltage and the fill factor while enhancing photocarrier collection in the long-wavelength regime. [ABSTRACT FROM PUBLISHER]

Metal–semiconductor field-effect transistors (MESFETs) have been fabricated using a 150-nm partially depleted silicon-on-insulator complementary metal–oxide–semiconductor (CMOS) technology. Minimum gate lengths of 150 nm have been achieved, which represents a significant reduction compared with an earlier demonstration using a 350-nm CMOS technology. The scaled MESFETs with Lg = \150\ \nm have a current drive that exceeds 200 mA/mm with a peak fT > \35\ \GHz. This is considerably higher than the Lg = \400\ \nm MESFET with a current drive of \sim70 mA/mm and a peak fT = \10.6\ \GHz, which was possible with the earlier generation. However, short-channel effects become significant for Lg <\break \400\ \nm, resulting in an optimum MESFET gate length for this technology in the range of 200–300 nm. [ABSTRACT FROM PUBLISHER]

Commercial metal-semiconductor-field-effect transistors (MESFET's) have opaque gate. We present here the frequency-dependent characteristics of an ion-implanted GaAs MESFET with opaque gate under illumination. The incident light enters the device through the gate-source and gate-drain spacings. Two photovoltages are developed: one across the Schottky junction due to generation in the side walls of the depletion layer below the gate and the other across the channel-substrate junction due to generation in the channel-substrate depletion region. The frequency dependence of the two photovoltages along with channel charge, drain-source current, transconductance and channel conductance of the device have been studied analytically and compared with the published theoretical results. For the first time, a commercially available GaAs optically illuminated field-effect transistor (OPFET) has been analyzed for frequency dependent characteristics instead of the transparent/semitransparent gate OPFET [ABSTRACT FROM PUBLISHER]

Mechanical stress is an efficient but rather unexplored performance booster for diverse emerging research devices based on tunneling phenomena, such as tunnel field-effect transistors (TFETs), resonant TFETs, and reconfigurable FETs. In this letter, stress profiles formed by self-limited oxidation of intrinsic silicon nanowires are applied exemplarily on device simulations of reconfigurable silicon nanowire transistor based on two independently gated Schottky junctions. The deformation potential theory and the multi-valley band structure are applied for modeling of stress-dependent Schottky barriers. Strained n- and p-type transistors are analyzed with respect to transfer the characteristic and the influence of each strain direction. It has been verified that mechanical stress is an effective option to control current injection through the Schottky junctions and thus to achieve symmetric performance of reconfigurable nanowire devices. [ABSTRACT FROM PUBLISHER]

Surface plasmon polaritons (SPPs) originate from resonance coupling between surface-bound electrons and photons on interfaces with specific material properties. Unfortunately, owing to the existence of SPPs on an interface, its reach is plagued by intrinsic dissipative losses in the materials making up the interface, severely restricting the application domain. One way to reduce the propagation losses is to use distributed electrical injection across the interface to create a population inversion to provide energy to the decaying SPP wave. A promising technique is to use a Schottky junction formed between a semiconductor and a metal because such an interface can sustain a population inversion under electrical injection. We previously analyzed the plasmonic dispersion relation for such a device when biased. Here, we extend that analysis to consider the influence of the inversion layer when minority carriers are injected from an external electrical source. In particular, we derive analytical expressions for the loss reduction and associated gain spectrum broadening, taking into account the doping concentration in the semiconductor and the externally applied voltage across the junction. Our analysis gives vital information for the design and utilization of Schottky junction interfaces as active waveguides for routing SPPs in integrated circuitry.

Silicon-on-insulator (SOI) metal-semiconductor field-effect transistors (MESFETs) with complementary n- and p-type channels have been fabricated using a commercial 45-nm CMOS process. The current drive and transconductance of the n-MESFET is approximately three times larger than that of the p-MESFET due to the higher electron mobility. Both devices operate in depletion mode with the threshold voltage of the n-MESFET being approximately −0.4 V, while that of the p-MESFET is $\sim 0.3$ V. The MESFETs have multiple gigahertz cutoff frequencies and can withstand drain bias in excess of 4 V making them attractive for analog- and mixed-signal applications that require higher operating voltages than the baseline CMOS. The p-MESFET has higher leakage current due to the lower Schottky barrier height to the p-type channel. [ABSTRACT FROM PUBLISHER]

Schottky junction near-infrared photodetectors were constructed by combing monolayer graphene (MLG) film and bulk silicon. Notably, the device could operate at zero external voltage bias because of the strong photovoltaic behavior of the MLG/Si Schottky junction, giving rise to high responsivity and detectivity of 29 mAW^-1 and 3.9\times 10^11~cmHz^1/2W^-1, respectively, at room temperature. Time response measurement revealed a high response speed of 100 \mus, which allowed the device following a fast varied light with frequency up to 2100 Hz. In addition, the device showed great potential for low light detection with intensity <1~nWcm^-2 at 10 K. [ABSTRACT FROM AUTHOR]

Ultrathin channel metal-semiconductor field-effect-transistors (MESFETs) have been fabricated using fully depleted silicon-on-insulator CMOS foundries with no changes to the process flow. The Schottky gate of the MESFET is formed from a metal silicide that consumes most of the thin (<50 nm) FDSOI channel and fully depletes the remaining underlying silicon. Therefore, unlike partially depleted SOI MESFETs with a thicker silicon layer (~200 nm), the conducting channel of the FD-SOI MESFET cannot be formed directly under the Schottky gate. Instead, current flow in the FD-SOI MESFET is confined between islands of silicide that deplete the conducting channel in a lateral direction. The FD-SOI MESFETs operate as depletion mode devices with a threshold voltage that can be adjusted by varying the separation between the silicide islands. Both n- and p-channel devices can be realized using the same gate material on a common FD-SOI substrate. [ABSTRACT FROM AUTHOR]