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Your search keyword '"Renren He"' showing total 13 results

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13 results on '"Renren He"'

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1. Comprehensive Reliability Study of STT-MRAM Devices and Chips for Last Level Cache Applications (LLC) at 0x Nodes

2. STT-MRAM devices with low damping and moment optimized for LLC applications at Ox nodes

3. Demonstration of Ultra-Low Voltage and Ultra Low Power STT-MRAM designed for compatibility with 0x node embedded LLC applications

4. Probing magnetic properties of STT-MRAM devices down to sub-20 nm using spin-torque FMR

5. STT-MRAM for embedded memory applications from eNVM to last level cache

6. Development of STT-MRAM for embedded memory applications

7. Spin Transfer Torque driven dynamics of the synthetic antiferromagnetic reference layer of perpendicular MRAM devices

8. High perpendicular anisotropy in sub-30 nm MRAM devices measured by spin-torque ferromagnetic resonance

9. Achieving Sub-ns switching of STT-MRAM for future embedded LLC applications through improvement of nucleation and propagation switching mechanisms

10. Solving the paradox of the inconsistent size dependence of thermal stability at device and chip-level in perpendicular STT-MRAM

11. Demonstration of an MgO based anti-fuse OTP design integrated with a fully functional STT-MRAM at the Mbit level

12. Perpendicular STT-MRAM for high speed non-volatile embedded memory application

13. Demonstration of fully functional 8Mb perpendicular STT-MRAM chips with sub-5ns writing for non-volatile embedded memories

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