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32 results on '"Mu, Hui"'

2. CEAM: A Novel Approach Using Cycle Embeddings with Attention Mechanism for Stock Price Prediction

Author

Mu-Hui Yu and Jheng-Long Wu

Subjects
business.industry, Computer science, 020209 energy, Deep learning, 02 engineering and technology, Machine learning, computer.software_genre, 01 natural sciences, Stock price, 010104 statistics & probability, Market research, Recurrent neural network, 0202 electrical engineering, electronic engineering, information engineering, Stock market, Artificial intelligence, 0101 mathematics, Time series, business, computer, Stock (geology), Decoding methods
Abstract

This paper presents a novel deep learning approach for the stock price prediction using a cycle embeddings with attention mechanism (CEAM) applying on Dual-Stage Attention-Based RNN (DA-RNN) model. The cycle characteristic is an important factor in time series prediction problem since it affects the trend of stock price. Thus, an effective cycle information can improve the prediction performance of stock price. In past years, many researches use the cycle feature with other features together as equally important, which might dilute the weight of cycle information since the cycle information should be paid more attention when making prediction on periodic data. As the result, we use CEAM making prediction with cycle information hidden in periodic data. The deep learning-based method has been developed in many fields and is a powerful prediction system. In addition, many researches use the embeddings feature and the attention mechanism to improve the prediction performance. In this paper, we propose a novel approach to capture the cycle information and use it to predict stock prices in U.S. stock market. The cycle information can be formed as a distributed vector as embeddings, called cycle embeddings. The CEAM approach use cycle embeddings to pay attention on periodically historical time series data by learning the cycle semantic relations between cycle characteristics and historical stock prices to optimize the prediction model. Therefore, the CEAM approach can improve the prediction performance for stock price. The experiments in this paper show that our proposed CEAM approach outperforms the another model which combines cycle feature with other features together as equally important.

Published
2019

11. A 20nm 1.8V 8Gb PRAM with 40MB/s program bandwidth

Author

Jun-Ho Shin, Su-Jin Ahn, Yeong-Taek Lee, Han-Sung Joo, Jung Sunwoo, Jei-Hwan Yoo, Hoe-ju Chung, Yong-Jin Kwon, Jaehwan Kim, Beakhyoung Cho, Jae-Wook Lee, Chang-Soo Lee, Yong-Jun Lee, Mu-Hui Park, Gitae Jeong, Sang-Hoan Chang, Jin-Young Kim, Soehee Kim, Mingu Kang, Duckmin Kwon, Young-Hoon Oh, Kwang-Jin Lee, Qi Wang, Young-don Choi, Yoohwan Rho, Jae-Yun Lee, Ickhyun Song, Hideki Horii, Sooho Cha, and Ki-Sung Kim

Subjects
Random access memory, Computer science, Low-power electronics, Bandwidth (computing), Parallel random-access machine, Parallel computing, Chip
Abstract

Phase-change random access memory (PRAM) is considered as one of the most promising candidates for future memories because of its good scalability and cost-effectiveness [1]. Besides implementations with standard interfaces like NOR flash or LPDDR2-NVM, application-oriented approaches using PRAM as main-memory or storage-class memory have been researched [2–3]. These studies suggest that noticeable merits can be achieved by using PRAM in improving power consumption, system cost, etc. However, relatively low chip density and insufficient write bandwidth of PRAMs are obstacles to better system performance. In this paper, we present an 8Gb PRAM with 40MB/s write bandwidth featuring 8Mb sub-array core architecture with 20nm diode-switched PRAM cells [4]. When an external high voltage is applied, the write bandwidth can be extended as high as 133MB/s.

Published
2012

12. A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW

Author

Sung-Hoon Kim, Yong-Jun Lee, Byung-Hoon Jeong, Sang-Tae Kim, Jung Sunwoo, HoGeun Cho, Jin-Young Kim, Sunghyun Jun, Inchul Shin, Hoe-ju Chung, Woo-Yeong Cho, Jae-Wook Lee, Woochul Jun, Jun-Ho Shin, Joon-Min Park, Chang-han Choi, Qi Wang, Young-don Choi, Young-Hyun Jun, Ki-whan Song, Byung-Jun Min, KiSeung Kim, Jei-Hwan Yoo, Mu-Hui Park, Yoohwan Rho, Won-Ryul Chung, Seok-Won Hwang, Sang-whan Chang, Ickhyun Song, Ki-won Lim, Beak-Hyung Cho, Kwang-Jin Lee, Sooho Cha, Jaewhan Kim, and Duk-Min Kwon

Subjects
Non-volatile memory, Random access memory, Hardware_MEMORYSTRUCTURES, Computer science, Low-power electronics, Scalability, Parallel computing, Flash memory
Abstract

In mobile systems, the demand for the energy saving continues to require a low power memory sub-system. During the last decade, the floating-gate flash memory has been an indispensable low power memory solution. However, NOR flash memory has begun to show difficulties in scaling due to the device's reliability and yield issues. Over the past few years, phase-change random access memory (PRAM) has emerged as an alternative non-volatile memory (NVM) owing to its promising scalability and low cost process [1,2]. In this paper, a PRAM, implemented in a 58nm PRAM process with a low power double-data-rate nonvolatile memory (LPDDR2-N) interface, is presented [3].

Published
2011

14. A real-time portable analyzer for anger emotion

Author

Feng-Shuo Shang, Mu-Hui Sun, Ai-Chih Lin, Shih-Tsang Tang, Jiun-Hung Lin, and Fan-Yun Yen

Subjects
media_common.quotation_subject, Life quality, Anger, behavioral disciplines and activities, mental disorders, behavior and behavior mechanisms, Heart rate variability, Personal health, Spectral analysis, Emotion recognition, Psychology, psychological phenomena and processes, Simulation, media_common, Cognitive psychology
Abstract

Anger is a normal, healthy emotion. But when anger gets out of control, it can cause problems in daily life. Anger status can be determined basing on the HRV spectrum, which reflects the interaction of sympathetic and parasympathetic nervous systems. This study developed a portable system for real-time reflecting the user's anger status, which would facilitate the conscious of anger. Moreover help to control the anger release, which would further effectively improve the personal health and life quality.

Published
2010

15. A 90nm 1.8V 512Mb Diode-Switch PRAM with 266MB/s Read Throughput

Author

Woo-Yeong Cho, Qi Wang, Kinam Kim, Chang-han Choi, Du-Eung Kim, Hongsik Jeong, Yu-Hwan Ro, Joon-Min Park, Byung-Gil Choi, Hye-Jin Kim, Won-Ryul Chung, Ho-Keun Cho, Young-Ran Kim, Beak-Hyung Cho, Ki-Sung Kim, Joon-Yong Choi, Sang-beom Kang, In-Cheol Shin, Kwang-Jin Lee, Ki-won Lim, Mu-Hui Park, Choong-keun Kwak, Chang-Hyun Kim, Kwang-Suk Yu, Chang-Soo Lee, Gitae Jeong, and Hyung-Rok Oh

Subjects
CMOS, business.industry, Computer science, Core (graph theory), Hardware_INTEGRATEDCIRCUITS, Hardware_PERFORMANCEANDRELIABILITY, business, Throughput (business), Computer hardware, Hardware_LOGICDESIGN, Diode
Abstract

A 512Mb diode-switch PRAM is developed in a 90nm CMOS technology. A core configuration, read/write circuit techniques, and a charge-pump system for the diode-switch PRAM are described. Through these schemes, the PRAM achieves read throughput of 266MB/S and maximum write throughput of 4.64MB/S with a 1.8V supply.

Published
2007

16. A 0.1/spl mu/m 1.8V 256Mb 66MHz Synchronous Burst PRAM

Author

Qi Wang, Ki-Sung Kim, Choong-Ryeol Hwang, Choong-Duk Ha, Chang-Soo Lee, Kwang-Jin Lee, Mu-Hui Park, Hye-Jin Kim, Du-Eung Kim, Choong-keun Kwak, Kang-Sik Cho, Su-Yeon Kim, Byung-Gil Choi, Sang-beom Kang, Yun Sueng Shin, Hyung-rock Oh, Woo-Yeong Cho, Yu-Hwan Ro, Young-Ran Kim, Beak-Hyung Cho, and Hyun-Geun Byun

Subjects
business.industry, Computer science, Parallel computing, business, Throughput (business), Computer hardware, Access time
Abstract

A 256Mb PRAM featuring synchronous burst read operation is developed. Using a charge-pump system, write performance is characterized at 1.8V supply. Measured initial read access time and burst-read access time are 62ns and 10ns, respectively. The maximum write throughput is 3.3MB/S

Published
2006

17. A 20nm 1.8V 8Gb PRAM with 40MB/s program bandwidth

Author

Choi, Youngdon, primary, Song, Ickhyun, additional, Park, Mu-Hui, additional, Chung, Hoeju, additional, Chang, Sanghoan, additional, Cho, Beakhyoung, additional, Kim, Jinyoung, additional, Oh, Younghoon, additional, Kwon, Duckmin, additional, Sunwoo, Jung, additional, Shin, Junho, additional, Rho, Yoohwan, additional, Lee, Changsoo, additional, Kang, Min Gu, additional, Lee, Jaeyun, additional, Kwon, Yongjin, additional, Kim, Soehee, additional, Kim, Jaehwan, additional, Lee, Yong-Jun, additional, Wang, Qi, additional, Cha, Sooho, additional, Ahn, Sujin, additional, Horii, Hideki, additional, Lee, Jaewook, additional, Kim, Kisung, additional, Joo, Hansung, additional, Lee, Kwangjin, additional, Lee, Yeong-Taek, additional, Yoo, Jeihwan, additional, and Jeong, Gitae, additional

Published
2012
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18. A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW

Author

Chung, Hoeju, primary, Jeong, Byung Hoon, additional, Min, ByungJun, additional, Choi, Youngdon, additional, Cho, Beak-Hyung, additional, Shin, Junho, additional, Kim, Jinyoung, additional, Sunwoo, Jung, additional, Park, Joon-min, additional, Wang, Qi, additional, Lee, Yong-jun, additional, Cha, Sooho, additional, Kwon, Dukmin, additional, Kim, Sangtae, additional, Kim, Sunghoon, additional, Rho, Yoohwan, additional, Park, Mu-Hui, additional, Kim, Jaewhan, additional, Song, Ickhyun, additional, Jun, Sunghyun, additional, Lee, Jaewook, additional, Kim, KiSeung, additional, Lim, Ki-won, additional, Chung, Won-ryul, additional, Choi, ChangHan, additional, Cho, HoGeun, additional, Shin, Inchul, additional, Jun, Woochul, additional, Hwang, Seokwon, additional, Song, Ki-Whan, additional, Lee, KwangJin, additional, Chang, Sang-whan, additional, Cho, Woo-Yeong, additional, Yoo, Jei-Hwan, additional, and Jun, Young-Hyun, additional

Published
2011
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21. A 90nm 1.8V 512Mb Diode-Switch PRAM with 266MB/s Read Throughput

Author

Lee, Kwang-Jin, primary, Cho, Beak-Hyung, additional, Cho, Woo-Yeong, additional, Kang, Sangbeom, additional, Choi, Byung-Gil, additional, Oh, Hyung-Rok, additional, Lee, Chang-Soo, additional, Kim, Hye-Jin, additional, Park, Joon-Min, additional, Wang, Qi, additional, Park, Mu-Hui, additional, Ro, Yu-Hwan, additional, Choi, Joon-Yong, additional, Kim, Ki-Sung, additional, Kim, Young-Ran, additional, Shin, In-Cheol, additional, Lim, Ki-Won, additional, Cho, Ho-Keun, additional, Choi, Chang-Han, additional, Chung, Won-Ryul, additional, Kim, Du-Eung, additional, Yu, Kwang-Suk, additional, Jeong, Gi-Tae, additional, Jeong, Hong-Sik, additional, Kwak, Choong-Keun, additional, Kim, Chang-Hyun, additional, and Kim, Kinam, additional

Published
2007
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28. A 0.1/spl mu/m 1.8V 256Mb 66MHz Synchronous Burst PRAM.

Author

Sangbeom Kang, WooYeong Cho, Beak-Hyung Cho, Kwang-Jin Lee, Chang-Soo Lee, Hyung-Rock Oh, Byung-Gil Choi, Qi Wang, Hye-Jin Kim, Mu-Hui Park, Yu-Hwan Ro, Suyeon Kim, Du-Eung Kim, Kang-Sik Cho, Choong-Duk Ha, Youngran Kim, Ki-Sung Kim, Choong-Ryeol Hwang, Choong-Keun Kwak, and Hyun-Geun Byun

Published
2006
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29. A 90 nm 1.8 V 512 Mb Diode-Switch PRAM With 266 MB/s Read Throughput.

Author

Kwang-Jin Lee, Beak-Hyung Cho, Woo-Yeong Cho, Sangbeom Kang, Byung-Gil Choi, Hyung-Rok Oh, Chang-Soo Lee, Hye-Jin Kim, Joon-Min Park, Qi Wang, Mu-Hui Park, Yu-Hwan Ro, Joon-Yong Choi, Ki-Sung Kim, Young-Ran Kim, In-Cheol Shin, Ki-Won Lim, Ho-Keun Cho, Chang-Han Choi, and Won-Ryul Chung

Subjects
COMPLEMENTARY metal oxide semiconductors, DIODES, DIGITAL electronics, LOGIC circuits, SEMICONDUCTOR diodes, SEMICONDUCTORS, ELECTRIC conductivity, ELECTRONIC materials, ELECTRONIC circuits
Abstract

A 512 Mb diode-switch PRAM has been developed in a 90 nm CMOS technology. The vertical diode-switch using the SEG technology has achieved minimum cell size and disturbance-free core operation. A core configuration, read/write circuit techniques, and a charge-pump system for the diode-switch PRAM are proposed. The 512 Mb PRAM has achieved read throughput of 266 MB/s through the proposed schemes. The write throughput was 0.54 MB/s in internal x2 write mode, and increased to 4.64 MB/s with x16 accelerated write mode at 1.8 V supply. [ABSTRACT FROM AUTHOR]

Published
2008
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30. A 0.1-µm 1.8-V 256-Mb Phase-Change Random Access Memory (PRAM) With 66-MHz Synchronous Burst-Read Operation.

Author

Sangbeom Kang, Woo Yeong Cho, Beak-Hyung Cho, Kwang-Jin Lee, Chang-Soo Lee, Hyung-Rok Oh, Byung-Gii Choi, Qi Wang, Hye-Jin Kim, Mu-Hui Park, Yu Hwan Ro, Suyeon Kim, Choong-Duk Ha, Ki-Sung Kim, Young-Ran Kim, Du-Eung Kim, Choong-Keun Kwak, Hyun-Geun Byun, Gitae Jeong, and Hongsik Jeong

Subjects
RANDOM access memory, LOW voltage integrated circuits, COMPUTER storage devices, MAGNETIC memory (Computers), COMPUTER input-output equipment
Abstract

A 256-Mb phase-change random access memory has been developed, featuring 66-MHz synchronous burst-read operation. Using a charge pump system, write performance was characterized at a low supply voltage of 1.8 V. Measured initial read access time and burst-read access time are 62 and 10 ns, respectively. The write throughput was 0.5 MB/s with internal × 2 write and can be increased to 2.67 MB/s with × 16 write. Endurance and retention characteristics are measured to be 107 cycles and ten years at 99 °C. [ABSTRACT FROM AUTHOR]

Published
2007
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32. A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW.

Author

Hoeju Chung, Byung Hoon Jeong, ByungJun Min, Youngdon Choi, Beak-Hyung Cho, Junho Shin, Jinyoung Kim, Jung Sunwoo, Joon-min Park, Qi Wang, Yong-jun Lee, Sooho Cha, Dukmin Kwon, Sangtae Kim, Sunghoon Kim, Yoohwan Rho, Mu-Hui Park, Jaewhan Kim, Ickhyun Song, and Sunghyun Jun

Published
2011
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