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To improve the power handling capability at ground stations of a 5.8-GHz solar space power satellite using microwave power transmission, a power charge-pump meta-semiconductor field-effect transistor (MESFET)-based rectifier is presented in this article. Unlike conventional microwave Schottky diodes, diode-connected MESFETs, whose nonlinear characteristics help them to have a unique current–voltage (I-V) curve that overcomes the limitations of a Schottky diode. Thus, the maximum input power of the proposed rectifier is extended up to 251.2 mW by replacing a Schottky diode with a diode-connected MESFET. Additionally, a class F harmonic processing network is introduced to control the voltage and current waveform at the load of the rectifier. Consequently, the RF-dc conversion efficiency is increased since the power dissipation is limited at the junction resistance of both the drain and the source of the MESFET. Owing to the abnormal characteristics of the diode-connected MESFET, the measured conversion efficiency of our rectifier is approximately 73.2% at 126 mW, and the input power range for rectifier efficiency higher than 50% is between 16 and 224 mW. The proposed rectifier for the space solar power satellite application is demonstrated and verified using a microwave wireless power transmission system. [ABSTRACT FROM AUTHOR]

In this letter, fin-shape tri-gate $\beta $ -Ga2O3 lateral MESFETs are demonstrated with a high power figure of merit (PFOM) of 0.95 GW/cm2 – a record high for any $\beta $ -Ga2O3 transistor to date. A low-temperature un-doped buffer-channel stack design is developed which demonstrates record high Hall and drift electron mobilities in doped $\beta $ -Ga2O3 channels allowing for low ON resistances (RON) in $\beta $ -Ga2O3 MESFETs. Fin-widths (Wfin) were 1.2- $1.5~\mu \text{m}$ and there were 25 fins (Nfin) per device with a trench depth of $\sim ~1~\mu \text{m}$. A $\beta $ -Ga2O3 MESFET with a source-drain length of 6.4 $\mu \text{m}$ exhibits a high ON current (187 mA/mm), low RON ($20.5~\Omega $.mm) and a high average breakdown field (4.2 MV/cm). All devices show very low reverse leakage until catastrophic breakdown for breakdown voltages (VBR) scaling from 1.1kV to ~3kV. This work demonstrates the potential of channel engineering in improving $\beta $ -Ga2O3 device performance towards lower conduction losses for low-to-medium voltage applications. [ABSTRACT FROM AUTHOR]

We demonstrate a passivated MESFET fabricated on (010) Si-doped $\beta $ -Ga2O3 with breakdown over 2.4 kV without field plates, high Power Figure of Merit (PFOM), and high estimated Huang’s Material Figure of Merit (HMFOM), owing to low gate charge and high breakdown. MESFETs with 13 $\mu \text{m}$ source-drain spacing and 75 nm channel exhibited a current density of 61 mA/mm, peak transconductance of 27 mS/mm, and on-resistance of ${133}~\Omega \cdot \text {mm}$. The device showed a PFOM competitive with state-of-the-art $\beta $ -Ga2O3 devices and a record high estimated HMFOM for a $\beta $ -Ga2O3 device, competitive with commercial wide-band gap devices. This demonstrates high-performance $\beta $ -Ga2O3 devices as viable multi-kV high-voltage power switches. [ABSTRACT FROM AUTHOR]

A high-performance solar-blind phototransistor, which is based on hydrogen-terminated diamond was fabricated and reported. The fabricated phototransistor was based on metal–semiconductor field effect transistor architecture with a high photoresponsivity ($2.48\times10$ 4 $\text{A}/\text{W}$), high external quantum efficiency ($1.44\times10$ 5), and high detectivity ($5.08\times10$ 9 Jones) under 213-nm light illumination (437 $\text{W}/\text{m}$ 2). At 5240 $\text{W}/\text{m}$ 2 light illumination, the change in drain current exceeds six orders of magnitude. Through transient response measurement, the rise/decay time of the phototransistor is about 88/36 ms and there is no significant persistent photoconductive effect. [ABSTRACT FROM AUTHOR]

We fabricated AlN metal semiconductor field effect transistors (MESFETs) with an epitaxially grown n-type AlN channel layer and characterized the temperature dependence of their device properties. As the temperature was varied from room temperature to 500°C, maximum drain current increased from 0.42 to 45 mA/mm and maximum transconductance increased from 0.05 to 4.5 mS/mm. This enhanced device performance with increasing temperature is attributed to increased carrier concentration in n-type AlN due to the large ionization energy of Si donors. Owing to a large Schottky barrier height of 2.08 eV for the Ni gate electrode/n-type AlN interface, reverse leakage current is less than $10^{-{10}}$ A/mm at temperatures ranging from room temperature to 500°C. Off-state breakdown voltage is as high as 1720 V for gate-drain spacing of 16 ${\mu }\text{m}$. These results indicate that AlN MESFETs are promising for high-voltage electronic devices operating at high temperature. [ABSTRACT FROM AUTHOR]

Schottky contacts have been used to fabricate normally- OFF lateral reverse-blocking MESFETs on p-type (boron-doped) O-terminated monocrystalline diamond. The devices utilized an ohmic source contact but both gate and drain contacts were Schottky in nature. Boron-doped p-channel diamond MESFETs reported to date display the less attractive normally- ON characteristics. Here, the normally- OFF transistor delivered a current level of ~1.5 $\mu $ Amm−1 at a negative ${V}_{\text {GS}}$ of 0.8 V and a transconductance (${g}_{m}$) of $16~\mu $ Smm−1, measured at room temperature (RT); at a temperature of 425 K, these values rose to $\sim 70~\mu $ Amm−1 for ${I}_{\text {DS}}$ and a ${g}_{m}$ value of $260~\mu $ Smm−1. In both cases, a negligible gate leakage current was measured with no breakdown apparent at the maximum field investigated here ($3.7\times 10^{{5}}$ V/m−1). The Schottky gate demonstrates a well-behaved control of the channel even at higher temperatures. The high-temperature operation, normally- OFF behavior, and diamond’s inherent radiation hardness make this transistor promising for harsh environment applications. [ABSTRACT FROM AUTHOR]

Unintentional as well as intentional electromagnetic interference can cause interference and performance degradation of microwave circuits or systems. In this article, a modified multiport lumped-network finite-difference time-domain method (FDTD) method based on Y-matrix is proposed, where bilinear transform is used to incorporate the V–I relation of the lumped-network into FDTD iteration. It is further used for simulating transient responses of mesfet-based amplifiers, which are often used in many radar and communication systems. The excitation of such an RF amplifier is assumed to be an intentional electromagnetic interference (IEMI) signal but with different waveforms and magnitudes. Parametric studies are performed to show hybrid effects of waveforms and magnitudes of the IEMI signals on the transient coupled voltages at the output port of such mesfet-based amplifier, with useful information obtained for understanding the interaction process between the intentional electromagnetic interference signals and active components. [ABSTRACT FROM AUTHOR]

We demonstrate over 3 kV gate-pad-connected field plated (GPFP) β-Ga2O3 lateral MESFETs with high lateral figures of merit (LFOM) using metalorganic vapor phase epitaxy (MOVPE) grown channel layers and regrown ohmic contact layers. Using an improved low-temperature MOVPE selective area epitaxy process, we show that a total contact resistance to the channel as low as 1.4 Ω.mm can be achieved. The GPFP design adopted here using plasma-enhanced chemical vapor deposited (PECVD) SiNx dielectric and SiNx/SiO2 wrap-around passivation exhibits up to ~14% improved RON, up to ~70% improved breakdown voltage (VBR = VDS-VGS) resulting in up to 3 × higher LFOM compared to the non-FP β-Ga2O3 lateral MESFETs. The VBR (~2.5 kV) and LFOM (355 MW/cm2) measured simultaneously in our GPFP β-Ga2O3 lateral MESFET (with LGD = 10 μm) is the highest value achieved in any depletion-mode β-Ga2O3 lateral device to date. [ABSTRACT FROM AUTHOR]

In this article, a new metal-semiconductor field-effect transistor (MESFET) is introduced by amending the carrier distribution in the active regions of the device for radio frequency applications (RF). A quasi-two-dimensional material beta gallium oxide (β-Ga2O3) semiconductor is used as a fundamental material. To amend the carrier distribution, a tunnel diode (TD- β GO) is employed at the bottom of the source and the channel regions in the buried oxide (BOX) layer of MESFET. In our work, parameters such as the breakdown voltage, the self-heating effect, the kink effect, the parasitic capacitance, the power gains, the noise figure, and the carrier’s concentration are obtained and compared with the conventional structure. As a result of employing the tunnel diode, the TD-β GO MESFET has better characteristics in comparison with the C-β GO MESFET though the drain current at the saturation region in the TD- ${\beta }$ GO structure is reduced. [ABSTRACT FROM AUTHOR]

In this paper, an analytical model has been developed to predict DC characteristics of wide bandgap metal semiconductor field effect transistors (MESFETs). The model evaluates potential distribution inside the channel of the device by dividing the Schottky barrier depletion layer into four distinct regions and predicts I - V characteristics both at the room as well as at elevated temperatures. It also considers selfheating effects caused by the high-drain current and predicts negative output conductance, usually exhibited by wide bandgap MESFETs. The validity of the proposed technique is ensured by applying it on GaN and SiC MESFETs. It has been shown that the developed technique offers ~50% and ~37% improved accuracy in predicting the output characteristics of the device at T = 300 K and T = 500 K, respectively, relative to the best reported model. Thus, the proposed technique can be employed in the device modeling software involving high-power MESFETs.

A SrSnO3 high-frequency field-effect transistor (FET) is demonstrated. The device structure consists of a recessed Schottky-gate FET with a heavily doped cap layer. DC measurements on devices with 0.5- $\mu \text{m}$ gate length and 4- $\mu \text{m}$ source/drain spacing show a maximum drain current of 53 mA/mm and a maximum transconductance of 43.2 mS/mm. Radio frequency (RF) characterization reveals a cut-off frequency, ${f} _{\text {T}}$ , of 1.31 GHz (0.97 GHz) and a maximum oscillation frequency, ${f} _{\text {max}}$ , of 3.25 (3.25) GHz, after (before) de-embedding. These results represent an important advancement in developing perovskite materials for RF applications. [ABSTRACT FROM AUTHOR]

This article reports the first comprehensive analysis of the reliability of hydrogen-terminated diamond metal semiconductor field-effect transistors (MESFETs) submitted to OFF-state stress. We demonstrate that stress induces an increase in ON-resistance and a shift in the threshold voltage, along with a decrease in the transconductance peak value. These effects are ascribed to the generation of defects at the diamond surface and/or in the upper semiconductor layers. The defects are generated both in the access regions and under the gate, and their activation energy is 0.30 eV. [ABSTRACT FROM AUTHOR]

Fabrication of gate-recessed SrSnO3 (SSO) metal-semiconductor field-effect transistors (MESFETs) with Ni Schottky gates is reported on bi-layer epitaxial SSO films with a thin heavily-doped cap layer. Devices with 0.5- $\mu \text{m}$ gate length showed enhancement-mode behavior with a saturation drain current, ${I}_{\text {DSAT}}$ , of 33 mA/mm and peak transconductance, ${g}_{\text {m,max}}$ , of 65 mS/mm. The ${g}_{\text {m,max}}$ value is a roughly $2\times $ improvement over control devices fabricated on single-layer films. Gate-recessed SSO MESFETs with Pt Schottky gates were also explored on the bi-layer films. Devices with 1- $\mu \text{m}$ gate length displayed ${I}_{\text {DSAT}} =133$ mA/mm and $g_{\text {m,max}} =73$ mS/mm, after thermal annealing. [ABSTRACT FROM AUTHOR]

In this article, we report the fabrication and characterization of boron-doped diamond (B-diamond) Schottky diodes and MESFETs. Effects of annealing at 573–973 K on the electrical properties of these devices are investigated. Current density maximum for the as-fabricated Schottky diode is 0.05 A/cm2 at a gate voltage of −10.0 V. Annealing at 673 and 973 K makes it increase first to 0.70 A/cm2 and decrease lately to 0.07 A/cm2, respectively. ON/OFF ratios for the as-fabricated B-diamond Schottky diode exceed 4.5 × 108 at the OFF-voltage (VOFF) of 0 V and 3.2 × 106 at VOFF = 42.0 V. For the annealed Schottky diode, the ON/OFF ratios are higher than 1.7 × 106 at VOFF < 6.0} V. Ideality factor and barrier height for Au/Pt bilayer gates on the B-diamond channel layer range from 1.05 to 1.78 and from 1.24 to 1.56 eV, respectively. All three B-diamond MESFETs with the gate lengths of 12.0, 7.0, and 4.3 μm, respectively, operate with p-type channel characteristics. The drain current maxima for the as-fabricated MESFETs are −0.11, −0.16, and −0.39 mA/mm. After annealing at 773 K, these values increase to −0.17, −0.24, and −0.55 mA/mm. Annealing at 773 K also increases the extrinsic transconductance maxima for the three MESFETs from 11.1, 11.0, and 10.4μS/mm to 18.6, 16.2, and 14.4 μS/mm, respectively. [ABSTRACT FROM AUTHOR]

This brief demonstrates the effectiveness of utilizing a 4-bit current steering digital to analog converter (DAC) as an adaptive power controller to adjust the dc quiescent current of a linear power amplifier as a function of the input signal power. A custom made metal-semiconductor field-effect transistor (MESFET), which is used as the amplifying transistor, and a current steering DAC have been integrated on the same substrate to minimize the power amplifier’s form factor and mismatches between the power tracker and the MESFET. This design has been implemented in a 45-nm CMOS SOI global foundries (GFs) process with a nominal supply voltage of 0.9 V and provides 31.8 dBm of output power, 45% peak efficiency and 24 dB maximum power gain. Measurement results at 70 MHz reveal about 10% efficiency improvement at 6-dB power back-off with continuous wave and 5% for standard 16-PSK EDGE modulated signals. The amplifier shows error vector magnitude of 5% and ACPR of −56.9 dBc at 400 kHz offset from the carrier frequency without digital pre-distortion, while transmitting 27 dBm of modulated output power. [ABSTRACT FROM AUTHOR]

A 2-D electrothermal model of delta-doped beta-gallium oxide (β-Ga2O3) metal–semiconductor field-effect transistor (MESFET) is developed by using TCAD Sentaurus to investigate its electrical and thermal characteristics. The temperature and electric field-dependent electron mobility model is incorporated to predict I–V characteristics of the FET, which are in good agreement with the measured I–V characteristics. We investigated the effect of bias voltages on an electric field, a current path, a volumetric heat generation profile, and a peak temperature at a given total heat dissipation. The peak temperature is observed to be significantly different at the same power dissipation but different bias conditions, e.g., the peak temperature is ~9 K higher when the drain-to-source voltage (Vds) = 25 V and the gate-to-source voltage (Vgs) = −6 V compared with Vds = 8.3 V and Vgs = 2 V at the total power dissipation of 1.16 W/mm. This difference is attributed to the change in the electron Joule heating profile with the applied bias voltage. The effects of the location of the delta-doping layer, the gate–drain spacing, and the source–drain spacing are investigated to guide a future device fabrication. The variation in these parameters mainly affects electrical characteristics such as ON-resistance, saturation current, threshold voltage, and so on. The thermal characteristics, such as peak temperature, temperature profile, and so on, are not significantly affected at a low-power dissipation. [ABSTRACT FROM AUTHOR]

Schottky diodes and metal-semiconductor field-effect transistors (MESFETs) are fabricated on a quite smooth and high boron doping level diamond epitaxial layer. Forward current density maximum for the Schottky diode is 0.6 A cm−2 with the on/off ratio higher than 108. Ideality factor and barrier height for Pt metal on the boron-doped diamond are evaluated to be 1.07 and 1.38 eV, respectively. Drain current maximum for the MESFET is −0.55mA mm−1, which is nine times higher than that of the previous report. Origin of it is possibly attributed to the good surface quality and high boron concentration for the B-diamond. [ABSTRACT FROM AUTHOR]

Metal–semiconductor and junction n-channel field-effect transistors (MESFETs and JFETs) have been fabricated on glass substrates using room temperature deposited amorphous zinc–tin oxide (ZTO) channel layers. Characteristics of transistors and inverter circuits are compared. Best FET devices exhibit ON-to- OFF current ratios over eight orders of magnitude, subthreshold swings as low as 250 mV/dec and field-effect mobilities of 5 cm2/Vs. Furthermore, all devices show long-term stability over a period of more than 200 days. Inverters fabricated using either MESFETs or JFETs exhibit remarkable peak gain magnitude values of 350 and voltage uncertainty levels as low as 260 mV for an operating voltage of 5 V. A Schottky diode FET logic (SDFL) approach is applied to shift the switching voltage which is a requirement for cascading of inverters for realization of ring oscillators. [ABSTRACT FROM AUTHOR]

As an ultra-wide bandgap semiconductor, $\beta $ -Ga2O3 has attracted great attention for high-power, high-voltage, and optoelectronic applications. However, until now, high-frequency performance of gallium oxide devices has been limited to relatively low current gain cutoff frequencies below 5 GHz. Here, we show that highly localized delta-doping designs can enable high-sheet-charge density to enable devices with short gate lengths that allow high-frequency operation. Field-effect transistors with a gate length of 120 nm on such delta-doped $\beta $ -Ga2O3 are reported here with extrinsic unity current gain frequency of 27 GHz. The device has a peak drain current of 260 mA/mm, transconductance (gm) of 44 mS/mm, and three-terminal off-state breakdown voltage of 150 V. These results demonstrate that the potential of $\beta $ -Ga2O3 for future RF and millimeter-wave device applications. [ABSTRACT FROM AUTHOR]

Metal semiconductor field effect transistors (MESFETs) have been fabricated using a 45-nm silicon-on-insulator CMOS technology available from Global Foundries. MESFETs with gate lengths of 200 nm show good manufacturability with well-controlled run-to-run variations. The DC and RF performance of devices with different drain access lengths are compared to illustrate the design trades between high breakdown voltage and high frequency operation. Two applications of the MESFETs for RF integrated circuit design are presented. The first demonstrates integrated n-channel MOSFET–MESFET cascode amplifiers that combine the enhanced voltage operation of the MESFET with the high frequency capability of the scaled MOSFET. The resulting small-signal amplifiers demonstrate cut-off frequencies of 50 GHz when operated with supply voltages of 6 V, significantly higher than the nominal 1 V breakdown voltage of the CMOS transistors. The second application demonstrates a watt-level MESFET power amplifier integrated with a CMOS current steering digital-to-analog converter (DAC). The MESFET serves as the RF output device, while the 4-bit CMOS DAC enables average power tracking. Both examples demonstrate the design flexibility enabled by the CMOS-compatible MESFETs. [ABSTRACT FROM AUTHOR]

The demonstration of SrSnO3 metal–semiconductor field effect transistors (MESFETs) is reported. The device layer structure consists a 28-nm-thick n-type SrSnO3 film on top of an 11-nm-thick undoped SrSnO3 film grown by hybrid molecular beam epitaxy on a (110) GdScO3 substrate. The MESFETs utilize a Pt Schottky gate electrode and diffused Sc Ohmic contacts. A Schottky barrier height of 1.55 eV was extracted for Pt on SrSnO3 using capacitance-voltage measurements. Devices with a gate length of $3~\mu \text{m}$ and source–drain spacing of 9 $\mu \text{m}$ had a drive current of 36 mA/mm at ${V} _{\textsf {GS}} = +1$ V and ${V} _{\textsf {DS}} = +3.5$ V, and a peak extrinsic (intrinsic) transconductance of 17 mS/mm (35 mS/mm). [ABSTRACT FROM AUTHOR]

Threshold voltage instability was observed on $\beta $ -Ga2O3 transistors using double-pulsed current–voltage and constant drain current deep level transient spectroscopy (DLTS) measurements. A total instability of 0.78 V was attributed to two distinct trap levels, at ${E}_{C}$ -0.70 and ${E}_{C}$ -0.77 eV, which need to be mitigated for future applications. The traps are likely located near the gate–drain edge and below the delta-doped layer, which is determined through the DLTS technique and an understanding of the fill and empty biasing conditions. The trap modulation was consistent with a gate leakage-based trap filling mechanism, which was demonstrated. It is likely that Fe is playing a role in the observed dispersion due to the close proximity of the Fe substrate. [ABSTRACT FROM AUTHOR]

In this paper, electrostatic discharge (ESD) tests are performed on silicon carbide (SiC) MESFETs in order to understand their physical behavior and failure mechanisms during such stresses. The purpose is to point out advantages and drawbacks of this technology, paying special attention to aspects related to its possible commercialization and reliability. Three MESFETs designed to be integrated as a driver in monolithic SiC systems, featuring some ESD internal protection are investigated. Different configurations on ohmic and Schottky contacts are analyzed. Lock-in thermography is carried out for the physical failure location. With technology computer aided-design Sentaurus simulation, it allows to determine the nature of the defects on the damaged areas. Hypothesis on the failure mechanism as SiO2 breakdown or SiC sublimation are presented. Solutions to increase the ESD robustness, such as a Zener diode integration or the use of Al2O3 dielectric for passivation, are therefore proposed in this paper. [ABSTRACT FROM AUTHOR]

We report silicon delta-doped \beta -Ga2O3 metal semiconductor field effect transistors (MESFETs) with source–drain ohmic contacts formed by patterned regrowth of n-type Ga2O3. We show that regrown n-type contacts can enable a lateral low-resistance contact to the two-dimensional electron gas channel, with contact resistance lower than 1.5~\Omega -mm. The fabricated MESFET has a peak drain current ( I D,\text{MAX} ) of 140 mA/mm, transconductance ( {g} m ) of 34 mS/mm, and 3-terminal off-state breakdown voltage of 170 V. The proposed device structure could provide a promising path towards vertically scaled $\beta $ -Ga2O3 field effect transistors. [ABSTRACT FROM AUTHOR]

With the development of novel device applications, e.g., in the field of Internet of Things or point-of-care personalized diagnostic systems, came an increased demand for MESFETs for fast and low-power consumption integrated circuits and active-matrix displays. In this paper, we present fabrication and characterization of transparent Ru–Si–O/In–Ga–Zn–O MESFETs on flexible substrates. The use of transparent conducting oxide, namely, Ru–Si–O, as Schottky gate electrode, allows for processing the devices at room temperature, enabling the utilization of such low-temperature substrates as polyethylene terephthalate foil and paper. It was shown that tuning the device geometry allows realization of transistors providing on-current up to 2 mA, while the highest on-to-off current ratio equals 2\times 10^\mathrm 5 , with off-current below 1 nA, carrier mobility in the channel exceeds 9 cm ^\mathrm 2\cdot \textV^\mathrm -1\cdot \texts^\mathrm -1 , and subthreshold swing is below 250 mV $\cdot $ decade ^{\mathrm { {-1}}} . [ABSTRACT FROM PUBLISHER]

An enhancement-mode cascode power device topology is described in which a high-voltage commercial device is used in conjunction with a low-voltage radiation-tolerant device to enable a switch that functions well at high total ionizing dose. Although the threshold voltage of the commercial high-voltage power transistor changes significantly with ionizing dose, the threshold voltage of the input device is relatively constant and presents a stable load to the power device drive circuit. Experimental data showing stable input characteristics for the composite devices are presented. [ABSTRACT FROM PUBLISHER]

Field-effect transistors (FETs) fabricated on hydrogen-terminated diamond surface have been heavily irradiated with 14.8-MeV neutrons in order to evaluate their possible application in very high neutron fluence environments. The dc performance of the diamond-based FETs, such as drain saturation current and maximum transconductance, has been studied as a function of a 14.8-MeV neutron fluence up to 10^14 n/cm2, delivered in five steps. The effects on electrical properties of H-terminated diamond surface have also been investigated during the neutron irradiation experiments. The Hall parameters, i.e., sheet hole concentration, hole mobility, and sheet resistance, were monitored before and after each irradiation. The performance remains stable during all the neutron fluence steps, thus assessing a remarkable radiation hardness of diamond-based devices. To the best of our knowledge, this is the first published data on 14-MeV neutron tolerance of diamond FET devices. [ABSTRACT FROM PUBLISHER]

Potential distribution of a silicon-on-insulator metal-semiconductor field effect transistor (SOI-MESFET) is successfully controlled by introducing a new structure. The structure we established, utilizes a P-type layer embedded in the drift region. Also, the doping engineering is applied to the proposed structure in order to more enhance the performance superiority of the novel structure called SPL-DE SOI MESFET. The P-type layer and doping engineering control the potential distribution and help the proposed structure to improve the important parameters, such as breakdown voltage, driving current, power gains, oscillation frequency, transconductance, maximum output power density, and gate–drain parasitic capacitance. As a result, the SPL-DE SOI MESFET has superior electrical performances in comparison with the similar device based on the conventional structure thus taking into account the special considerations for the high-voltage and high-frequency applications. [ABSTRACT FROM PUBLISHER]

Silicon metal–semiconductor FETs (MESFETs) have been fabricated using a 32-nm silicon-on-insulator (SOI) CMOS technology. The MESFET gates are formed during the self-aligned silicide step and show almost ideal Schottky behavior at low drain voltages. However, an anomalous peak in the reverse gate leakage current appears for drain voltages ≥2 V. The anomalous gate current is attributed to impact ionization generating excess holes that exit the channel through the Schottky contact. An analytical model is used to extract the electron impact ionization rate, $\alpha $ , which agrees with three earlier data sets over nearly four orders of magnitude. [ABSTRACT FROM PUBLISHER]

We describe the development and optical characterization of a planar medium infrared (mid-IR) InSb photodetector on a GaAs substrate technology, capable of integrating MESFETs, to demonstrate a new active pixel device architecture. Our results pave the way for the development of integrated mid-IR focal plane array circuits on a single chip. Device structures with areas down to 0.0016 mm $^{{ {2}}}$ were investigated. By deploying a silicon nitride passivation layer, we were able to reduce leakage current in reverse bias by up to 27% to yield an improved rectifier. Extensive optical characterization was carried out in the near- and mid-IR wavelength range. Responsivities of up to 3.54 A/W and quantum efficiency values above unity were obtained in the near-IR range as a consequence of illumination above the bandgap causing impact ionization. In the mid-IR range, responsivities of up to 0.97 A/W were observed. The bandwidth of the devices proved compatible with video-rate standard sampling rates. [ABSTRACT FROM PUBLISHER]

Cascode amplifiers consisting of a common-source MOSFET integrated with a common-gate metal–semiconductor field-effect transistor (MESFET) have been manufactured using a commercial 45-nm silicon-on-insulator RF CMOS process. The enhanced breakdown voltage of the MESFETs combined with the high speed of the RF MOSFETs, results in a maximum cutoff frequency of up to 70 GHz, with a maximum available gain of 18 dB at K-band frequencies (18–27 GHz) using a 6-V supply. This high-frequency operation makes the proposed amplifier a prospective candidate for 5G and millimeter wave applications. [ABSTRACT FROM AUTHOR]

Medium wavelength infrared (MWIR) detectors are of increasing importance in defense, security, commercial, and environmental applications. Enhanced integration will lead to greater resolution and lower cost focal plane arrays (FPAs). We present the monolithic fabrication of an active photopixel made in InSb on a GaAs substrate that is suitable for large-scale integration into an FPA. Pixel addressing is provided by the cointegration of a GaAs MESFET with an InSb photodiode (PD). Pixel fabrication was achieved by developing novel materials and process steps, including isolation etches, a gate recess etch, and low temperature processes, to make Ohmic contacts to both the GaAs and InSb devices. Detailed electrical and optical measurements in an FTIR demonstrated that the PD was sensitive to radiation in the range of 3– 5~\mu \textm at room temperature, and that the device could be isolated from its contacts using the integrated MESFET. This heterogeneous technology creates great potential to realize a new type of monolithic FPA of addressable pixels for imaging in the MWIR range. [ABSTRACT FROM AUTHOR]

This paper demonstrates the use of cost-effective solution-processed \alpha -Ga2O3 thin films (TFs) for electronic device applications. MESFETs based on AgOx Schottky diode (SD) gates were fabricated on highly crystalline Sn-doped \alpha -Ga2O3 TFs, grown by mist chemical vapor deposition at atmospheric pressure and a substrate temperature of only 400 °C. The rectification ratio and reverse breakdown voltage of typical SDs were 6 \times 10^6 and 19.6 V, respectively. The ON–OFF ratio of the corresponding transistors was 2 \times 10^7 . The MESFETs that could withstand drain voltages of up to 48 V were also realized. [ABSTRACT FROM AUTHOR]

This paper is an important step toward the development of complex integrated circuit (IC) control electronics that have to attend to high-temperature environment power applications. We present in premiere a prototype set of essential mixed-signal ICs on SiC capable of controlling power switches and a lateral power MESFET able to operate at high temperatures, all embedded on the same chip. Also, we report for the first time the functionality of standard Si-CMOS topologies on SiC for the master–slave data flip-flop (FF) and data-reset FF digital building blocks designed with MESFETs. Concretely, we present the complete development of SiC-MESFET IC circuitry, able to integrate gate drivers for SiC power devices. This development is based on the mature and stable Tungsten–Schottky interface technology used for the fabrication of stable SiC Schottky diodes for the European Space Agency Mission BepiColombo. [ABSTRACT FROM PUBLISHER]

In this paper, an analysis of gate–source and gate–drain scaling effects in MESFETs fabricated on hydrogen-terminated single-crystal diamond films is reported. The experimental results show that a decrease in gate–source spacing can improve the device performance by increasing the device output current density and its transconductance. On the contrary, the gate–drain distance produces less pronounced effects on device performance. Breakdown voltage, knee voltage, and threshold voltage variations due to changes in gate–source and drain–source distances have also been investigated. The obtained results can be used as a design guideline for the layout optimization of H-terminated diamond-based MESFETs. [ABSTRACT FROM AUTHOR]

We present the design and fabrication of complimentary metal-semiconductor field-effect transistors (MESFETs) monolithically integrated on a high-speed silicon photonics platform. The transistors were built in an existing silicon photonics process without any additional process steps or modifications to maintain consistent photonics performance. The MESFETs showed a threshold voltage of -1.4 and 2.0 V for NMES and PMES, respectively. The NMES transconductance was measured to be 46.4 μS/μm, and the cutoff frequency was shown to be 2.2 GHz. Transistors of this design can be simply integrated into silicon photonics platforms for on-chip feedback circuits. [ABSTRACT FROM PUBLISHER]

In this brief, we present a new silicon-on-insulator MESFET by using an SiGe region as a well for absorbing the holes which are generated in result of the impact ionization mechanism. The key idea in this brief is to improve the breakdown voltage and self-heating effect (SHE) by utilizing an SiGe region to decreasing the crowding of holes around the source. The well is located in the buried oxide under the channel region. Simulation results show two extra peaks created on the electric field distribution that improves the breakdown voltage. Also, the floating body effect improves due to absorbing the holes by the hole’s well and the lattice temperature decreases, so the SHE improves, too. [ABSTRACT FROM PUBLISHER]

A novel backgate modulation technique alleviating limitations associated with supply-regulated polar transmitters is proposed. The backgate of a partially depleted silicon-on-insulator metal–semiconductor field-effect transistor with a breakdown voltage of 15 V is used to modulate the gain and output power of an RF power amplifier (PA). The high-impedance backgate provides high-efficiency and wide-dynamic-range modulation of PA gain. Measured results at 1.8 GHz demonstrate 16% power-added efficiency improvement at 6-dB backed-off output power, compared with the same RF PA without backgate modulation. [ABSTRACT FROM AUTHOR]

A novel silicon-on-insulator metal–semiconductor field-effect transistor (SOI MESFET) with controlled electric field distribution is presented in this brief. An additional layer of oxide (LO) is located in the device channel region in order to supervise the electric field distribution. The simulation results show that the LO region has excellent effects on the breakdown voltage of the device, which increases by 50% compared with that of the conventional SOI MESFET structure. Also, the maximum output power density improves by 53%. In addition, the LO region causes the improvement of the device gains and frequency parameters. Consequently, the novel SOI MESFET structure has superior electrical characteristics compared with the similar device based on the conventional structure. [ABSTRACT FROM PUBLISHER]

In this paper, a novel silicon-on-insulator (SOI) metal–semiconductor field-effect transistor (MESFET) with modified charge distribution is presented. Changing charge distribution leads to lower electric field crowding and increased breakdown voltage (VBR). For modifying charge distribution, a metal region (MR) is utilized in buried oxide of the SOI MESFET. In order to achieve the best results, the MR location and dimensions are optimized carefully. DC and radio frequency characteristics of the SOI MESFET with MR (MR-SOI MESFET) are analyzed by 2-D numerical simulation and compared with conventional SOI MESFET (C-SOI MESFET) characteristics. The simulated results show that the MR has excellent effect on the VBR of the device. The VBR of the MR-SOI MESFET structure improves by 116% compared with that of the C-SOI MESFET structure. Although drain current of the proposed structure reduces slightly, 126% improvement in maximum output power density of the device is achieved due to high enhancement of the VBR. Also, the MR leads to the enhancement of maximum oscillation frequency and maximum available gain of the MR-SOI MESFET structure. As a result, the MR-SOI MESFET structure has superior electrical performances in comparison with the similar device based on the conventional structure. [ABSTRACT FROM PUBLISHER]