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To evaluate the effectiveness of robotic rehabilitation alone, we developed a robotic rehabilitation model for rats and investigated the effects of inducing forced response-like movements on learning a choice reaction time task. The rats, while in a standing position, initially press two levers with their forepaws. An air-puff stimulation (go-signal: GS) is then applied to either their left or right forepaw. The rats respond by releasing the lever on the correct-response side (correct-RS). If the rats respond incorrectly, a lever-release motion is forcibly induced in the next repeated trial. Combining the lever activation side (correct-RS or incorrect-RS) and its timing (200 ms after GS or just before reaction time (RT)), we formed four experimental groups. The rats with a forepaw sensorimotor cerebral lesion were trained in serial reversal learning of the task, and their performance was compared using the error rate (ER) and RT. The group with incorrect-RS lever activation after GS (iRSaftGS) and the group with correct-RS lever activation before RT (cRSbfrRT) had lower ERs and RTs than the other groups. In addition, both groups showed large improvement in ER at high ER levels but only the iRSaftGS group’s improvement continued at lower ER levels. We conclude that the cRSbfrRT group facilitates only the extinction process and that the iRSaftGS group, which stretches agonistic muscles required for correct motion, is effective in both extinction and acquisition processes. Our findings provide an opportunity to reconsider the strategies for robotic rehabilitation and training. [ABSTRACT FROM AUTHOR]

The memory module is a semiconductor product fabricated by mounting several memory chips on a printed circuit board. In the module test, which is the final step in the memory module manufacturing process, the memory module is tested if it properly functions in the end-user system environment. Then, the chips in the memory module are individually checked for defects to guarantee that the quality matches consumers’ expectations. In this study, we propose a framework to predict which chips are defective in module tests using wafer and package test data. However, several challenges must be overcome. First, two different data modalities (i.e., tabular and image data) exist, which influence defect prediction differently for different chips. Second, the module test results are highly imbalanced, with a very low defect rate. To address these challenges, we use a multimodal fusion model that integrates the two different modalities by dynamically evaluating the informativeness of each modality. In addition, we adopt a technique to modify the loss function to be Fisher consistent to minimize the balanced error rate. We demonstrate that the proposed framework can effectively predict chip-level defects in module tests using a real dataset collected from a global semiconductor manufacturing company. [ABSTRACT FROM AUTHOR]

There are demographic biases present in current facial recognition (FR) models. To measure these biases across different ethnic and gender subgroups, we introduce our Balanced Faces in the Wild (BFW) dataset. This dataset allows for the characterization of FR performance per subgroup. We found that relying on a single score threshold to differentiate between genuine and imposters sample pairs leads to suboptimal results. Additionally, performance within subgroups often varies significantly from the global average. Therefore, specific error rates only hold for populations that match the validation data. To mitigate imbalanced performances, we propose a novel domain adaptation learning scheme that uses facial features extracted from state-of-the-art neural networks. This scheme boosts the average performance and preserves identity information while removing demographic knowledge. Removing demographic knowledge prevents potential biases from affecting decision-making and protects privacy by eliminating demographic information. We explore the proposed method and demonstrate that subgroup classifiers can no longer learn from features projected using our domain adaptation scheme. For access to the source code and data, please visit https://github.com/visionjo/facerec-bias-bfw. [ABSTRACT FROM AUTHOR]

As technology size scales down, magnetic tunnel junctions (MTJs) as a promising technology are becoming more and more sensitive to process variation, especially in oxide barrier thickness. Process variation particularly affects the cell resistance and the critical switching current for the smaller dimensions. This article proposes an MTJ cell with one free and two pinned layers, which highly improves the process variation robustness. By employing the spin transfer torque (STT)-spin-Hall effect (SHE) switching method, our proposed MTJ cell improves the switching speed and lowers the switching power consumption. Per simulations, an MRAM cell built with the proposed MTJ cell offers up to 36% lower total power consumption, up to 32% higher write performance, and 35% higher read performance over the previous state-of-the-art MRAMs. Also, the error rate resulting from process variation is 1.4%, which is about one-tenth of the best examples reported in the literature. [ABSTRACT FROM AUTHOR]

With the wide application of NAND flash storage systems in read-intensive memory, the corresponding reliability enhancement strategies for mitigating read disturb become the focus of investigations in recent years. The prior investigations have reported the strategies based on data modulation and verified their effectiveness in mitigating retention loss. The most significant advantage of these strategies is that they can often achieve significant reliability enhancement effect with great read performance, since they are usually based on asymmetric coding. This feature means that they have the potential to be ideal reliability enhancement strategies for read-intensive memory applications. To propose a universal and highly reliable data storage strategy, this article first observes the error modes at the cell-state level under the reliability stresses of retention loss and read disturb with floating-gate (FG) 3-D triple-level (TLC) NAND flash, and then proposes a target cell states elimination (TCSE) coding strategy for further restraining bit errors. In addition, this article for the first time reports the extra bit errors generated in the decoding process of the storage strategies based on data modulation, and defines the concept of transfer factor (TF) for evaluation. By using the proposed TCSE, the experimental results show that the overall bit error rate (BER) can be reduced by 80%–90% on average, compared with the raw random data pattern. [ABSTRACT FROM AUTHOR]

The new Fifth generation (5G) of wireless communications and beyond 5G (B5G) networks are required to provide connectivity for massive number of devices at high speed and low latency. Within this context, non-orthogonal multiple access (NOMA) has been involved and emerged in recent research since it is considered as an enabling technology for 5G and B5G networks. NOMA allows several users to share the same resources of time and frequency, making it an excellent candidate to provide impressively large connectivity with high spectral efficiency. In this paper, we study the performance of NOMA systems assuming independent but not necessarily to be identical $N$ -Nakagami-m multipath fading channels. This channel model subsumes the double Nakagami-m, which was investigated in the context of intervehicular communications and keyhole multiple input multiple output systems, as special cases. To this end, we derive exact analytical and asymptotic expressions for the probability density function of the overall signal to noise ratio, system capacity, and the pairwise error probability (PEP) for each user. Numerical results are also provided herein to show the effects of fading parameters and number of users on the capacity and the PEP of each user. [ABSTRACT FROM AUTHOR]

As the network-on-chip (NoC) integrated into an SoC design can come from an untrusted third party, there is a growing risk that data integrity and security get compromised when supposedly sensitive data flows through such an untrusted NoC. We thus introduce a new method that can ensure secure and secret data transmission over such an untrusted NoC. Essentially, the proposed scheme relies on encoding binary data as delays between packets travelling across the source and destination pair. The maximum data transmission rate of this inter-packet-delay (IPD)-based communication channel can be determined from the analytical model developed in this article. To further improve the undetectability and robustness of the proposed data transmission scheme, a new block coding method and communication protocol are also proposed. Experimental results show that the proposed IPD-based method can achieve a packet error rate (PER) of as low as 0.3% and an effective throughput of $\boldsymbol {2.3\times 10^{5}}$ b/s, outperforming the methods of thermal covert channel, cache covert channel, and circuit-based encryption and, thus, is suitable for secure data transmission in unsecure systems. [ABSTRACT FROM AUTHOR]

Approximate computing is an emerging strategy to improve the energy efficiency of many error-tolerant applications. To design an approximate circuit automatically, many approximate logic synthesis (ALS) methods have been proposed, among which many are greedy. To improve the synthesis quality of these greedy methods, one key is to calculate the errors of all candidate approximate transformations accurately. However, the traditional simulation-based method is time consuming. Instead, many existing methods just perform quick but inaccurate error estimation. In this work, to improve both the accuracy and runtime of error estimation, we propose VECBEE, a versatile efficiency–accuracy configurable batch error estimation method for greedy ALS. It is based on Monte Carlo simulation and an efficient technique to capture whether a signal change due to an introduced approximation will be propagated to each primary output. VECBEE is generally applicable to any statistical error measurement, such as error rate and average error magnitude, and any graph-based circuit representation. It allows a flexible tradeoff between the error estimation accuracy and the runtime, while even the fully accurate version is much faster than the traditional simulation-based method. We apply VECBEE to two representative greedy ALS methods and demonstrate its effectiveness in generating better approximate circuits. The code of VECBEE is made open source. [ABSTRACT FROM AUTHOR]

Neural networks (NNs) have been successfully deployed in various applications of artificial intelligence. However, architectural design of NNs is still a challenging problem. This is due to the need to navigate a search space based on a large number of hyperparameters. This forces the search space of possible architectures to grow exponentially. Using a trial-and-error design approach is very time consuming and leads to suboptimal architectures. In addition, approaches, such as neural architecture search based on reinforcement learning and differentiable gradient-based architecture search, often incur huge computational costs or significant memory requirements. To address these challenges, we propose the CURIOUS NN synthesis methodology. It uses a performance predictor to efficiently navigate the architectural search space with an evolutionary search process. The predictor is built using quasi Monte-Carlo sampling, boosted decision tree regression, and an intelligent iterative sampling method. It is designed to be sample efficient. CURIOUS starts from a base architecture and explores the architectural search space to obtain a variant of the base architecture with the highest performance. This search framework is general and covers all important NN architecture types, e.g., feedforward NNs (FFNNs), convolutional NNs (CNNs), recurrent NNs (RNNs), and transformers. We evaluate the performance of CURIOUS on various datasets and base architectures. Through these experiments, we demonstrate significant performance improvements over the baseline architectures. For the MNIST dataset, our CNN architecture achieves an error rate of 0.66%, with $8.6\times $ fewer parameters compared to the LeNet-5 baseline. For the CIFAR-10 dataset, we use the ResNet architectures and residual networks with Shake-Shake regularization as the baselines. Our synthesized ResNet-18 has a 2.52% accuracy improvement over the original ResNet-18, 1.74% over ResNet-101, and 0.16% over ResNet-1001, while requiring comparable number of parameters and floating-point operations to the original ResNet-18. This result shows that instead of just increasing the number of layers to increase accuracy, an alternative is to use a better NN architecture with a small number of layers. In addition, CURIOUS achieves an error rate of just 2.69% with a variant of the residual architecture with Shake-Shake regularization. We also use the set of optimized hyperparameters found for ResNet-18 on the CIFAR-10 dataset to train and evaluate the model on the ImageNet dataset, and show 3.43% (1.83%) improvement in the top-1 (top-5) error rate compared to the original ResNet-18 model. CURIOUS also obtains the highest accuracy for various other FFNNs that are geared toward edge devices and IoT sensors. In addition, we use CURIOUS to search for deep RNN architectures for the SICK dataset for sentence similarity evaluation. It achieves a mean-squared error of only 0.2060, improving upon the base network performance, without the need to stack multiple long short-term memories. We also use CURIOUS to search for a better NN classifier for the sentiment analysis task on the Stanford sentiment treebank dataset using a pretrained BERT model and again demonstrate improvements in performance. [ABSTRACT FROM AUTHOR]

Approximate computing is an attractive paradigm for reducing the design complexity of error-resilient systems, therefore, improving performance and saving power consumption. In this work, we propose a new two-level approximate logic synthesis method based on cube insertion and removal procedures. The experimental results have shown significant literal count and runtime reduction compared to the state-of-the-art approach. The method scalability is illustrated for a high error threshold over large benchmark circuits. The obtained solutions have presented a literal number reduction up to 38%, 56%, and 93% with respect to an error rate of 1%, 3%, and 5%, respectively. [ABSTRACT FROM AUTHOR]

This paper derives the asymptotic distribution of the normalized $k$ -th maximum order statistics of a sequence of non-central chi-square random variables with non-identical non-centrality parameters. We demonstrate the utility of these results in characterizing the signal-to-noise ratio in three different applications in wireless communication systems where the statistics of the $k$ -th maximum channel power over Rician fading links are of interest. Furthermore, we derive simple expressions for the asymptotic outage probability, average throughput, achievable throughput, and average bit error probability. The proposed results are validated via extensive Monte Carlo simulations. [ABSTRACT FROM AUTHOR]

In this paper, we propose a new linear-equation ordered-statistics decoding (LE-OSD). Unlike the OSD, LE-OSD uses high reliable parity bits rather than information bits to recover codeword estimates, which is equivalent to solving a system of linear equations (SLE). Only test error patterns (TEPs) that create feasible SLEs, referred to as the valid TEPs, are used to obtain codeword estimates. We introduce several constraints on the Hamming weight of TEPs to limit the overall decoding complexity. Furthermore, we analyze the block error rate (BLER) and the computational complexity of the proposed approach. It is shown that LE-OSD has a similar performance to OSD in terms of BLER, which can asymptotically approach Maximum-likelihood (ML) performance with proper parameter selections. Simulation results demonstrate that the LE-OSD has a significantly reduced complexity compared to OSD, especially for low-rate codes, that usually require high decoding order in OSD. Nevertheless, the complexity reduction can also be observed for high-rate codes. In addition, we further improve LE-OSD by applying the decoding stopping condition and the TEP discarding condition. As shown by simulations, the improved LE-OSD has a considerably reduced complexity while maintaining the BLER performance, compared to the latest OSD approaches from literature. [ABSTRACT FROM AUTHOR]

In conventional molecular communication (MC) systems, the signaling molecules used for information transmission are stored, released, and then replenished by a transmitter (TX). However, the replenishment of signaling molecules at the TX is challenging in practice. Furthermore, in most envisioned MC applications, e.g., in the medical field, it is not desirable to insert the TX into the MC system, as this might impair natural biological processes. In this paper, we propose the concept of media modulation based MC where the TX is placed outside the channel and utilizes signaling molecules already present inside the system. The signaling molecules can assume different states which can be switched by external stimuli. Hence, in media modulation based MC, the TX modulates information into the state of the signaling molecules. In particular, we exploit the group of photochromic molecules, which undergo light-induced reversible state transitions, for media modulation. We study the usage of these molecules for information transmission in a three-dimensional duct system, which contains an eraser, a TX, and a receiver for erasing, writing, and reading of information via external light, respectively. We develop a statistical model for the received signal which accounts for the distribution of the signaling molecules in the system, the initial states of the signaling molecules, the reliability of the state control mechanism, the randomness of irrepressible, spontaneous state switching, and the randomness of molecule propagation. We adopt a maximum likelihood detector and show that it can be reduced to a threshold based detector. Furthermore, we derive analytical expressions for the optimal threshold value and the resulting bit error rate (BER), respectively. Both the statistical model and BER results are verified by computer simulations. Our results reveal that media modulation enables reliable information transmission, validating it as a promising alternative to MC based on molecule emitting TXs. [ABSTRACT FROM AUTHOR]

Adaptive imagesteganography embeds secret messages into areas of cover images with complex features, including rich edges and complex textures. In this article, an adaptive image steganography technique based on the edge and complex texture areas of images is proposed, by comprehensively considering three rules in the design of image steganography. First, the embedding area is composed of the edge and complex texture areas of images, according to the complexity-first rule. Edge detection is realized by an improved fuzzy enhancement function, optimized by the grey wolf optimizer to detect both the weak and strong edges. Second, the minimum average classification error rate is used to assess the choice of the complex texture areas. Third, under the spreading rule, two different average filters and one KerBohme filter are used to design the cost function in the embedding areas. Finally, confidential information is adaptively embedded through syndrome-trellis codes. Experimental results show that the proposed algorithm outperforms seven classical adaptive image steganography algorithms on two steganalytic feature sets. The performance improvement is particularly significant when the payload is large. [ABSTRACT FROM AUTHOR]

A scalable, non-multiplexed cryogenic 14-nm FinFET quantum bit (qubit) state controller (QSC) for use in the semi-autonomous control of superconducting transmon qubits is reported. The QSC includes an augmented general-purpose digital processor that supports waveform generation and phase rotation operations combined with a low-power current-mode single sideband upconversion ${I}/{Q}$ mixer-based RF arbitrary waveform generator (AWG). Implemented in the 14-nm CMOS FinFET technology, the QSC generates control signals in its target 4.5–5.5-GHz-frequency range, achieving an spurious free dynamic range (SFDR) > 50 dB for a signal bandwidth of 500 MHz. With the controller operating in the 4 K stage of a cryostat and connected to a transmon qubit in the cryostat’s millikelvin stage, measured transmon $T_{1}$ and $T_{2}$ coherence times were 75.7 and 73 $\mu \text{s}$ , respectively, in each case comparable to results achieved using conventional room temperature (RT) controls. In further tests with transmons, a qubit-limited error rate of 7.76 × 10−4 per Clifford gate is achieved, again comparable to the results achieved using RT controls. The QSC’s maximum RF output power is −18 dBm, and power dissipation per qubit under active control is 23 mW. [ABSTRACT FROM AUTHOR]

Text entry is a frequently used task in virtual reality (VR) applications, and controller is the most common interactive device in current VR systems. However, in terms of typing speed, there is still a gap between the existing controller-based text entry techniques and using a physical keyboard in reality, so it is important to improve the efficiency of the controller-based text entry. In this paper, we introduce Flower Text Entry, a single-controller text entry method based on a newly designed flower-shaped keyboard using hand 3D translation interaction for letters selection. We conduct user studies to optimize the keyboard design and the mapping between the interaction and selection, so as to evaluate our method. The results show that our method has high typing speed, lower error rate, and is very friendly to novices compared with the state-of-the-art controller-based text entry methods. After a short training, the novice group can type at 17.65 words per minute (WPM), and the potential expert group can type at 22.97 WPM. The highest typing speed is up to 30.80 WPM achieved by a potential expert participant. [ABSTRACT FROM AUTHOR]

Extensive research efforts are being carried out to evaluate and improve the reliability of computing devices either through beam experiments or simulation-based fault injection. Unfortunately, it is still largely unclear to which extend fault injection can provide an accurate error rate estimation at early stages and if beam experiments can be used to identify the weakest resources in a device. The importance and challenges associated with a timely, but yet realistic reliability evaluation grow with the increase of complexity in both the hardware domain, with the integration of different types of cores in an SoC (System-on-Chip), and the software domain, with the OS (operating system) required to take full advantage of the available resources. In this paper, we combine and analyze data gathered with extensive beam experiments (on the final physical CPU hardware) and microarchitectural fault injections (on early microarchitectural CPU models). We target a standalone Arm Cortex-A5 CPU and an Arm Cortex-A9 CPU integrated into an SoC and evaluate their reliability in bare-metal and Linux-based configurations. Combining experimental data that covers more than 18 million years of device time with the result of more than 176,000 injections we find that both the SoC integration and the presence of the OS increase the system DUEs (Detected Unrecoverable Errors) rate (for different reasons) but do not significantly impact the SDCs (Silent Data Corruptions) rate which is solely attributed to the CPU core. Our reliability analysis demonstrates that even considering SoC integration and OS inclusion, early, pre-silicon microarchitecture-level fault injection delivers accurate SDC rates estimations and lower bounds for the DUE rates. [ABSTRACT FROM AUTHOR]

In this work, we study linear error-correcting codes against adversarial insertion-deletion (insdel) errors, a topic that has recently gained a lot of attention. We construct linear codes over $\mathbb {F}_{q}$ , for $q= {\mathrm {poly}}(1/\varepsilon)$ , that can efficiently decode from a $\delta $ fraction of insdel errors and have rate $(1-4\delta)/8-\varepsilon $. We also show that by allowing codes over $\mathbb {F}_{q^{2}}$ that are linear over $\mathbb {F}_{q}$ , we can improve the rate to $(1-\delta)/4-\varepsilon $ while not sacrificing efficiency. Using this latter result, we construct fully linear codes over $\mathbb {F}_{2}$ that can efficiently correct up to $\delta < 1/54$ fraction of deletions and have rate $R = (1-54\cdot \delta)/1216$. Cheng et al. (2021) constructed codes with (extremely small) rates bounded away from zero that can correct up to a $\delta < 1/400$ fraction of insdel errors. They also posed the problem of constructing linear codes that get close to the half-Singleton bound [proved in Cheng et al. (2021)] over small fields. Thus, our results significantly improve their construction and get much closer to the bound. [ABSTRACT FROM AUTHOR]

In this paper, we propose a novel deep Efficient Relational Sentence Ordering Network (referred to as ERSON) by leveraging pre-trained language model in both encoder and decoder architectures to strengthen the coherence modeling of the entire model. Specifically, we first introduce a divide-and-fuse BERT (referred to as DF-BERT), a new refactor of BERT network, where lower layers in the improved model encode each sentence in the paragraph independently, which are shared by different sentence pairs, and the higher layers learn the cross-attention between sentence pairs jointly. It enables us to capture the semantic concepts and contextual information between the sentences of the paragraph, while significantly reducing the runtime and memory consumption without sacrificing the model performance. Besides, a Relational Pointer Decoder (referred to as RPD) is developed, which utilizes the pre-trained Next Sentence Prediction (NSP) task of BERT to capture the useful relative ordering information between sentences to enhance the order predictions. In addition, a variety of knowledge distillation based losses are added as auxiliary supervision to further improve the ordering performance. The extensive evaluations on Sentence Ordering, Order Discrimination, and Multi-Document Summarization tasks show the superiority of ERSON to the state-of-the-art ordering methods. [ABSTRACT FROM AUTHOR]

In this paper, we provide the design and implementation of UOIT, a text entry method optimized for smartwatches. UOIT uses only one page where a user can see and tap directly for entry without any additional actions, such as zoom-in/zoom-out and swipes, which are required in the existing entry methods. To fully utilize the constrained screen space and to address the “fat finger” problem, we use a technique called “drawing-like typing”, which reduces the 26 small alphabetic keys into 13 large keys with a dual input property. To evaluate the performance of UOIT, we conducted two user studies while varying the learning period. In the short-term experiments (i.e., two days), we observed a fast learning curve of users when using the UOIT keyboard. Moreover, with the long-term experiments (i.e., a month), we show that users can type as fast as QWERTY keyboard but with much less errors. Moreover, UOIT outperforms the state-of-the-art keyboard in both speed and error rate. [ABSTRACT FROM AUTHOR]

This article presents design techniques for a PAM-4 baud-rate digital clock and data recovery (CDR) circuit utilizing a stochastic phase detector (SPD). The proposed baud-rate phase detector (PD) is designed in an inductive and stochastic way, so there is a clear difference from the existing deductive and logical method used in sign-sign Mueller–Müller PD (SS-MMPD), a representative baud-rate PD. By collecting the histograms of the sequential PAM-4 patterns under EARLY and LATE sampling phases and calculating optimal weights, the SPD exhibits optimized phase-locking characteristic that maximizes the PAM-4 vertical eye opening (VEO) compared with the conventional logical approaches. In addition, unlike SS-MMPD, which may suffer from a severe multiple-locking problem, the SPD tracks a unique and optimal sampling phase even with an adaptive decision-feedback equalizer (DFE). For verification, a prototype PAM-4 receiver is fabricated in 40-nm CMOS technology and occupies 0.24 mm2. Tested with PRBS-7 patterns, it achieves a bit error rate (BER) of less than $10^{-11}$ and energy efficiency of 2.4 pJ/b at 48 Gb/s. [ABSTRACT FROM AUTHOR]

In this article, we propose a duobinary transceiver for graphics double-data-rate (GDDR) memory interfaces. The proposed voltage-mode driver complies with the GDDR impedance specifications without sacrificing the ratio of level mismatch (RLM). The quarter-rate time-interleaved successive approximation duobinary receiver (Rx) reduces the forwarded clock frequency and minimizes the capacitive loading of the front-end analog equalizer (EQ). To compensate for the channel loss, the transmitter is composed of a three-tap feed-forward EQ, and the Rx employs a continuous-time linear EQ. Also, an EQ adaptation scheme applicable to duobinary signaling is proposed. The transceiver achieves a 10−12 bit error rate at 21 Gb/s with 1.42 mW/Gb. [ABSTRACT FROM AUTHOR]

Finding top- $k$ k frequent items has been a hot issue in databases. Finding top- $k$ k persistent items is a new issue, and has attracted increasing attention in recent years. In practice, users often want to know which items are significant, i.e., not only frequent but also persistent. No prior art can address both of the above two issues at the same time. Also, for high-speed data streams, prior art cannot achieve high accuracy when the memory is tight. In this paper, we define a new issue, named finding significant items, and propose a novel algorithm namely LTC to address this issue. It includes two key techniques, Long-tail Restoring and CLOCK, as well as three optimizations. In addition, LTC is extended to support finding significant items with thresholds. We theoretically derive the correct rate and error bound, and conduct extensive experiments on three real datasets to test the performance of LTC. Our experimental results show that LTC can achieve $10^5$ 10 5 times higher accuracy in terms of average relative error than other related algorithms. Lastly, LTC is applied to a DDoS detection task and it shows that finding significant items is more powerful than finding frequent items. [ABSTRACT FROM AUTHOR]

Memristors hold promise for efficient digital computing and information storage due to their nanoscale size and nonvolatile storage capability. However, the randomness of the area formed by the conductive filaments (CFs) causes unstable switching parameters of the memristor. In this study, a new double-layer structure with Ag/HfO2/black phosphorus/Pt was designed on a silicon substrate to improve the performance of the memristor. The results show that the devices have highly stable state switching and concentrated resistance distribution characteristics, better retention capacity, and better endurance. In addition, we designed one transistor–one memristor (1T–1M) structure based on the performance of the memristor and used it to calculate the Hamming weight (HW) of the binary string. The results show that the average error of the current values is only 1.04% and 1.01% for the 4- and 8-bit binary strings, respectively, and that there is an excellent linear fit between the output current and the HWs. The error rate and calculation stability are better than the existing calculation methods. This work provides new ideas in efficient physical computing and applications in areas such as information coding. [ABSTRACT FROM AUTHOR]

In this brief, a novel optically-reconfigurable physical unclonable function (OR-PUF) is presented for CMOS dynamic vision sensor (DVS). By utilizing the in-pixel logarithmic photoreceptor’s spatial photoresponse nonuniformity (PRNU) as the entropy source, raw physical unclonable function (PUF) bits having high reliability and randomness can be generated with monochromatic illumination in visible spectrum. In addition, the proposed OR-PUF can be reconfigured to new challenge-response-pair (CRP) spaces under the illumination with different visible wavelengths. Moreover, the proposed implementation is validated by prototype chips fabricated using a 0.18- $\mu \text{m}$ standard CMOS process. Featuring excellent randomness by passing the widely-adopted National Institute of Standards and Technology (NIST) and autocorrelation function (ACF) test tools, the fabricated PUF chips exhibit a uniqueness of 49.37% and a worst case bit error rate (BER) of 1.93% under the voltage–temperature (VT) range of 0 °C–80 °C and 1.65–2.2 V. [ABSTRACT FROM AUTHOR]

The paper presents several novel residual recurrent neural network (RNN) models for digital predistortion of radio-frequency power amplifiers. Then, unstructured and structured neural network (NN) pruning algorithms are proposed to reduce the per-sample computational complexity and the required memory, without compromising their modeling performance. The mathematical equations of the complexity and the memory are derived to analyze the hardware cost and design low cost models. An experimental platform is developed to measure the modeling performance in terms of adjacent channel leakage ratio (ACLR), normalized mean square error, error vector magnitude (EVM) and bit error rate. The platform uses an envelope tracking PA excited by 80 MHz IEEE 802.11ac signals. Compared with the state-of-the-art RNN model in (Sun et al., 2019), the proposed models reduce the per-sample complexity and required memory by $94\hbox{--}99$ %, they also improve the ACLR and EVM by at least 3 dB and 1 dB at 0.45 dB and 3.15 dB gain compression, respectively. Furthermore, an observation path with time alignment is used to remove the transmit latency in the state-of-the-art approach. At 3.15 dB gain compression, the proposed models outperform the state-of-the-art feedforward and convolutional NN models by at least 1.3 dB in EVM, outperform the general memory polynomial model by at least 3.3 dB in EVM. The above evidences indicate that the proposed RNN models can be implemented with relatively low hardware cost and achieve the best EVM in high power efficiency scenario. [ABSTRACT FROM AUTHOR]

A fundamental challenge in learning is the presence of nonlinear redundancies and dependencies in the data. To address this, we propose a Fourier-based approach to characterize feature redundancies, in unsupervised learning, and feature-label dependencies, in the supervised variant of the problem. We first develop a novel Fourier expansion for functions (more generally stochastic mappings) of correlated binary random variables. This is a generalization of the standard Fourier expansion on the Boolean cube beyond product probability spaces. As an important application of this analysis, we investigate learning with feature subset selection. In the unsupervised variant of this problem, we characterize feature redundancies via the Shannon entropy and group the features into sufficiently informative and redundant. Then, we make a connection to the proposed Fourier expansion and derive an upper bound on the joint entropy. Based on that, we propose a measure to quantify feature redundancies and present an unsupervised learning algorithm. We test our method on various real-world and synthetic datasets and demonstrate improvements on conventional unsupervised feature selection techniques. Then, we investigate the supervised feature subset selection and reformulate it in the Fourier domain. Bridging the Bayesian error rate with the Fourier coefficients, we demonstrate that the Fourier expansion provides a powerful tool to characterize nonlinear feature-label dependencies. Further, we introduce a computationally efficient measure for selecting relevant features. Via a theoretical analysis, we show that our proposed measure finds provably asymptotically optimal feature subsets. Lastly, we present an algorithm based on this measure and via numerical experiments demonstrate its improvements on various supervised feature selection algorithms. [ABSTRACT FROM AUTHOR]

This article considered the persistent real-time localization problem of dynamic multiagent systems with repetitive running characteristics under directed graph. The trajectory length of the agent is randomly varying caused by system constraints and external environment. A novel distributed iterative learning localization estimation method with full historical average data compensation is designed. The average value of all available historical data in the previous operations is used to compensate the incomplete trajectory. The designed diagnosis mechanism and search mechanism are used to determine whether the agent has stopped running and to screen out the available historical data. In order to reduce the computation burden, an improved distributed localization algorithm with receding horizon historical average data compensation is proposed. The asymptotic convergence of the estimation algorithms in the sense of mathematical expectation is derived through the rigorous analysis. Meanwhile, the influence of the incomplete repetitive trajectory of the agent on estimation error and convergence rate is also analyzed. The experimental result based on QBot-2e robot platform verifies the realizability of the proposed method. [ABSTRACT FROM AUTHOR]

Linear companding transform (LCT) is one of the most attractive schemes to deal with the inherent problem of high peak-to-average power ratio (PAPR) in orthogonal frequency division multiplexing (OFDM) systems, due to its effectiveness and low complexity. In this paper, a generalized continuous piecewise linear companding (CPLC) transform is proposed. The companding and decompanding functions of the proposed scheme consist of multiple continuous linear segments, and the total number of segments is generalized to be any integer not less than four. These linear segments can provide much adaptability for function shaping, leading to high flexibility for performance tradeoffs among PAPR reduction, bit error rate (BER), out-of-band (OOB) rejection and algorithmic complexity. The continuity of the companding function helps to reduce OOB radiations. Several optimization problems with different targets under the constraint condition of constant average power are constructed. Permissible ranges of key parameters, relationships among these parameters and their influence on algorithmic performance are analyzed. Parameter selecting strategies are also provided. In addition, an iterative receiving method is designed to reduce system BER effectively at the receiver. Simulation results validate the performance superiorities of the proposed scheme to that of other typical companding schemes. [ABSTRACT FROM AUTHOR]

Transition curvature limits the performance of heat-assisted magnetic recording (HAMR), especially when bit length (BL) is reduced below 10 nm. In this article, in order to quantify this issue, the dependence of signal-to-noise ratios (SNRs) and bit error rates (BERs) on HAMR transition curvatures is investigated utilizing previously obtained curvature values. An artificial recording method is used and a Viterbi algorithm is applied to decode the readback signals and calculate BERs. A pseudorandom binary sequence (PRBS) is used. Two BLs are tested: 7.5 and 8.5 nm. Different reader widths (RWs), shield-to-shield distances, and magnetic fly heights are studied in order to seek optimized reader configurations. Generally, transition curvatures have a negative effect on SNR and BER performance, but this effect can be mitigated by the reduction of certain reader dimensions. [ABSTRACT FROM AUTHOR]

In this work, we study the performance of a reconfigurable intelligent surface (RIS)-aided unmanned aerial vehicle (UAV) system where an RIS is installed on a UAV to reflect the signal to the ground user from the sky. More specifically, we present two different methods to denote the probability density functions (PDFs) of the instantaneous signal-to-noise ratio (SNR). With these two distributions, closed-form expressions for the outage probability, average bit error rate (BER), and average sum-rate are derived, respectively. Additionally, we develop the analysis on the optimal UAV altitude and location. Finally, numerical results are given to verify our analysis. [ABSTRACT FROM AUTHOR]

Recently, semantic communication has been brought to the forefront because deep learning (DL)-based methods, such as Transformer, have achieved great success in semantic extraction. Although semantic communication has been successfully applied in sentence transmission to reduce semantic errors, the existing architecture is usually fixed in terms of codeword length and inefficient and inflexible for varying sentence lengths. In this study, we exploit hybrid automatic repeat request (HARQ) to reduce the semantic transmission error further. We combine semantic coding (SC) with Reed-Solomon (RS) channel coding and HARQ (called SC-RS-HARQ). SC-RS-HARQ exploits the superiority of SC and the reliability of conventional methods successfully. Although SC-RS-HARQ can be easily applied in existing HARQ systems, we also develop an end-to-end architecture called SCHARQ to pursue enhanced performance. Numerical results demonstrate that SCHARQ significantly reduces the required number of bits for semantic sentence transmission and the sentence error rate. We also attempt to replace error detection from cyclic redundancy check to a similarity detection network called Sim32 to allow the receiver to reserve wrong sentences with similar semantic information and conserve transmission resources. [ABSTRACT FROM AUTHOR]

In this article, we explore the relationship between an equalizer and a combiner operating on the available polarization states of a received signal in aeronautical mobile telemetry. The maximum likelihood combiner is derived and shown to be equivalent to summing the outputs of two filters matched to the channels in the horizontal and vertical polarization states. For historical reasons, current systems combine right-hand and left-hand circularly polarized antenna feed outputs using a maximum ratio combiner. To compare the two combining approaches, the aeronautical telemetry multipath channel is extended to include polarization state information. The channel extension is used in computer simulations. The simulations results for SOQPSK-TG with a constant modulus algorithm equalizer show that the postequalizer bit error rate for the two approaches is the same. [ABSTRACT FROM AUTHOR]

The use of space-time coded ARTM continuous phase modulation to solve the two-antenna problem in aeronautical mobile telemetry requires estimates of the parameters that define the propagation environment. The maximum likelihood estimator problem is defined and used to motivate reduced-complexity estimators suitable for use in a real system. A modified gradient descent algorithm performs the search required to find the delay parameters. An “inner” phase-lock loop operating with an “outer” frequency-lock loop computes decision-directed estimates of the frequency offset. Computer simulations were used to assess the impact on bit error rate performance introduced by the estimators. The simulation results show that the combined joint estimator for the delays, channel gains, and frequency offset imposes a 1.15-dB loss in performance. [ABSTRACT FROM AUTHOR]

Timely anomaly detection of key performance indicators (KPIs), e.g., service response time, error rate, is of utmost importance to Web services. Over the years, many unsupervised deep learning-based anomaly detection approaches have been proposed. To achieve good performance, they require a long period of KPI data for model training, which is not easy to guarantee with frequent service changes. Additionally, the training overhead is too significant for the vast number of KPIs in large-scale Web services. To address the problems, we propose an unsupervised KPI anomaly detection approach, named AnoTransfer, by combining a novel Variational Auto-Encoder (VAE)-based KPI clustering algorithm with an adaptive transfer learning strategy. Extensive evaluation experiments using real-world data collected from several large-scale Web service providers demonstrate that AnoTransfer reduces the average initialization time by 65.71% and improves the training efficiency by 50.62 times, without significantly degrading anomaly detection accuracy. [ABSTRACT FROM AUTHOR]

We propose a new end-to-end architecture for automatic speech recognition that expands the “listen, attend and spell” (LAS) paradigm. While the main word-predicting network is trained to predict words, the secondary, speller network, is optimized to predict word spellings from inner representations of the main network (e.g. word embeddings or context vectors from the attention module). We show that this joint training improves the word error rate of a word-based system and enables solving additional tasks, such as out-of-vocabulary word detection and recovery. The tests are conducted on LibriSpeech dataset consisting of 1000 h of read speech. [ABSTRACT FROM AUTHOR]

Classical fuzzy rough set often uses fuzzy rough dependency as an evaluation function of feature selection. However, this function only retains the maximum membership degree of a sample to one decision class, it cannot describe the classification error. Therefore, in this article, a novel criterion function for feature selection is proposed to overcome this weakness. To characterize the classification error rate, we first introduce a class of irreflexive and symmetric fuzzy binary relations to redefine the concepts of fuzzy rough approximations. Then, we propose a novel concept of dependency: inner product dependency to describe the classification error and construct a criterion function to evaluate the importance of candidate features. The proposed criterion function not only can maintain a maximum dependency function, but also guarantees the minimum classification error. The experimental analysis shows that the proposed criterion function is effective for datasets with a large overlap between different categories. [ABSTRACT FROM AUTHOR]

Driven by the trends of emerging technologies in on-chip memories, with increasing the size of last-level caches (LLCs), spin-transfer torque magnetic random access memories (STT-MRAMs) are the most promising alternative technology among the non-volatile memories (NVMs) to replace SRAMs. Despite their high density, scalability, and near-zero leakage power, the reliability of STT-MRAM LLCs is threatened by a high error rate due to their stochastic switching behavior. The error rate is highly influenced by the cache management, which necessitates redesigning the cache replacement policy based on the error behavior. In this article, we propose an error-aware cache replacement policy, namely, conditional replacement policy (CRP), to improve the reliability of STT-MRAM caches by decreasing the rate of both read disturbance and write failure. This is ascertained by nominating an appropriate data block in the cache to be replaced with an incoming data block, considering the minimum error rate. Moreover, the performance and latency of both write and read operations are considered. The simulation results show that compared with the state-of-the-art replacement policy in STT-MRAM caches, CRP reduces the total error rate by 68%. In addition, the proposed policy enhances the performance by 2% and saves energy consumption by 19%, on average. Meanwhile, the total number of writes is decreased by 41% compared with the previous scheme. [ABSTRACT FROM AUTHOR]

We investigate user activity detection (UAD) and symbol detection (SD) for grant-free communication in the presence of massive users that are actively connected to base station (BS), where a small portion of to-be-connected users wake up in a burst. The number of effective interfering connected users is reduced to only one, by applying a preconditioning matrix to the received signals from multiple antennas at BS. Subsequently, an iterative UAD and SD scheme is applied, where the priori information about the remaining interfering user is exploited and the symbols of the burst users as well as the signature connected user are simultaneously detected by iterative exchanging of the soft information of user activity and symbols. The proposed system outperforms the existing work in terms of the success rate of UAD and bit error rate. [ABSTRACT FROM AUTHOR]

Logic locking is a design-for-security scheme to thwart attacks by an untrusted foundry. Prior work exposed the vulnerability of logic-locked circuits using Boolean satisfiability (SAT). While these attacks are effective against deterministic circuits, they cannot unlock probabilistic/approximate designs, which have become increasingly popular. In this work, we expand SAT-style attacks to locked circuits with a probabilistic behavior. We propose StatSAT, an attack incorporating statistical techniques into the SAT attack to unlock probabilistic designs. We then propose a countermeasure, called high error rate keys (HERKs), to thwart StatSAT and other attacks on probabilistic circuits. HERKs leverage high error wires, caused by the probabilistic behavior, to hide the correct key under stochastic noise. [ABSTRACT FROM AUTHOR]

We investigate multiuser detection under uplink asynchronous scenario, where the triangular successive interference cancellation (T-SIC) detection scheme is exploited. As the existing analysis was conducted under some ideal assumptions for simplicity, the asynchronous scenario is analyzed under rigorous assumptions in this paper so that important insights are revealed for practical systems. Specifically, the average symbol error rate (SER) formulas are derived for a two-user system with arbitrary $M$ -ary quadrature amplitude modulation ($M$ -QAM) over Rayleigh fading channels. These solutions are shown to have higher accuracies compared to the existing solutions. Furthermore, a novel iterative detection algorithm is proposed, i.e., the parallel T-SIC method, which is more efficient and effective compared to the iterative T-SIC method. Insightful discussion is conducted in terms of the potentials of the concerned iterative detection method. Simulation results show that the most significant improvement of the iterative detection reflects on the SER for the strongest user, and the reduction is always within 50% of the SER compared to the primary detection. The gains obtained by the iterative detection is negligible for higher order $M$ -QAM cases. [ABSTRACT FROM AUTHOR]

This paper proposes a novel data driven framework for detecting topology transitions in a distribution network. The framework analyzes data from phasor measurement units (PMUs) and relies on the fact that changes in network topology results in changes in the structure and admittance of the network. Using voltage and current phasors recorded by PMUs, the proposed method approximates network parameters using an ensemble-based deep learning model and thus, it does not require any knowledge of network parameters and load models. Using the prediction error of the proposed model, a connectivity matrix which shows the status of switches is constructed. In contrast to other methods, this proposed framework does not require a library of voltage and current transients associated with possible network transitions. It can also detect simultaneous switching actions and is robust to noise and load variations. The model yields a lower error detection rate, and its performance is validated using a modified version of the IEEE 33 bus network and a real feeder located in Queensland, Australia, under full and partial observability conditions. The proposed model has also been compared with another data driven method in terms of inference time and error detection rates. [ABSTRACT FROM AUTHOR]

To distinguish underwater images from natural images is one of the challenge of collecting and generation of underwater image data. Common image classification and recognition models classify the objects in an image depending on the saliency while suppressing the background. In this article, an inception–attention network (IA-Net), a convolutional neural network (CNN)-based model to classify the underwater images from natural images is reported, in which an inception–attention (I-A) module is constructed to simulate the visual correlation mechanism of classifying images taken from special environments such as fog, nighttime and under water. It is illustrated that the context background is as important as the salient object when understanding the underwater images. We executed experiments on a data set, which consists of 4000 underwater images and 5000 nonunderwater images, and demonstrate that the proposed IA-Net achieves an accuracy of 99.3 $\%$ on underwater image classification, which is significantly better than classical image classification networks, such as AlexNet, InceptionV3, and ResNet. In addition, the comparative experiments prove that the IA-Net is superior to other networks when distinguishing underwater images from foggy, nighttime images and fish images taken in nonunderwater environments, although these images have indistinguishable characteristics with underwater images. Moreover, we demonstrate the I-A structure we proposed can be used to boost the performance of the existing object recognition networks. By substituting the inception module with the I-A module, the Inception-ResNetV2 network achieves a 10.7 $\%$ top-1 error rate on the subset of ILSVRC-2012, which further illustrates the effectiveness of the correlation between the image background and subjective perception in improving the performance of the visual analysis tasks. [ABSTRACT FROM AUTHOR]

Secret key generation (SKG) is a fundamental signal processing problem for security applications including wireless network security and biometric template security. For SKG, a pair (or more) of highly correlated secret vectors (SVs) need to be respectively quantized into a pair (or more) of almost identical sequences of binary bits (i.e., keys). The literatures on SKG in the wireless community almost uniformly default on a direct quantization on SVs. On the other hand, many works on biometric template security advocate a quantization on the output of a one-way function of SVs. In this paper, we present a generalized approach for SKG called continuous encryption before quantization (CEbQ). By CEbQ, a pair of SVs of limited dimension are first transformed by a continuous encryption function into a pair of sequences of quasi-continuous pseudorandom numbers (QCPRNs) of any desired length, and then these QCPRNs are quantized into keys. We show that CEbQ can yield a much lower key error rate than direct quantization subject to standardized randomness tests. Comparisons with other methods are also provided. [ABSTRACT FROM AUTHOR]

Change-point analysis is thriving in this Big Data era to address problems arising in many fields where massive data sequences are collected to study complicated phenomena over time. It plays an important role in processing these data by segmenting a long sequence into homogeneous parts for follow-up studies. The task requires the method to be able to process large datasets quickly and deal with various types of changes for high-dimensional data. We propose a new approach making use of approximate $k$ -nearest neighbor information from the observations, and derive an analytic formula to control the type I error. The time complexity of our proposed method is $O(dn(\log n+k \log d)+nk^{2})$ for an $n$ -length sequence of $d$ -dimensional data. The test statistic we consider incorporates a useful pattern for moderate- to high- dimensional data so that the proposed method could detect various types of changes in the sequence. The new approach is also asymptotic distribution free, facilitating its usage for a broader community. We apply our method to fMRI datasets and Neuropixels datasets to illustrate its effectiveness. [ABSTRACT FROM AUTHOR]

In this article, a novel training set optimization method in an artificial neural network (ANN) constructed for high bandwidth interconnects design is proposed based on rigorous probability analysis. In general, the accuracy of an ANN is enhanced by increasing training set size. However, generating large training sets is inevitably time-consuming and resource-demanding, and sometimes even impossible due to limited prototypes or measurement scenarios. Especially, when the number of channels in required design are huge such as graphics double data rate (GDDR) memory and high bandwidth memory (HBM). Therefore, optimizing the training set selection process is crucial to minimizing the training datasets for developing an efficient ANN. According to rigorous mathematical analysis of the uniformity of the training data by probability distribution function, optimization flow of the range selection is proposed to improve accuracy and efficiency. The optimal number of training data samples is further determined by studying the prediction error rates. The performance of the proposed method in terms of accuracy is validated by comparing the scattering parameters of arbitrarily chosen strip and microstrip type GDDR interconnects obtained from EM simulations with those predicted by ANNs using default and the proposed training-set selection methods. [ABSTRACT FROM AUTHOR]

Recent development in memory technologies has introduced Spin-Transfer Torque Magnetic RAM (STT-MRAM) as the most promising replacement for SRAMs in on-chip cache memories. Besides its lower leakage power, higher density, immunity to radiation-induced particles, and non-volatility, an unintentional bit flip during read operation, referred to as read disturbance error, is a severe reliability challenge in STT-MRAM caches. One major source of read disturbance error in STT-MRAM caches is simultaneous accesses to all tags for parallel comparison operation in a cache set, which has not been addressed in previous work. This article first demonstrates that high read accesses to tag array extremely increase the read disturbance rate and then proposes a low-cost scheme, so-called Read Disturbance Rate Reduction in STT-MRAM Caches by Selective Tag Comparison (3RSeT), to reduce the error rate by eliminating a significant portion of tag reads. 3RSeT proactively disables the tags that have no chance for hit, using low significant bits of the tags on each access request. Our evaluations using gem5 full-system cycle-accurate simulator show that 3RSeT reduces the read disturbance rate in the tag array by 71.8 percent, which results in 3.6x improvement in $Mean~Time~To~Failure$ M e a n T i m e T o F a i l u r e (MTTF). In addition, the energy consumption is reduced by 62.1 percent without compromising performance and with less than 0.4 percent area overhead. [ABSTRACT FROM AUTHOR]

The joint transmission scheme of polar codes and sparse code multiple access (SCMA) has been regarded as a promising technology for future wireless communication systems. However, most of the existing polar-coded SCMA (PC-SCMA) systems suffer from high latency caused by the feedback iteration and list decoding. In addition, the error performance of PC-SCMA systems is unsatisfactory for ultra-reliable transmission. Inspired by the compelling benefits of non-binary polar codes, in this paper, we design a non-binary polar-coded SCMA (NB-PC-SCMA) system with a free order matching strategy to address the issues of delay and reliability. Specifically, we first formulate a joint factor graph for NB-PC-SCMA and propose a non-binary successive cancellation list (NB-SCL) and damping based joint iterative detection and decoding (NSD-JIDD) multiuser receiver to improve the BER and latency performance. Then, a lazy-search based NB-SCL (L-NB-SCL) decoding is proposed to reduce the computational complexity by simplifying the path search pattern of the list decoder. After that, we modify the update of user nodes for SCMA detection to improve the convergence error and finally propose the improved NSD-JIDD (ISD-JIDD) algorithm, which can avoid redundant operations by exploiting L-NB-SCL decoding. Simulation results show that the proposed NB-PC-SCMA system achieves better bit error rate (BER) performance and considerable latency gain when compared to its counterparts. In particular, the proposed ISD-JIDD can achieve similar BER performance of NSD-JIDD with less complexity. [ABSTRACT FROM AUTHOR]

Soft-Input Soft-Output (SISO) polar decoding algorithms, such as Belief Propagation (BP) and Soft Cancellation (SCAN) polar decoding, offer iteration capability for facilitating turbo-style detection. However, at lower Signal-to-Noise Ratios (SNRs), the performance of the BP and SCAN decoders is about 1.5 dB and 0.5 dB worse than that of the state-of-the-art hard-decision Successive Cancellation List (SCL) decoding algorithm, respectively, despite iteratively exchanging information with a Multiple Input Multiple Output (MIMO) detector. Motivated by this gap, we conceive a novel G-SCAN polar decoder, which generates both soft-decision and hard-decision outputs. This is achieved by intrinsically amalgamating a list decoder with a novel SISO decoder. These soft-decision outputs may be used for turbo-detection, but they also support the hard-decision outputs of the SCL algorithm for achieving superior block error rate (BLER) performance. As a result of these benefits, the proposed G-SCAN algorithm using a list size of $L = 2$ offers around 1 dB BLER gain compared to the conventional hard-decision SCL decoder relying on $L = 32$. Furthermore, we have carried out its Extrinsic Information Transfer (EXIT) chart analysis, and characterized the performance vs. the complexity of the proposed G-SCAN algorithm, and compared it to various soft- and hard-decision output benchmarks for a wide variety of different rate-matching modes and block lengths. Furthermore, in order to reduce the complexity of the proposed algorithm, a novel Cyclic Redundancy Check (CRC)-aided G-SCAN algorithm is also proposed, which facilitates early termination and improves the BLER performance. [ABSTRACT FROM AUTHOR]