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A 21-Gb/s Duobinary Transceiver for GDDR Interfaces With an Adaptive Equalizer.
- Source :
- IEEE Journal of Solid-State Circuits; Oct2022, Vol. 57 Issue 10, p3083-3093, 11p
- Publication Year :
- 2022
-
Abstract
- In this article, we propose a duobinary transceiver for graphics double-data-rate (GDDR) memory interfaces. The proposed voltage-mode driver complies with the GDDR impedance specifications without sacrificing the ratio of level mismatch (RLM). The quarter-rate time-interleaved successive approximation duobinary receiver (Rx) reduces the forwarded clock frequency and minimizes the capacitive loading of the front-end analog equalizer (EQ). To compensate for the channel loss, the transmitter is composed of a three-tap feed-forward EQ, and the Rx employs a continuous-time linear EQ. Also, an EQ adaptation scheme applicable to duobinary signaling is proposed. The transceiver achieves a 10−12 bit error rate at 21 Gb/s with 1.42 mW/Gb. [ABSTRACT FROM AUTHOR]
- Subjects :
- ERROR rates
CLOCKS & watches
TIME-frequency analysis
TRANSMITTERS (Communication)
Subjects
Details
- Language :
- English
- ISSN :
- 00189200
- Volume :
- 57
- Issue :
- 10
- Database :
- Complementary Index
- Journal :
- IEEE Journal of Solid-State Circuits
- Publication Type :
- Academic Journal
- Accession number :
- 160620744
- Full Text :
- https://doi.org/10.1109/JSSC.2022.3170439