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7 results on '"J.-P. Colonna"'

1. Physical Understanding of Program Injection and Consumption in Ultra-Scaled SiN Split-Gate Memories

Author

D. Lafond, P. Brianceau, A. De Luca, S. Pauliac, Simon Deleonibus, G. Molas, F. Aussenac, Vincent Delaye, B. De Salvo, C. Comboroure, C. Carabasse, L. Masoero, Philippe Boivin, C. Charpin, V. Della Marca, Marc Gely, J. P. Colonna, Gerard Ghibaudo, O. Cueto, Institut des Matériaux, de Microélectronique et des Nanosciences de Provence (IM2NP), Université de Toulon (UTLN)-Centre National de la Recherche Scientifique (CNRS)-Aix Marseille Université (AMU), Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Institut National Polytechnique de Grenoble (INPG)-Centre National de la Recherche Scientifique (CNRS), Aix Marseille Université (AMU)-Université de Toulon (UTLN)-Centre National de la Recherche Scientifique (CNRS), and Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut National Polytechnique de Grenoble (INPG)-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)

Subjects
010302 applied physics, Engineering, business.industry, Transistor, 020206 networking & telecommunications, 02 engineering and technology, Hardware_PERFORMANCEANDRELIABILITY, Gate voltage, 01 natural sciences, law.invention, Semiconductor storage, law, Electric field, Logic gate, 0103 physical sciences, Memory architecture, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, High electron, business, Scaling
Abstract

International audience; In this work, a detailed study of the physical mechanisms governing the Source Side Injection programming in ultra-scaled (down to 20nm) SiN split-gate memories is presented. Experimental measurements coupled to static and dynamic TCAD simulations are shown. In particular, we claim that adjusting the select gate voltage in moderate inversion allows for the optimization of the compromise between high electron injection and limited consumption. Then, we show that scaling the dimensions of the select gate can induce a higher consumption, while scaling the memory gate leads to lower programming energy (

Published
2012
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2. Investigation of charge-trap memories with AlN based band engineered storage layers

Author

P. Brianceau, L. Vandroux, Marc Gely, J. P. Colonna, D. Belhachemi, A.M. Papon, Gerard Ghibaudo, Eugénie Martinez, R. Kies, G. Molas, V. Vidal, Christophe Licitra, Marc Bocquet, B. De Salvo, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Institut National Polytechnique de Grenoble (INPG)-Centre National de la Recherche Scientifique (CNRS), and Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut National Polytechnique de Grenoble (INPG)-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)

Subjects
Materials science, 02 engineering and technology, 01 natural sciences, Electric charge, chemistry.chemical_compound, 0103 physical sciences, Materials Chemistry, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS, 010302 applied physics, Double layer (biology), business.industry, Aluminium nitride, Electrical engineering, 021001 nanoscience & nanotechnology, Condensed Matter Physics, Electronic, Optical and Magnetic Materials, chemistry, Silicon nitride, Optoelectronics, Erasure, 0210 nano-technology, business, Low voltage, Layer (electronics), Voltage
Abstract

This paper presents the investigation of the electrical properties of charge-trap memories with AlN based storage layers. The memory performance and reliability are studied in details and compared with the ones of a reference device using standard Si 3 N 4 as storage layer. An engineered charge trapping layer is also proposed, made by an AlN/Si 3 N 4 double layer, which shows reduced program/erase voltages, combined with 10 6 excellent endurance and good retention (Δ V T > 5 V after 10 years at 125 °C).

Published
2011
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3. Study of parasitic trapping in alumina used as blocking oxide for nonvolatile memories

Author

Philippe Blaise, Jean-Paul Barnes, Gabriel Molas, Marc Veillerot, Névine Rochat, J.-P. Colonna, K. Yckache, D. Lafond, Christophe Licitra, H. Grampeix, Marc Bocquet, L. Masoero, Vincent Vidal, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), and Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)

Subjects
Materials science, Hydrogen, Annealing (metallurgy), Band gap, Process Chemistry and Technology, Analytical chemistry, Oxide, chemistry.chemical_element, Surfaces, Coatings and Films, Electronic, Optical and Magnetic Materials, law.invention, chemistry.chemical_compound, Atomic layer deposition, chemistry, law, Desorption, Materials Chemistry, [SPI.GPROC]Engineering Sciences [physics]/Chemical and Process Engineering, Electrical and Electronic Engineering, Thin film, Crystallization, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Instrumentation
Abstract

International audience; Alumina layers deposited by Atomic Layer Deposition followed by Rapid Thermal anneal were characterized. We found that the crystallization of alumina in γ-phase occurs between 700 and 850°C. Optical band gap, stress and density were found to increase upon crystallization Hydrogen content in alumina was characterized by ToF-SIMS and infrared spectroscopy. We found that annealing ambience has a strong influence on hydrogen concentration: oxygen favors hydrogen desorption from alumina. Finally, charge trapping in alumina was characterized by C(V) measurements. A strong correlation between hydrogen concentration and trapping was established.

Published
2011
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4. Growth and In-line Characterization of Silicon Nanodots Integrated in Discrete Charge Trapping Non-volatile Memories

Author

E. Jalaguier, J-P. Colonna, Magali Putero, P. Maillot, Damien Deleruyelle, V. Della Marca, Ch. Muller, J. Amouroux, L. Fares, E. Petit, Philippe Boivin, Institut des Matériaux, de Microélectronique et des Nanosciences de Provence (IM2NP), Université de Toulon (UTLN)-Centre National de la Recherche Scientifique (CNRS)-Aix Marseille Université (AMU), Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), STMicroelectronics, and Aix Marseille Université (AMU)-Université de Toulon (UTLN)-Centre National de la Recherche Scientifique (CNRS)

Subjects
010302 applied physics, Materials science, Silicon, Nucleation, chemistry.chemical_element, Nanotechnology, Crystal growth, Context (language use), 02 engineering and technology, Chemical vapor deposition, 021001 nanoscience & nanotechnology, 01 natural sciences, chemistry, 0103 physical sciences, Deposition (phase transition), Wafer, Nanodot, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, 0210 nano-technology, ComputingMilieux_MISCELLANEOUS
Abstract

Non-Volatile Memories (NVM) integrating silicon nanodots (noted SDs) are considered as an emerging solution to extend Flash memories downscaling. In this alternative memory technology, silicon nanocrystals act as discrete traps for injected charges.Si-dots were grown by Low Pressure Chemical Vapor Deposition (LPCVD) on top of tunnel oxide. Depending on the pre-growth surface treatment, tunnel oxide surface may present either siloxane or silanol groups. SDs deposition relies on a 2–steps process: nucleation by SiH4 and selective growth with SiH2Cl2.In a context of technological industrialization, it is of primary importance to develop in-line metrology tools dedicated to Si-dots growth process control. Hence, silicon-dots were observed in top view by using an in-line Critical Dimension Scanning Electron Microscopy CDSEM and their average size and density were extracted from image processing. In addition, Haze measurement, generally used for bare silicon surface characterization, was customized to quantify Si-dots deposition uniformity over the wafer. Finally, Haze value was correlated to Si nanodots density and size determined by CDSEM.

Published
2011
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5. Passivated TiN nanocrystals/SiN trapping layer for enhanced erasing in nonvolatile memory

Author

G. Gay, D. Belhachemi, J. P. Colonna, S. Minoret, P. Brianceau, D. Lafond, T. Baron, G. Molas, E. Jalaguier, A. Beaurain, B. Pelissier, V. Vidal, B. De Salvo, Laboratoire des technologies de la microélectronique (LTM), Université Joseph Fourier - Grenoble 1 (UJF)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Centre National de la Recherche Scientifique (CNRS), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Joseph Fourier - Grenoble 1 (UJF)-Centre National de la Recherche Scientifique (CNRS), and Clot, Marielle

Subjects
010302 applied physics, Materials science, Physics and Astronomy (miscellaneous), Passivation, Silicon, business.industry, Analytical chemistry, chemistry.chemical_element, 02 engineering and technology, Chemical vapor deposition, 021001 nanoscience & nanotechnology, 01 natural sciences, Titanium nitride, Non-volatile memory, chemistry.chemical_compound, chemistry, X-ray photoelectron spectroscopy, Silicon nitride, 0103 physical sciences, Optoelectronics, 0210 nano-technology, business, Tin, ComputingMilieux_MISCELLANEOUS
Abstract

We present chemical vapor deposition of titanium nitride nanocrystals (ncs) on silicon nitride (SiN). Ncs are passivated in situ by a silicon shell and encapsulated in SiN. High density (3×1012 cm−2), crystalline and isolated ncs are observed by transmission electron microscopy and characterized by x-ray photoelectron spectroscopy. TiN ncs/SiN are integrated as charge trapping layer in a nonvolatile memory. Devices show large memory window (10 V) and fast erasing compared to devices using pure SiN trapping layer, explained by enhanced electrical field in SiN. Acceptable reliability in terms of cycling and data retention is also demonstrated.

Published
2010

6. Impact of a HTO/Al$_2$O$_3$ bi-layer blocking oxide in nitride-trap non-volatile memories

Author

Xavier Garros, François Martin, Julien Buckley, L. Perniola, G. Pananakakis, J.-P. Colonna, G. Ghibaudo, B. De Salvo, G. Molas, Marc Bocquet, V. Vidal, Simon Deleonibus, M. Gely, H. Grampeix, Alain Toffoli, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut National Polytechnique de Grenoble (INPG)-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS), European Project: 317888,EC:FP7:ICT,FP7-ICT-2011-8,NEMESYS(2012), and Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Institut National Polytechnique de Grenoble (INPG)-Centre National de la Recherche Scientifique (CNRS)

Subjects
Materials science, Silicon, Oxide, chemistry.chemical_element, SONOS, 02 engineering and technology, Hardware_PERFORMANCEANDRELIABILITY, Nitride, Blocking oxide, Memory performance, Blocking (statistics), 01 natural sciences, chemistry.chemical_compound, charge trapping memories, 0103 physical sciences, Materials Chemistry, Hardware_INTEGRATEDCIRCUITS, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, 010302 applied physics, business.industry, SANOS, Electrical engineering, SAONOS, Bi layer, 021001 nanoscience & nanotechnology, Condensed Matter Physics, Electronic, Optical and Magnetic Materials, chemistry, Optoelectronics, 0210 nano-technology, business
Abstract

International audience; In this work, we present an experimental and theoretical study of nitride-trap devices with a HTO/Al$_2$O$_3$ bi-layer blocking oxide. Such (Silicon/Alumina/HTO/Nitride/Oxide/Silicon) SAONOS devices are compared with standard (Silicon/HTO/Nitride/Oxide/Silicon) SONOS and (Silicon/Alumina/Nitride/Oxide/Silicon) SANOS memories. The role of the different layers (blocking oxide and control gate) is deeply analyzed, focusing on their impact on memory performance and reliability. Then, a semi-analytical model is developed , which provides a good understanding of the physical mechanisms at the origin of program/erase characteristics.

Published
2009
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7. Evaluation of HfAlO high-k materials for control dielectric applications in non-volatile memories

Author

P. Brianceau, Marc Bocquet, C. Bongiorno, B. De Salvo, G. Molas, J. Buckley, V. Vidal, Salvatore Lombardo, G. Pananakakis, Simon Deleonibus, H. Grampeix, Marc Gely, Gerard Ghibaudo, François Martin, J. P. Colonna, Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Institut National Polytechnique de Grenoble (INPG)-Centre National de la Recherche Scientifique (CNRS), and Domenget, Chahla

Subjects
Materials science, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, chemistry.chemical_element, 02 engineering and technology, Dielectric, Trapping, 01 natural sciences, chemistry.chemical_compound, 0103 physical sciences, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Saturation (magnetic), ComputingMilieux_MISCELLANEOUS, High-κ dielectric, 010302 applied physics, business.industry, 021001 nanoscience & nanotechnology, Condensed Matter Physics, Thermal conduction, Atomic and Molecular Physics, and Optics, Surfaces, Coatings and Films, Electronic, Optical and Magnetic Materials, Hafnium, chemistry, Aluminium oxide, Optoelectronics, Transient (oscillation), 0210 nano-technology, business
Abstract

In this paper, we evaluate the potentiality of hafnium aluminium oxide (HfAlO) high-k materials for control dielectric application in non-volatile memories. We analyze the electrical properties (conduction and parasitic trapping) of HfAlO single layers and SiO"2/HfAlO/SiO"2 triple layer stacks as a function of the HfAlO thickness and Hf:Al ratio. A particular attention is given to the electrical behaviour of the samples at high temperature, up to 250^oC. Experimental results obtained on silicon nanocrystal memories demonstrate the high advantage of HfAlO based control dielectrics on the memory performances for Fowler-Nordheim operation. Then an analytical model is presented, to simulate the program erase characteristics in the transient regime and at saturation, depending on the high-k control dielectric properties. A very good agreement is obtained between the experimental data and the simulation results.

Published
2008

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