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We demonstrated the crystal growth of group-III arsenides (III-As) on GaN via an arsenidation layer and GaN-channel electron mobility transistors (HEMTs) with a regrowth InAs/GaAs source and drain (S/D) region. By annealing under an AsH3 atmosphere, the surface of a GaN (0001) template is arsenided. We grew ⟨ 111 ⟩ oriented InAs and GaAs on arsenided GaN. Silicon-doped n-type InAs with a carrier mobility of over 1500 cm2/V s and a carrier concentration of over 1 × 1019 cm−3 was successfully obtained. The fabrication process and direct-current characteristics of GaN-channel HEMTs with the regrown Si-doped InAs/GaAs S/D region were demonstrated for the first time. A maximum transconductance estimated from transfer characteristics was as high as ∼195 mS/mm for the HEMT with a gate length of 2 μm without passivation, which is comparable to those for the HEMT without any S/D regrowth. The impact of the InAs/GaAs S/D region on the on-resistance of the fabricated HEMTs was estimated to be ∼0.9 Ω mm, which can be reduced by optimizing the device structures and process conditions. These results indicate that the process of GaN arsenidation and III-As regrowth can be used without any device performance degradation. Therefore, further lowering the ohmic contact resistivity and on-resistance of GaN-channel HEMTs is possible by maturing the manufacturing-process technology of III-As-contained GaN-channel HEMTs. [ABSTRACT FROM AUTHOR]

A comprehensive quantitative root cause study of defect evolution leading to memory window closure from a charge balance and charge trapping perspective throughout all phases of a Si channel Hf0.5Zr0.5O2 (HZO) ferroelectric field-effect-transistor (FEFET) is reported. Starting with the first write pulse, an excessive SiO2 interlayer field is revealed that triggers the creation of defect levels Dit in excess of 1015 cm−2 eV−1 at the HZO–SiO2 interface screening ferroelectric (FE) polarization while enabling FE switching. Under subsequent early bipolar fatigue cycling (up to 104 cycles), defect creation commences at the SiO2–Si interface due to the high injected hole fluence (0.39 C/m2) during each stress pulse causing negative bias instability (NBI), which shifts the threshold voltage of the erase state VT,ERS by −0.3 V with accrual of permanently captured charge Nit of up to +5 × 10−3 C/m2 (3 × 1012 cm−2). Subsequently, Nit NBI generation at the SiO2–Si interface accelerates reaching levels of +7 × 10−2 C/m2, locking both FEFET program and erase drain current vs gate–source-voltage (ID–VGS) characteristics in the FEFET on-state inducing memory window closure at 105 cycles while FE switching (switched polarization Psw = 0.34 C/m2) remains essentially intact. These findings guide the down-selection toward suitable semiconductor/FE systems for charge balanced, reliable, and high endurance FEFETs. [ABSTRACT FROM AUTHOR]

Nanoscale vacuum semiconductor devices utilize vacuum as an electron transport medium, offering the advantages of rapid response and immunity to extreme environments. In this study, we present a nanoscale vertical channel vacuum triode with a side-gate structure. The device employs vacuum as the gate insulating medium, which enhances its reliability compared to conventional vertical structure vacuum triodes. Furthermore, the side-gate design reduces the gate input capacitance to approximately 10−18 F, making it more suitable for high-frequency operations. We systematically investigate the impact of structural dimensions on device performance. Simulation results demonstrate that when the dielectric layer thickness is around 35 nm, the maximum transconductance of the device reaches 1.23 μS. Increasing the gate dielectric layer thickness leads to an increase in cut-off frequency but decreases channel current. Smaller gap widths between the cathode and gate result in higher transconductance and cut-off frequencies. However, when the gap width is less than 40 nm, noticeable gate leakage currents occur. Introducing negative offset of alignment between the anode and channel edge enhances transconductance and cut-off frequency but may introduce stability issues. These research findings provide valuable insights for developing high-frequency vacuum triode devices. [ABSTRACT FROM AUTHOR]

Hyperspectral scanning capacitance microscopy (SCM) measures d C / d V − V spectra at every XY location of a semiconductor sample surface area. We report its application to GaN-based high electron mobility transistor (HEMT) structures to map threshold voltage (Vth) at the nanoscale. The consistency between the conventional SCM data and the hyperspectral SCM data set of the same area on the HEMT surface provides evidence for the reliability of hyperspectral SCM. We developed a method to extract a map of Vth distribution across the surface of the HEMT structure at the nanoscale from the hyperspectral SCM data set. The map reveals that most of the fissures (i.e., enlarged pits formed at threading dislocation surface endings) on the nitride sample surface reduce local Vth. Other variations in Vth in regions free of the fissures could be a result of thickness and/or composition inhomogeneities in the Al x Ga 1 − x N barrier layer. Conventional SCM and other techniques cannot provide these detailed insights obtained through hyperspectral SCM. [ABSTRACT FROM AUTHOR]

In this work, we report on the high-performance p-GaN/InGaN/AlN multi-heterostructure p-channel metal–semiconductor field effect transistors (MESFETs) with energy-band modulated quantum well-like InGaN channel and low work function metal tungsten (W) as the gate material. A negative threshold voltage (VTH) of −0.35 V is achieved by precisely controlling the self-aligned etching depth at the active region. Benefiting from the enhanced hole confinement, the ION/IOFF ratio and subthreshold swing of the fabricated-channel MESFET are extracted to be 1.2 × 107 and 66 mV/dec, respectively, at room temperature. The idealized Schottky interface with TMAH and post-gate-annealing treatment shows an ultra-low voltage hysteresis of 0.08 V extracted at subthreshold area in the dual-sweep transfer curves. [ABSTRACT FROM AUTHOR]

This work develops a regrown fishbone trench (RFT) structure in selective area growth (SAG) technique to fabricate recessed-gate normally off GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs). The RFT structure effectively modulates the electric field at high drain and gate biases, thus allowing the device to feature improved off-state and gate breakdown performance with a high positive Vth of 2 V. The simulated carrier concentration and electric field distributions reveal the mechanism of electric field weakening by RFT architecture. Meanwhile, the current collapse phenomenon is significantly suppressed, and the gate voltage swing is also enlarged. The maximum gate drive voltage of 9.2 V for 10-year reliability of RFT GaN MIS-HEMT, together with the improved linearity and block voltage, broadens the applications of SAG devices. Furthermore, the RFT structure also provides an etching-free method for fabricating normally off GaN MIS-HEMTs with multi-dimensional gates. [ABSTRACT FROM AUTHOR]

An atomic layer etching (ALE) process without purge has been developed for gate recess etching of AlGaN/GaN high electron mobility transistors (HEMTs). The process consists of repeating ALE cycles where Cl2/BCl3 plasma modifies the surface by chemisorption. The modified layer is removed by the subsequential Ar ion removal step. In this manner, AlGaN/GaN HEMTs with three different gate recess etching depths of (7.3 ± 0.5), (13.6 ± 0.5), and (21.0 ± 0.5) nm were fabricated. The determined etch per cycle (EPC) of ∼0.5 nm corresponding to one unit cell in the c-direction of GaN was constant for all recesses, illustrating the precision and controllability of the developed ALE process. The root-mean-square surface roughness was 0.3 nm for every etching depth, which corresponds to the roughness of the unetched reference. The electrical measurements show a linear dependence between threshold voltage (Vth) and etching depth. An enhancement mode (E-mode) HEMT was successfully achieved. A deeper gate recess than 20 nm leads to an increased channel resistance, lower saturation current, and higher gate leakage. Hence, a compromise between the desired Vth shift and device performance has to be reached. The achieved results of electrical and morphological measurements confirm the great potential of recess etching using the ALE technique with precisely controlled EPC for contact and channel engineering of AlGaN/GaN HEMTs. [ABSTRACT FROM AUTHOR]

With the popularization of electronic devices and the demand for portability, low-power consumption has become crucial for integrated circuit chips. Two-dimensional (2D) semiconductors offer significant potential in constructing low-power devices due to their ultrathin thickness, enabling fully depletion operation. However, fabricating these 2D low-power devices, such as negative-capacitance transistors or tunneling transistors, often requires multiple layers of gate dielectrics or channel band engineering, adding complexity to the manufacturing process and posing challenges for their integration with silicon technology. In this work, we have developed low-power MoS2 metal–semiconductor field effect transistors utilizing a standard metal–semiconductor contact, which eliminates the need for gate dielectrics and semiconductor heterojunctions. It demonstrates a sharp subthreshold slope (SS ∼ 64 mV/dec), a minimum operating gate voltage range (−0.5 ∼ 1 V), a minimum current hysteresis (3.69 mV), and a stable threshold voltage close to 0 V (Vth ∼ −0.27 V). Moreover, we implemented an inverter circuit with a high voltage gain of 47. [ABSTRACT FROM AUTHOR]

The kink effect is a phenomenon that typically occurs in InP-based InAlAs/InGaAs high electron mobility transistors (HEMTs) at cryogenic temperatures. It results in higher output conductance (gDS) and non-monotonic behavior. This Letter discusses the origin and suppression of the kink effect in InP HEMTs at cryogenic temperatures, which is linked to the structure of gate recess passivation. At room temperature, two devices with different gate recess passivation structures show similar characteristics. However, a temperature-sensitive kink is observed in the non-passivated gate recess structure, leading to the discontinuous transconductance (gm) and the non-monotonic threshold voltage (Vth) shifts. Based on pulsed and static (non-pulsed) measurement data, surface traps and impact ionization in the high-field region are identified as the origin of the kink effect. Specifically, a positive Vth shift of +160 mV is caused by surface traps when the temperature drops to 150 K. A negative Vth shift of –60 mV is due to the enhanced impact ionization below 150 K. Conversely, the device with a passivated gate recess has a negligible kink effect and effectively improves discontinuous gm and the non-monotonic Vth shifts (+25 mV) when the temperature drops. Therefore, the device with a passivated gate recess is significant for suppressing the kink effect and maintaining the stability of the device in variable temperature environments. [ABSTRACT FROM AUTHOR]

Recent advances in the fabrication of neuromorphic electronic devices using biomaterials have received increasing attention for their prospect in biologically compatible and "green" electronic devices. Here, we proposed a novel electric-double-layer (EDL) synaptic transistor gated with Li-doped natural gelatin membranes, demonstrating larger capacitance at low frequency and extremely strong electrostatic modulation behavior. Experimental results have shown that a concentration of 2 wt. % Li-doping can obtain better electrical performance of EDL synaptic transistor. Ion/Ioff of 4.86 × 105 and threshold voltage of 0.68 V were obtained. Meanwhile, some important synaptic functions such as excitatory postsynaptic current, paired-pulse facilitation, and high-pass filtering characteristic have been successfully implemented. As a result, it can be inferred that the proposed gelatin-based natural polymer EDL electrolyte has demonstrated potential applications in "green" neuromorphic platforms. [ABSTRACT FROM AUTHOR]

In this Letter, we demonstrate the Schottky gated p-AlGaN/u-GaN/AlGaN p-channel field-effect transistors (p-FETs) with an extremely low interface state density of 2.5 × 1011 cm−2 eV−1. Benefiting from the high-quality Schottky interface with suppressed interface states, the excellent stability with negligible hysteresis is proved, even after ten sequential dual I–V sweeps at 150 °C. Meanwhile, the trap density, confirmed by the temperature-dependent conductance method, is still below 1012 cm−2 eV−1 at high temperature. Furthermore, the fabricated p-AlGaN/u-GaN/AlGaN p-FET with a gate to drain distance of 1.8 μm shows a breakdown voltage of −128 V and an effective on-resistance of 7.2 kΩ mm, which allows the further scale down in terms of the source–drain spacing to improve the conduction current for low voltage application. The ultra-stable I–V characteristics of the fabricated Schottky-gated p-AlGaN/u-GaN/AlGaN p-FETs show great potential for next-generation integrated circuit application at high temperatures. [ABSTRACT FROM AUTHOR]

Field-effect transistor (FET)-based sensors allow rapid, label-free electrical detection of chemical and biological species and are easy to use. Dual-gate FET-based biosensors enable sensitive detection with high intensity signal by their distinctive structure based on a combination of solid and liquid gates. However, the underlying mechanism of signal amplification to explain the experimental results has not been well explained with theoretical analysis. In this work, a theoretical approach based on device physics is used to interpret the signal enhancement in dual-gate FET-based biosensors. The analysis is verified with a simulation method for pH sensors based on a well-established commercialized semiconductor 3D technology computer-aided design simulation. The pH sensing parameters are comprehensively investigated as a function of the electrical characteristics of dual-gate FETs: the voltage, current, and normalized current signals are directly correlated with capacitive coupling, transconductance, and subthreshold swing, respectively. Our theoretical analysis provides design guidelines for sensitive dual-gate FET-based biosensors. [ABSTRACT FROM AUTHOR]

This work is a systematic investigation of electronic transport and inelastic effects of two-terminal devices without gates composed of zigzag and armchair phagraphene nanoribbons doped with boron nitride. It is based on a hybrid density functional theory and the nonequilibrium Green's function method implemented in the TRANSIESTA code. The doping in the device with a zigzag conformation had a metal–semiconductor transition, symmetric eigenchannels (ECs), high transmission probability, and an evident field-effect transistor (FET) signature with two operating windows. The armchair configuration had a semiconductor–metal transition, asymmetric features in the ECs that decrease the transmission probability considerably, a switch signature for low bias, and FET behavior for bias V > --> 0.2 V. These results suggest that the impurities improve the electron transport for both edge conformations. On the other hand, inelastic transport made a smaller contribution to the current and conductance compared to elastic transport. Inelastic electron-tunneling spectroscopy showed that electron tunneling in phagraphene devices is mainly driven by elastic effects, indicating that almost all the energy of the system is conveniently used in the electronic transport and is not lost through network vibrations. [ABSTRACT FROM AUTHOR]

Toward interface charge engineering in AlTiO/AlGaN/GaN metal-insulator-semiconductor (MIS) devices, we systematically investigated insulator-semiconductor interface fixed charges depending on the composition of the AlTiO gate insulator obtained by atomic layer deposition. By evaluating the positive interface fixed charge density from the insulator-thickness dependence of the threshold voltages of the MIS devices, we found a trend that the interface fixed charge density decreases with the decrease in the Al composition ratio, i.e., increase in the Ti composition ratio, which leads to shallow threshold voltages. This trend can be attributed to the large bonding energy of O-Ti in comparison with that of O-Al and to consequent possible suppression of interface oxygen donors. For an AlTiO gate insulator with an intermediate composition, the MIS field-effect transistors exhibit favorable device characteristics with high linearity of transconductance. These results indicate a possibility of interface charge engineering using AlTiO, in addition to energy gap engineering and dielectric constant engineering. [ABSTRACT FROM AUTHOR]

We report solution-processed oxide thin-film transistors (TFTs) with an indium oxide (InO) channel and a lanthanum–zirconium oxide (LZO) gate insulator with a transconductance (of the mS order) that was two to three orders of magnitude higher than in common oxide TFTs. Analyses revealed that while the mobility was not high, the induced charge density in the channel was extremely high [typically >1.2 × 1014 cm–2 per volt of VG, corresponding to a high dielectric constant (ɛr) of >5000 for the InO/LZO structure]. In addition, the TFTs exhibited low operating voltages (1–2 V) and low subthreshold swing factors (SS, 70–90 mV decade−1) that were close to the theoretical limit (∼60 mV decade−1 at room temperature) of an ideal transistor. The transconductance decreased with decreasing humidity and was similar to that of a typical oxide TFT in a dry environment. Our data indicated that the high carrier density may arise from the formation of electric double layers in the presence of water molecules. Additionally, the crystallinity of the InO channel layer was dependent on the La/Zr ratio in LZO: the crystallinity significantly improved with an La/Zr ratio of 3/7 (high-transconductance TFTs) compared with a ratio of 7/3 (usual TFTs). [ABSTRACT FROM AUTHOR]

A type of metal–insulator–semiconductor (MIS) structured light-emitting device (LED), where a semitransparent gold (Au) film, a polymethyl methacrylate film, and an erbium (Er)-doped ZnO (ZnO:Er) film on a silicon substrate act as the "M", "I", and "S" components, respectively, has been prepared. With increasing forward bias with the positive voltage connected to the semitransparent "M" (Au) electrode, such LED first exhibits random lasing (RL) from the ZnO host itself and is then electroluminescent with the characteristic emissions from the Er3+ ions incorporated into the ZnO host. Based on the energy band diagram and the analysis of carrier transportation for the ZnO:Er-based LED applied with different forward bias voltages, the evolution from the RL to the Er-related electroluminescence as mentioned above has been tentatively explained. [ABSTRACT FROM AUTHOR]

GaN/AlGaN, known as the third-generation semiconductor, is widely used in advanced power and RF devices. A precise and low-damage etch process is essential for the preparation of recessed-gate enhancement-mode GaN high electron mobility transistors. Atomic layer etching (ALE) offers novel opportunities during the ultraprecision manufacturing process by splitting etch process into a surface modification step and a modified layer removal step. In this work, two self-limiting AlGaN ALE systems (O2-BCl3 and chlorinate-argon) are reported in detail. The results of the two systems are analyzed and compared. This research provides a deep insight into the ALE mechanism of AlGaN and a broad cognition for applying ALE to engineering problems. [ABSTRACT FROM AUTHOR]

We report on the design and fabrication of β -Ga2O3 self-aligned lateral MOSFETs by utilizing a heavily doped β -Ga2O3 cap layer. The fabrication of the self-aligned device used a combination of in situ Ga etching for damage free gate recess, in situ growth of Al2O3 for gate dielectric, and atomic layer deposited Al2O3 based sidewall spacers to form highly scaled (<100 nm) source–gate and gate–drain access regions. The fabricated device showed a record high DC drain current density of 560 mA/mm at a drain bias of 5 V. The DC current density was found to be limited by excessive self-heating resulting in premature current saturation in the device. Pulsed I–V measurements of the device showed a record high current density of 895 mA/mm and a high transconductance of 43 mS/mm, thanks to reduced self-heating in the device. The high current densities obtained in this work are promising for the development of high power density devices based on β -Ga2O3. [ABSTRACT FROM AUTHOR]

The monolithic integration of III–V materials on silicon appears as the most promising, cost-effective, and versatile method for next-generation optoelectronic devices. Here, we report on GaAs metal-semiconductor-metal photodetectors integrated on an Si substrate by metal-organic chemical vapor deposition. The device architecture is based on a GaAs active layer grown on Si via ultrathin, low-temperature Ge buffer layers. The Ge-on-Si acts as a "virtual" substrate to reduce the overall structural defects in the GaAs device layers. The metal-semiconductor junction characteristics were optimized to effectively suppress the dark current and passivate the interface defects. This was achieved through the insertion of an ultrathin Al2O3 interlayer at the metal/GaAs interface. The results show that a Schottky barrier height of 0.62 eV and 0.8 eV for electrons and holes, respectively, can be achieved. Circular devices with diameters ranging from 30 to 140 μm were fabricated. The measured room temperature dark current is ∼48 nA for an applied reverse bias of 1.0 V and a device diameter of 30 μm. Additionally, the GaAs metal-semiconductor-metal structure exhibited a remarkable photoresponsivity and detectivity values of (0.54 ± 0.15) A/W and ∼4.6 × 1010 cm Hz1/2 W−1 at 5 V reverse bias, 850 nm, respectively. The proposed method offers great potential for the monolithic integration of GaAs on an Si platform. Furthermore, this technique can be extended to other III–V materials and lattice mismatched systems for high-performance multiple band optoelectronics. [ABSTRACT FROM AUTHOR]

The growing field of correlated nanoelectronics exists at the intersection of two established fields: correlated oxide electronics and semiconductor nanoelectronics. The development of quantum technologies that exploit quantum coherence and entanglement for the purposes of computation, simulation, and sensing will require complex material properties to be controlled at nanoscale dimensions. Heterostructures and nanostructures formed at the interface between LaAlO3 and SrTiO3 exhibit striking behavior that arises from the ability to program the conductive behavior at extreme nanoscale dimensions. The active electronic layer, SrTiO3, exhibits a wide range of gate-tunable phenomena such as ferroelectricity, ferroelasticity, magnetism, superconductivity, and spin–orbit coupling, all of which can be controlled at the nanoscale using two reversible methods: conductive atomic force microscope lithography and ultra-low-voltage electron beam lithography. Mesoscopic devices such as single-electron transistors and quasi-one-dimensional electron waveguides can be "sketched" using these techniques, and the properties of these devices differ significantly from those created from traditional semiconductors, such as Si or GaAs. The strongly correlated nature of the SrTiO3 system is evident from superconducting behavior as well as a state in which electrons are paired outside the superconducting state. A highly exotic phase was discovered in which a degenerate quantum liquid is formed from bound states of n = 2, 3, 4, ... electrons. Further development of correlated nanoelectronics based on the LaAlO3/SrTiO3 system can potentially lead to a general platform for quantum simulation as well as a pathway for the development of highly entangled states of multiple photons. [ABSTRACT FROM AUTHOR]

Strong anisotropic magnetotransport is reported in high-quality TaTe4 single crystals synthesized by flux methods. Large positive magnetoresistance (MR) and field-induced metal-semiconductor-like transition are observed at low temperatures with B perpendicular to c axis. The MR value reaches 3200% in 9T at 2K with B parallel to a axis, contrast to 79% for B along c axis. Angle dependent magnetoresistance with B rotated within ab plane displays eightfold symmetry and pronounced Shubnikov-de Haas (SdH) oscillations at low temperatures. The analysis of angle dependent resistivity, Hall effect and observed SdH oscillations suggest the high mobile electron and anisotropic Fermi surface responsible for the large anisotropic MR in TaTe4. [ABSTRACT FROM AUTHOR]

The instability of THz plasma waves propagating along a channel of field-effect transistors opens up a new mechanism of emission of THz waves. In this work, we investigate the instability of THz plasma waves in field-effect transistors in the presence of quantum effects and nonideal boundary condition at the source and the drain by using the quantum hydrodynamic model. The results show that the THz plasma waves will be unstable when the gate–source capacitances are larger than gate–drain capacitances and the instability increment can be increased by increasing gate–source capacitances or decreasing gate–drain capacitances. The results of this work give nano-field-effect transistors an advantage in achieving real THz oscillations. [ABSTRACT FROM AUTHOR]

A low Schottky barrier height (SBH) at source/drain contact is essential for achieving high drive current in atomic layer MoS2-channel-based field effect transistors. Approaches such as choosing metals with appropriate work functions and chemical doping are employed previously to improve the carrier injection from the contact electrodes to the channel and to mitigate the SBH between the MoS2 and metal. Recent experiments demonstrate significant SBH reduction when graphene layer is inserted between metal slab (Ti and Ni) and MoS2. However, the physical or chemical origin of this phenomenon is not yet clearly understood. In this work, density functional theory simulations are performed, employing pseudopotentials with very high basis sets to get insights of the charge transfer between metal and monolayer MoS2 through the inserted graphene layer. Our atomistic simulations on 16 different interfaces involving five different metals (Ti, Ag, Ru, Au, and Pt) reveal that (i) such a decrease in SBH is not consistent among various metals, rather an increase in SBH is observed in case of Au and Pt; (ii) unlike MoS2-metal interface, the projected dispersion of MoS2 remains preserved in any MoS2-graphene-metal system with shift in the bands on the energy axis. (iii) A proper choice of metal (e.g., Ru) may exhibit ohmic nature in a graphene-inserted MoS2-metal contact. These understandings would provide a direction in developing high-performance transistors involving heteroatomic layers as contact electrodes. [ABSTRACT FROM AUTHOR]

A comprehensive study on top- and bottom-illuminated Al0.5Ga0.5N/AlN metal-semiconductor-metal (MSM) photodetectors having different AlGaN absorber layer thickness is presented. The measured external quantum efficiency (EQE) shows pronounced threshold and saturation behavior as a function of applied bias voltage up to 50V reaching about 50% for 0.1 lm and 67% for 0.5 μm thick absorber layers under bottom illumination. All experimental findings are in very good accordance with two-dimensional drift-diffusion modeling results. By taking into account macroscopic polarization effects in the hexagonal metal-polar +c-plane AlGaN/AlN heterostructures, new insights into the general device functionality of AlGaN-based MSM photodetectors are obtained. The observed threshold/saturation behavior is caused by a bias-dependent extraction of photoexcited holes from the Al0.5Ga0.5N/AlN interface. While present under bottom illumination for any AlGaN layer thickness, under top illumination this mechanism influences the EQE-bias characteristics only for thin layers. [ABSTRACT FROM AUTHOR]

In this Letter, the p-GaN high electron mobility transistor (HEMT) with hybrid drain of recessed Schottky (RS) and p-GaN isolation blocks' drain (HSP drain) is proposed and fabricated for good reverse blocking capability. The related operation mechanism has been investigated and revealed. The proposed device features a drain terminal consisting of the array-distributed recessed Schottky and p-GaN isolation blocks. Based on the features, the reverse leakage current (5 × 10−9 A/mm at VDS = −100 V) is obviously reduced by two orders of magnitude compared with that (5 × 10−7 A/mm) of p-GaN HEMTs only with recessed Schottky (RS) drain, which is the lowest leakage current among the reported GaN-on-Si reverse blocking transistors. The introduction of these p-GaN isolation blocks has a negligible impact on Von (Von = 0.63 V). Therefore, a good improvement in the trade-off between the reverse leakage current and Von could be achieved because of the significant reduction in the reverse leakage current without sacrificing Von. In addition, the reverse breakdown voltage of −800 V at 1 μA/mm with a substrate grounded in the proposed device is evidently improved compared with the counterpart (−680 V), which is attributed to effective alleviation of the high electric field near the HSP drain. These results demonstrate the significance and potential of p-GaN HEMTs with HSP drain in reverse blocking applications. [ABSTRACT FROM AUTHOR]

Atomic layer etching (ALE), a cyclic process of surface modification and removal of the modified layer, is an emerging damage-less etching technology for semiconductor fabrication with a feature size of less than 10 nm. Among the plasma sources, inductively coupled plasma (ICP) can be a candidate for ALE, but there is a lack of research linking discharge physics to the ALE process. In this study, we comprehensively investigated the discharge physics of ICPs with a radio frequency (RF) bias and Ar/C4F6 mixture to be considered for the ALE process. Detailed studies on the discharge physics were conducted in each step of ALE (i.e., modification step, removal step) as well as the whole cycle as follows: (1) In the general ALE cycle, plasma properties dependent on the chamber geometry and the discharge mode of the ICP were analyzed; (2) in the modification step, a plasma instability with molecular gas was observed. The timescale for molecular gas removal was also investigated; (3) in the removal step, changes in plasma characteristics with the RF bias power were studied. Based on measurements of these plasma physical parameters, the discharge condition for ALE was optimized. ALE was performed on various thin films, including a-Si, poly c-Si, SiO2, and Si3N4. For each thin film, thicknesses of 0.5–2.0 nm were etched per cycle, as in quasi-ALE. Finally, ALE was performed on a patterned wafer, and the etch thickness of 0.6 nm per cycle and fine etch profile were obtained. [ABSTRACT FROM AUTHOR]

This paper studies a composite device composed of ferroelectric random access memory (FeRAM) and metal-oxide-semiconductor field effect transistor. The relationship between the hysteresis characteristics and VG is reported, and the on/off ratios under different writing voltages are presented. The gm–VG curve of the forward and reverse sweeping shows that under forward sweep a very clear instability appears while voltage increases. The reasons for this can be explained according to the voltage divider rule, the ID formula, and gm formula of transistors, which show that there is polarization of the ferroelectric material. Accordingly, a method is proposed to determine the critical point of the ferroelectric capacitor polarization in this 1T1C structure, which is advantageous because it identifies the appropriate reading voltage necessary for an effective program state of the 1T1C device. This method was shown in three 1T1C and three FeRAMs devices with different ferroelectric areas. Finally, this method was verified by the P–V loop of FeRAMs. [ABSTRACT FROM AUTHOR]

The gate-all-around (GAA) nanosheet (NS) junctionless transistor (JLT) is an attractive candidate for advanced technology nodes in CMOS scaling. Here, the channel width-dependent transconductance (gm) degradation and threshold voltage (Vth) shift of GAA NS JLTs were investigated via numerical simulation. Compared to bulk neutral channels, a pronounced surface accumulation channel limited the overall electrical characteristics of GAA NS JLTs at narrow widths. Additionally, the variation in Vth of GAA NS JLTs was much smaller than that in tri-gate JLTs. Quantum mechanical effects in GAA NS JLTs with a very narrow width were also investigated. [ABSTRACT FROM AUTHOR]

In order to develop a method to extract the parameters of the two inherent Schottky contacts from a single current-voltage (I-V) characteristic curve, the I-V characteristics of metal-semiconductor-metal (MSM) diodes with asymmetric Schottky barrier heights are theoretically investigated using the thermionic emission model. The MSM diode structure is commonly used because an additional MS interface is required for the electrical characterization of MS diodes. A finite charge-injection barrier is generally formed at the additional interface. When a local maximum was detected in the first-order derivative of the measured I-V characteristics for a MSM diode, the parameters for the Schottky contacts, the zero-bias barrier heights of both MS interfaces, the series resistance of the MSM diode, and the effective ideality factor for the MS diode with a higher barrier could be extracted using this method. [ABSTRACT FROM AUTHOR]

A generalized transmission line model (TLM) and a compatible numerical method have been proposed to characterize metal-semiconductor contacts that exhibit nonlinear properties. This model and method have been applied to the analysis of Au/Sn/p-HgCdTe contact and have realized determination of related physical parameters by fitting experimental data. Our model's merit of avoiding the overestimation of barrier height active contact area encountered in other methods without TLM scheme is discussed. In addition, only by using this model, the transfer length can be credibly determined in the case of nonlinear contacts. [ABSTRACT FROM AUTHOR]

Infrared nanocrystals are promising building blocks for the design of low-cost infrared sensors. Vertical geometry diode is, among possible geometries, the one that has led to the best performance so far. However, this geometry suffers from a lack of tunability after its fabrication, slowing down possible improvements. Here, we demonstrate gate control on a vertical diode in which the active layer is made of HgTe NCs absorbing in the extended short-wave infrared (2.5 μm). To reach this goal, we take advantage of the electrostatic transparency of graphene, combined with the high capacitance LaF3 ionic glass to design a gate tunable photodiode. The latter behaves as a work function-tunable electrode which lets the gate-induced electric field tune the carrier density within the nanocrystal film. In particular, we show that the gate allows to tune the band profile leading to more efficient charge extraction and thus an enhanced photoresponse (×4 compared to the device with a floating gate). This work also demonstrates that photoelectron extraction can still be improved in the existing diode, by better controlling the doping profile of the stack. [ABSTRACT FROM AUTHOR]

We report on device physics modeling, assisted by experimental measurement results, for all-electronic transduction of resonant electromechanical motion of nanoscale β-Ga2O3 vibrating channel transistors (VCTs), including both direct readout of high frequency transmission current (without frequency down-conversion) and frequency modulation (FM) down-conversion techniques. The β-Ga2O3 VCTs under consideration have fundamental mode resonance frequencies at ∼25 MHz–1 GHz, with quality factors (Qs) of ∼100–5000 and transconductance gm at ∼0.2 nS–5 μS. In analysis of signal transduction with varying device parameters, the transistor's gate trench depth z0 and transconductance gm play key roles in improving the electromechanical coupling and device performance. Reduction of trench depth z0 can engender a major enhancement in readout current. Reducing channel thickness h and increasing channel length L can improve the readout current while downshifting the resonance frequency at the same time. We design β-Ga2O3 VCT with a suspended modulation doped field effect transistor structure for efficient operation in the GHz range. This study paves the way for future engineering of all-electronic transduction and integration of high frequency β-Ga2O3 resonators on chip with β-Ga2O3 electronics and optoelectronics. [ABSTRACT FROM AUTHOR]

We have analyzed the characteristics of hydrogenated amorphous silicon source gated transistors (SGTs) by using numerical simulations and we found that the original SGT characteristics can be reproduced without introducing barrier lowering mechanisms at the Schottky contact. Output characteristics show reduced current increase when pinch-off of the source end of the channel is triggered by increasing Vds, while perfect saturation of the drain current is achieved when pinch-off at the drain occurs. According to our simulations, even in the saturation regime the current at metal-semiconductor interface does not reach the thermionic emission limit and remains diffusion limited. Gate bias dependence of the saturation current can be simply explained as a combination of increased saturation voltage and reduced output conductance, without invoking barrier lowering mechanisms. SGT contact effects were modeled by introducing a distributed diode equivalent circuit for the source contact, which reproduces very well the device characteristics and can be easily implemented in a circuit simulator. [ABSTRACT FROM AUTHOR]

Metal-semiconductor type junction based on p-type La0.7Sr0.3MnO3 and n-type ZnO, Zn(Fe)O or Zn(Fe,Al)O with different Fe concentrations have been fabricated on (0001) sapphire substrate using pulsed laser deposition technique. While the metal-semiconductor type junction with La0.7Sr0.3MnO3 (LSMO) and ZnO or Zn(Fe)O show very good rectifying behavior, the heterojunction with La0.7Sr0.3MnO3 and Zn(Fe,Al)O fails to show such rectifying characteristics which most likely due to the much higher carrier concentration and thin depletion width. These metal-semiconductor type junctions show reasonably high temperature dependent junction magnetoresistive behavior. At 77 and 300 K all the junctions show negative junction magnetoresistance, whereas they show positive junction magnetoresistance at certain temperature range (150-280 K). The junction MR attains a peak with high positive value ∼76%, 38%, and 25% for LSMO/Zn(Fe,Al)O, LSMO/Zn(Fe)O, and LSMO/ZnO junctions, respectively, near 250 K, where La0.7Sr0.3MnO3 shows highest spin relaxation near 250 K. The junction magnetoresistive properties have been explained using the standard spin injection mechanism through the magnetic p-n junction. Junction magnetoresistance dies out with the increase of doping concentrations in all the three type of metal-semiconductor type junctions due to the less non equilibrium population of polarized electrons. [ABSTRACT FROM AUTHOR]

Diamond is a promising electronic semiconductor candidate that has recently attracted intense interest in the implementation of its superior physical properties in electronic devices. In particular, attention has been focused on the surface transfer doping of diamond, in which the hydrogen-terminated diamond (diamond:H) benefices of a unique conductive two-dimensional hole gas (2DHG) layer at the diamond's sub-surface upon coverage with a suitable surface acceptor. Several diamond:H transistors have been developed. However, their inherent architecture dependence on the diamond:H conductive surface sensitivity to harsh processing environments has been a major barrier to the realization of high-performance devices. Here, we report on a diamond:H transistor structure that incorporates a mutual diamond:H active channel into the hybrid model of a metal-semiconductor field-effect transistor (MESFET) and a self-aligned metal-insulator-semiconductor FET (MISFET) with a common gate connection. The resulting diamond:H hybrid transistor exhibits a beneficial symbiosis that includes the advantages of both the MISFET (a high ON current of 0.8 μA/μm and a low OFF current of ∼10−9 μA/μm) and MESFET (almost an ideal subthreshold swing of 67 mV/dec) performance operations in the same multilayered device. [ABSTRACT FROM AUTHOR]

This study systematically investigates the properties of (i) conductive Si-doped α-(AlxGa1−x)2O3 thin films grown via a third generation mist chemical vapor deposition system and (ii) Schottky diodes (SDs) and metal semiconductor field-effect transistors (MESFETs) fabricated on them. The use of chloro(3-cyanopropyl)dimethylsilane as the Si dopant resulted in conductive thin films in a wide range of Al contents x from 0 to 0.3. The resistivity fluctuated in the range from 0.14 Ω cm to 0.35 Ω cm at x ≤ 0.05 and abruptly increased as x exceeded 0.05. Nevertheless, a resistivity of 1.2 kΩ cm was measurable in an (Al0.3Ga0.7)2O3 film, whose bandgap of 6.22 eV was comparable to that of AlN. All the silver oxide SDs fabricated on these films functioned properly with the rectification ratios up to 105, while the MESFETs showed clear field-effect even in the α-(Al0.3Ga0.7)2O3 film. Interestingly, a linear dependence of barrier heights on ideality factors was obtained in diodes formed between the source and gate electrodes of these transistors despite the differences in the bandgaps. This plot yielded the average or "homogeneous" barrier height of ∼2.0 eV, suggesting that the Fermi level on the AgOy/Si:α-(AlxGa1−x)2O3 interface was pinned at ∼Ec −2.0 eV regardless of the Al content x. [ABSTRACT FROM AUTHOR]

In this Letter, we report and investigate the temperature dependency of various radio frequency (RF) parameters for a fabricated reconfigurable bandstop filter with vanadium dioxide (VO2) switches measured up to 55 GHz. Here, the insulator-to-metal (ITM) and metal-to-insulator transition (MIT) hysteresis of the VO2 thin film influence on the RF characteristics of the filters is analyzed from 25 °C and 120 °C in heating and cooling. The resonance frequency and maximum insertion loss (IL) stability and sensitivity with temperature variations are explored. It is noticed that increasing the temperature to 50 °C from 25 °C (or decreasing it to 50 °C from 120 °C) will result in a less than 1% fractional frequency shift with respect to the off and on resonance frequencies. The sharp DC conductivity level variations of the VO2 thin film around the transition temperatures translate into sharp effects on the resonance characteristics of the filters. On the contrary, the maximum IL levels are less sensitive to the sharp conductivity changes of DC films around the VO2 transition temperature. A unique behavior is reported when successively heating-up and cooling-down, over and below, respectively, the transition temperature of VO2: the fabricated filter exhibits completely different resonance frequencies. This suggests that in the temperature dependence of the VO2 RF design, the practical use of reconfigurable RF functions has to take into account the history of thermal effects and increase or decrease in the device temperature when crossing the IMT/MIT transition point. [ABSTRACT FROM AUTHOR]

The restacking of stripped two-dimensional material into a van der Waals heterojunction provides a promising technology for high-performance optoelectronic devices. This paper presents a self-driven photodetector composed of p-GaSe/n-MoSe2. The hybrid contact is directly formed between the electrode and the heterojunction, which considerably improves the photovoltaic effect. In addition, the Schottky barrier between the semiconductor and metal electrodes creates a built-in electric field, which enhances the self-driven performance of the device. The as-fabricated photodetector has the high responsivity of 0.169 A W−1 at zero bias and the specific detectivity of 6.6 × 1011 Jones. When bias was applied, a responsivity of 6.81 A W−1 and a specific detectivity of 2.8 × 1013 Jones have also been obtained. This work demonstrates that selenide van der Waals heterojunctions based on two-dimensional materials have great potential for future electronic and optoelectronic applications. [ABSTRACT FROM AUTHOR]

Normally-off AlGaN channel heterostructure field effect transistors (HFETs) have been proposed and investigated numerically by taking advantage of the polarization engineering perspective in III-nitrides. The utilization of polarization-matched InAlN/AlGaN heterostructures shifted the threshold voltage to approximately 1.1 V for an Al0.3Ga0.7N channel HFET. Compared to the AlGaN/GaN HFEF with a low breakdown voltage, the normally-off InAlN/AlGaN HFETs show substantially enhanced breakdown characteristics. Besides, the two-dimensional electron gas (2DEG) mobility in the InAlN/AlGaN HFETs exhibits much less reduction with the increasing temperature than that in the AlGaN/GaN HFET, according to the calculation of electron mobility dominated by alloy disorder scattering and polar optical phonon scattering. As a result, the temperature dependences of the power figures of merit based on the conduction loss consideration in terms of 2DEG mobility variation and Johnson figure of merit show superior potential for polarization-matched InAlN/AlGaN HFETs in high-power and high-frequency electronics applications particularly operating at elevated temperatures. This work provides a useful way for demonstration of normally-off AlGaN channel HFETs and is also helpful for design of future devices, which can be beneficially exploited from polarized III-nitride heterostructures. [ABSTRACT FROM AUTHOR]

Recent advances in the field of integrated circuits based on sustainable and transparent amorphous oxide semiconductors (AOSs) are presented, demonstrating ultrahigh performance operating state-of-the-art integrated inverters comprising metal–semiconductor field-effect transistors (MESFETs) with amorphous zinc tin oxide (ZTO) as a channel material. All individual circuit layers have been deposited entirely at room temperature, and the completed devices did not require undergoing additional thermal annealing treatment in order to facilitate proper device functionality. The demonstrated ZTO-based MESFETs exhibit current on/off ratios of over 8 orders of magnitude a field-effect mobility of 8.4 cm2 V−1 s−1, and they can be switched within a voltage range of less than 1.5 V attributed to their small subthreshold swing as low as 86 mV decade−1. Due to adjustments of the circuit layout and, thus, the improvement of certain geometry-related transistor properties, the associated Schottky diode FET logic inverters facilitate low-voltage switching by exhibiting a remarkable maximum voltage gain of up to 1190 with transition voltages of only 80 mV while operating at low supply voltages ≤3 V and maintaining a stable device performance under level shift. To the best of our knowledge, the presented integrated inverters clearly exceed the performance of any similar previously reported devices based on AOS, and thus, prove the enormous potential of amorphous ZTO for sustainable, scalable low-power electronics within future flexible and transparent applications. [ABSTRACT FROM AUTHOR]

We report high performance ultraviolet (UV) photodetectors (PDs) based on p-GaN-gated AlGaN/GaN heterostructures grown on silicon substrates. Benefitting from the high electrical gain resulting from the transistor-like operation of the device, a photocurrent as high as 4.8mA/mm was achieved with UV illumination. Due to the effective depletion of the two-dimensional electron gas at the AlGaN/GaN heterointerface via a p-GaN optical gate, the dark current was suppressed to below 3x10-8mA/mm. A high photo-to-dark current ratio over 108 and a high responsivity of 2 x 104 A/W were demonstrated in the device. Moreover, with a cutoff wavelength of 395 nm, the PDs exhibited an ultrahigh UV-to-visible rejection ratio of over 107. Limited by a persistent photoconductivity effect, the rise time and fall time of the device frequency response were measured to be 12.2 ms and 8.9 ms, respectively. The results suggest the potential of the proposed PDs for high-sensitivity UV detection. [ABSTRACT FROM AUTHOR]

We report on the realization of Nb-based all-metallic Dayem nano-bridge gate-controlled transistors (Nb-GCTs). These Josephson devices operate up to a temperature of ∼ 3 K and exhibit full suppression of the supercurrent thanks to the application of a control gate voltage. The dependence of the kinetic inductance and of the transconductance on gate voltage promises a performance already on par with so far realized metallic Josephson transistors and leads us to foresee the implementation of a superconducting digital logic based on the Nb-GCT. We conclude by showing the practical realization of a scheme implementing an all-metallic gate-tunable half-wave rectifier to be used for either superconducting electronics or photon detection applications. [ABSTRACT FROM AUTHOR]

A typical 0.3-μm gate-length submicron GaAs metal-semiconductor field-effect transistor (MESFET) is simulated using a complete energy model that solves a complete form of the energy conservation equation, and also using a simplified energy model that only neglects heat flux for electrons. The simulations are carried out with the same device physical and bias conditions, and a transient analysis is made to investigate thermal electron conduction effects on the formation property of a high-field dipole domain in the submicron GaAs MESFET. It is shown that the simplified model leads to the existence of a very unstable Gunn domain oscillating between the gate and drain, but the more accurate complete model gives a stable high-field domain confined well in the gate region due to thermal electron conduction. The crucial reason for this discrepancy between the two results is associated with the capable limits of accuracy in the simplified model. That is, this model gives rise to an unduly large retardation in the energy-gaining rate of electrons in the gate channel, so that the production of the negative differential resistance phenomenon by the electrons is largely delayed under the gate. Therefore, a traveling Gunn domain can be exhibited for submicron GaAs field-effect transistors in the simulation by a simplified energy model. It is demonstrated that even though simplified energy models are capable of reflecting the nonstationary effect of velocity overshoot properly, it is quite improper to apply these for studying device physics related to dipole domain properties; thermal electron conduction plays a pivotal role in forming a stable dipole domain in the submicron GaAs MESFET. In addition, the average effective valley-transition force for channel electrons (a new physical quantity first defined in the paper) is used to show that simplified energy models give a much larger magnitude for the force (approximately 1.8 eV/μm) compared to 1.2 eV/μm given by the complete energy model. Furthermore, the force is given closer to the drain end of the gate in the former models. Therefore, simplified energy models have a high possibility of creating a traveling domain for submicron devices. [ABSTRACT FROM AUTHOR]