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We demonstrate a MIM capacitor structure using ZrO2 for the dielectric layer which exhibits a 25% capacitance increase (from ~43fF/mm2 to >55fF/mm2 for a ~55A film) with minimal leakage current increase compared to Hf based dielectrics, extending the usefulness of MIM on-chip decoupling capacitors. The MIM structure, suitable for BEOL processing is TiN/ZrO2/TiN combined with an anneal which is shown to improve the capacitance vs. leakage performance compared to doped and undoped HfO2 based control structures. GI-XRD measurements demonstrate that the capacitance increase corresponds with a phase transformation of the ZrO2 from amorphous to cubic phase, which is shown to have a dielectric constant (k) up to 35. Reliability models based on hard-breakdown (HBD) show that this structure exceeds the end-of-life targets. Servers and high-performance chips have historically relied on on-chip decoupling capacitors (decap) to reduce power supply noise in order to achieve 3 – 5.4 GHz operating frequency. Although packaging decap can be very effective at mitigating low and mid-frequency noise, on-chip decap, such as MIMCAP, is critical for mitigating mid and high-frequency noise. As Fig. 1 shows, an increase in on-chip decap can result in a significant performance benefit, due to their fast response time slowing the fastest droops, giving time for slower response elements to contribute. One method of achieving this increased decap is to increase the k of the material being used as the insulator in the MIMCAP. Following high-k gate dielectric technology, HfO2 and other Hf based dielectric stacks have been used for this layer successfully [1]. But there is a significant difference in the thermal budget that the dielectric is exposed to following the deposition between gate dielectric and MIMCAP applications. The gate dielectric, deposited prior to any metallization, will typically be exposed to a relatively high thermal budget compared to the insulator layer of a decoupling MIMCAP, which is usually placed between wiring levels in the back end of the line (BEOL) [2]. Since the thermal budget after deposition will affect the crystal structure of a material, and different crystal phases of the same material can have dramatically different dielectric constants [3], the actual dielectric constant of a particular high-k material may vary significantly depending on whether it is used as the gate dielectric or as the MIM insulator. In this work, we explore the use of a ZrO2 as the high- k layer for MIMCAP applications and show that its low crystallization temperature enables it to achieve a significantly higher k value compared to HfO2 when processed under BEOL compatible thermal conditions. Fig. 2 shows the development of the high-k phase of a 55A ZrO2 film as the anneal temperature is increased. The peaks at 35, 42 and 52 are the signature of the bottom TiN electrode and do not change with anneals; but the peaks at 30.2 and 50.3 degrees, which are seen to develop as the anneal temperature increases, match with the 111 and 220 planes of the cubic phase of ZrO2. MIMCAPs built using similarly annealed ZrO2 layers as dielectrics exhibit an increase in capacitance as shown in Fig. 3a: there is a slight increase after anneal A, significantly more increase after anneal B, and additional moderate increases after C and D. No such capacitance increase is seen when Hf based dielectrics are used (Fig. 3b). The maximum capacitance is found to be ~56fF/um2 after anneal D compared to ~43fF/um2 for the unannealed device, an increase of more than 25%, while the leakage current remains virtually unchanged at 1V, and increases by 2. Thus, we can achieve high capacitance with a relatively thick high-k layer, keeping the leakage current low, all while maintaining compatibility with BEOL processing. [1] T. Ando et al., “CMOS Compatible MIM Decoupling Capacitor with Reliable Sub-nm EOT High-k Stacks for the 7nm Node and Beyond,” Tech. Dig. IEDM 2016, pp. 9.4.1 - 9.4.4. [2] K. Fischer et al., “Low-k Interconnect Stack with multi-layer Air Gap and Tri-Metal-Insulator-Metal Capacitors for 14-nm High Volume Manufacturing,” IEEE Interconnect Tech. Conf. 2015, 10.1109/IITC-MAM.2015.7325600. [3] X. Zhao and D. Vanderbilt, “First-principles Study of Electronic and Dielectric Properties of ZrO2 and HfO2” MRS Proceedings, 747. doi:10.1557/PROC-747-T5.2/N7.2. Figure 1

The IBM z14 is the latest update in the storied history of IBM mainframes. Reliability, availability, security, and scalability are the foundation of the IBM mainframe line. System reliability and availability targets are in excess of 10 years, requiring rigorous chip characterization processes. In this paper, we discuss some of the many processes used to ensure that lifetime. An additional part of this reliability is power management (PM). The 5.2-GHz high-power design of the central processor chip requires advanced on-die PM capabilities to adapt to power intensive instruction streams. We also discuss a number of improvements to the critical path monitoring design used to manage power supply voltage droops, reducing response time and the impact on system performance. Finally, we compare a set of simulations and hardware results to validate our power fluctuation models.