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IBM z14: Processor Characterization and Power Management for High-Reliability Mainframe Systems

Authors :
S. Carey
Christos Vezrytzis
Anthony Saporito
Pierce Chuang
Alper Buyuktosunoglu
Phillip J. Restle
Tobias Webel
Christian Jacobi
Preetham M. Lobo
Hunter Shi
Christopher J. Berry
David H. Wolpert
Dureseti Chidambarrao
Ramon Bertran
Thomas Strach
Pawel Owczarczyk
Yaniv Maroz
Richard F. Rizzolo
Source :
IEEE Journal of Solid-State Circuits. 54:121-132
Publication Year :
2019
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2019.

Abstract

The IBM z14 is the latest update in the storied history of IBM mainframes. Reliability, availability, security, and scalability are the foundation of the IBM mainframe line. System reliability and availability targets are in excess of 10 years, requiring rigorous chip characterization processes. In this paper, we discuss some of the many processes used to ensure that lifetime. An additional part of this reliability is power management (PM). The 5.2-GHz high-power design of the central processor chip requires advanced on-die PM capabilities to adapt to power intensive instruction streams. We also discuss a number of improvements to the critical path monitoring design used to manage power supply voltage droops, reducing response time and the impact on system performance. Finally, we compare a set of simulations and hardware results to validate our power fluctuation models.

Details

ISSN :
1558173X and 00189200
Volume :
54
Database :
OpenAIRE
Journal :
IEEE Journal of Solid-State Circuits
Accession number :
edsair.doi...........a7d77c01b32959ce9e487e72465feba8