Search

The need to substitute fossil fuels for renewables increases dramatically as the climate crisis continues. The Swedish industry sector uses 4,5 TWh petroleum gas per year, which generates greenhouse gas emissions equaling 600 000 cars. A renewable energy source that is often overshadowed is biomethane, which could replace conventional fossil fuels like petroleum gas. Substitution of petroleum gas for biomethane could reduce the climate impact of the Swedish industry sector considerably. This study examines the transition from fossil fuels to biofuels in the food industry, through a case study of candy manufacturer Cloetta's factory in Ljungsbro, Sweden. The study focuses on aspects related to engineering, economy, energy and climate regarding a potential conversion of wafer ovens from petroleum gas to biomethane. The production of wafers is the last process that is dependent on fossil fuels in the Ljungsbro factory. The empirical data was gathered using interviews with relevant actors linked to the conversion, and calculations related to energy, economy and climate. The study found that converting Cloetta's wafer ovens to use biomethane is possible, and should be applicable in similar processes in other industries as well. Since bio methane has a lower volumetric energy density than petroleum gas the fuel supply needs to be increased. The study found that this can be achieved either by increasing the pressure in the piping, or by adding more burner nozzles in the ovens, to increase the velocity of the gas flow. Furthermore, biomethane can be delivered in compressed or liquified form by lorry, alternatively directly by pipeline. The study found that the infrastructure necessary for storage and receipt of biomethane varies considerably in cost depending on the method of delivery. In Cloetta's case, compressed biogas is viewed as the best alternative, mostly for economic reasons. A transition from petroleum gas to biomethane would lead to a large decrease in greenho

The need to substitute fossil fuels for renewables increases dramatically as the climate crisis continues. The Swedish industry sector uses 4,5 TWh petroleum gas per year, which generates greenhouse gas emissions equaling 600 000 cars. A renewable energy source that is often overshadowed is biomethane, which could replace conventional fossil fuels like petroleum gas. Substitution of petroleum gas for biomethane could reduce the climate impact of the Swedish industry sector considerably. This study examines the transition from fossil fuels to biofuels in the food industry, through a case study of candy manufacturer Cloetta's factory in Ljungsbro, Sweden. The study focuses on aspects related to engineering, economy, energy and climate regarding a potential conversion of wafer ovens from petroleum gas to biomethane. The production of wafers is the last process that is dependent on fossil fuels in the Ljungsbro factory. The empirical data was gathered using interviews with relevant actors linked to the conversion, and calculations related to energy, economy and climate. The study found that converting Cloetta's wafer ovens to use biomethane is possible, and should be applicable in similar processes in other industries as well. Since bio methane has a lower volumetric energy density than petroleum gas the fuel supply needs to be increased. The study found that this can be achieved either by increasing the pressure in the piping, or by adding more burner nozzles in the ovens, to increase the velocity of the gas flow. Furthermore, biomethane can be delivered in compressed or liquified form by lorry, alternatively directly by pipeline. The study found that the infrastructure necessary for storage and receipt of biomethane varies considerably in cost depending on the method of delivery. In Cloetta's case, compressed biogas is viewed as the best alternative, mostly for economic reasons. A transition from petroleum gas to biomethane would lead to a large decrease in greenho

Silicon Pore Optics (SPO) have been invented and developed to enable x-ray optics for space applications that require a combination of high angular resolution while being light-weight to allow achieving a large mirror surface area. In 2005, the SPO technology development was initiated by the European Space Agency (ESA) for a flagship x-ray telescope mission and is currently being planned as a baseline for the NewATHENA mission scheduled for launch in the 2030s. Its more than 2m diameter mirror will be segmented and comprises of 492 individual Silicon Pore Optics (SPO) grazing-angle imagers, called mirror modules. Arranged in concentric annuli and following a Wolter-Schwartzschild design, the mirror modules are made of several tens of primary-secondary mirror pairs, each mirror made of silicon, coated to increase the collective area of the system, and shaped to bring the incoming photons to a common focus in 12 m distance. The mission aims to deliver an angular resolution of better than nine arc-seconds (Half-energy width) and effective area of about 1.1 m2 at an energy of 1 keV. We present in this paper the status of the optics production and illustrate not only recent x-ray results but also the progress made on the environmental testing, manufacturing and assembly aspects of SPO based optics.

Athena is the European Space Agency’s next flagship telescope, scheduled for launch in the 2030s. Its 2.5 m diameter mirror will be segmented and comprise more than 600 individual Silicon Pore Optics (SPO) mirror modules. Arranged in concentric annuli and following a Wolter-Schwartzschild design, the mirror modules are made of several tens of grazing incidence primary-secondary mirror pairs, each mirror made of silicon, coated to increase the effective area of the system, and shaped to bring the incoming photons to a common focus 12 m away. The mission aims to deliver a half-energy width of 5" and an effective area of about 1.4 m2 at 1 keV. We present the status of the optics technology, and illustrate recent X-ray results and the progress made on the environmental testing, manufacturing and assembly aspects of the optics.

Since the introduction of adaptive systems for corrective measures, static and dynamic disturbances have been reduced through the manipulation of surface shape in a well-controlled manner. One important application where adaptive systems are highly needed is in the future photo-lithography machines, particularly the wafer table where disturbances affect overlay and focus performance. To reduce overlay and focus errors, a dense array of actuators must be integrated into the wafer table to apply both in- and out-of-plane corrective deformations to the wafer surface. To realize a certain wafer shape, influence functions are linearly superimposed. Accurate models of the influence functions result in an accurate prediction of the final wafer shape. To reduce calibration errors, the influence function of every actuator needs to be determined. Here, we propose a technique to rapidly measure the influence function: the influence function measurement (IFM) technique. Using the actuate-sense property of piezoelectric materials, the influence function is determined by activating one piezo-actuator and measuring the charge induced on the neighboring piezo-actuators. The measured charges are compared to the results of finite element simulations and the absolute difference of 0.3 % is reported for the inter-actuator charge coupling parameters. This clearly indicates the potential of the proposed technique.

Since the introduction of adaptive systems for corrective measures, static and dynamic disturbances have been reduced through the manipulation of surface shape in a well-controlled manner. One important application where adaptive systems are highly needed is in the future photo-lithography machines, particularly the wafer table where disturbances affect overlay and focus performance. To reduce overlay and focus errors, a dense array of actuators must be integrated into the wafer table to apply both in- and out-of-plane corrective deformations to the wafer surface. To realize a certain wafer shape, influence functions are linearly superimposed. Accurate models of the influence functions result in an accurate prediction of the final wafer shape. To reduce calibration errors, the influence function of every actuator needs to be determined. Here, we propose a technique to rapidly measure the influence function: the influence function measurement (IFM) technique. Using the actuate-sense property of piezoelectric materials, the influence function is determined by activating one piezo-actuator and measuring the charge induced on the neighboring piezo-actuators. The measured charges are compared to the results of finite element simulations and the absolute difference of 0.3 % is reported for the inter-actuator charge coupling parameters. This clearly indicates the potential of the proposed technique.

Microchips are made from circular silicon discs called wafers and are manufactured with photolithography. A critical step of a photolithography process is when a wafer with a photoresist is placed on a wafer table (WT) and exposed to light to form patterns that build up components of an integrated circuit (IC). The dimensions of the IC are in nanometer scale and are becoming increasingly smaller. Any changes to the wafer table can contribute to alignment issues or increase overlay between successive exposures and is dependent on interaction with the wafer backside. Common wafer backside materials are silicon, silicon oxide and silicon nitride, which are hydrophilic, so they readily interact with water and adsorb it from the atmosphere. Furthermore, their surface conductivity is highly dependent on the relative humidity (RH) of the air. Additionally, silicon oxide and silicon nitride generate surface charge from single-wafer wet spin tools that are a part of the critical toolset for advanced IC fabrication. In the presence of water, a charged wafer backside can conduct unwanted current through the surface. The occurrence of this phenomena can affect both the performance and yield of the components that the wafer backside comes in contact with during photolithography. This thesis studies reducing the charge generation and surface conductivity of a hydrophilic silicon and silicon nitride wafer backside by depositing hydrophobic self-assembled monolayers (SAM) with silane coupling agents. They are less likely to form surface charge and have lower surface conductivity. The hydrophobic monolayers that are studied are deposited from hexamethyldisilazane (HMDS) and a non-disclosed fluorinated molecule, called F-SAM. HMDS is already used in photolithography on the wafer frontside to promote adhesion to the photoresist and fluorinated molecules are known to be hydrophobic, inert and with high electrical resistance. This surface modification tackles both the wa, Materials Science and Engineering

Abweichender Titel laut Übersetzung der Verfasserin/des Verfassers, Arbeit an der Bibliothek noch nicht eingelangt - Daten nicht geprüft, Innsbruck, Univ., Masterarb., 2021

The Silicon Pore Optics (SPO) technology has been established as a new type of X-ray optics and will enable future X-ray observatories such as Athena and Arcus. SPO is being developed at cosine Research B.V. together with the European Space Agency (ESA) and academic as well as industrial partners. For Athena, about 150,000 mirror plates are required. With the technology spin-in from the semiconductor industry, mass production processes can be employed to manufacture rectangular SPO mirror plates in high quality, large quantity and at low cost. Over the last years, several aspects of the SPO mirror plates have been reviewed and undergone further developments in terms of effective area, intrinsic behavior of the mirror plates and mass production capability. The paper will provide an overview of most recent SPO plate designs, mirror plate production status and plan forward including reflective coating process as well as mass production developments.

A wafer-scale fabrication method for isolated silicon quantum dots (Si QDs) using standard CMOS technology is presented. Reactive ion etching was performed on the device layer of a silicon-on-insulator wafer, creating nano-sized silicon islands. Subsequently, the wafer was annealed at 1100 degrees C for 1 h in an atmosphere of 5% H(2)in Ar, forming a thin oxide passivating layer due to trace amounts of oxygen. Isolated Si QDs covering large areas (similar to mm(2)) were revealed by photoluminescence (PL) measurements. The emission energies of such Si QDs can span over a broad range, from 1.3 to 2.0 eV and each dot is typically characterized by a single emission line at low temperatures. Most of the Si QDs exhibited a high degree of linear polarization along Si crystallographic directions [110] abd [(1) over bar 10]. In addition, system resolution-limited (250 mu eV) PL linewidths (full width at half maximum) were measured for several Si QDs at 10 K, with no clear correlation between emission energy and polarization. The initial part of PL decays was measured at room temperature for such oxide-embedded Si QDs, approximately several microseconds long. By providing direct access to a broad size range of isolated Si QDs on a wafer, this technique paves the way for the future fabrication of photonic structures with Si QDs, which can potentially be used as single-photon sources with a long coherence length., QC 20201027

Warped wafers and all the issues arise with them. are known issue in semiconductor industry. To solve those issues, the shape of the wafer needs to be known precisely. Current way of working when it comes to warped wafers is far from ideal within the company. A batch of wafers is acquired at customer’s site and it is assumed, that all the wafers in the batch are warped identically. A single specimen, representing the whole batch, is then taken to external company to be measured. As the method of measuring currently used contaminates and scratches the wafer, wafer must be scrapped afterwards. All the logistics and scrapped wafers add unnecessary costs to the company. To optimize the warpage measuring procedure, a graduation internship project was initiated with a goal to develop a prototype of the tool, enabling inhouse warpage measuring. The report contains all the methodology used to reach the final concept and results and includes methods such as: WBS, GANTT chart, Functional breakdown, Design requirement specification, Morphological matrix and PUGH’s matrix. Final concept of warpage measuring tool consisted of implementing wafer sorting apparatus for wafer handling and enclosing the measuring tool to a custom housing, resembling a FOUP (Front Opening Unified Pod), allowing wafer sorting apparatus to load and unload test specimen for measuring. The measuring concept consists of rotary stage, where the wafer is loaded and rotated in addition to linear stage, that holds a confocal sensor above the wafer and moves it across the surface of the wafer, measuring the profile of the wafer, rotated every defined number of degrees between the measurements. Gravity induced deflection is eliminated by flipping the wafer using same wafer sorting apparatus and measuring the wafer inverted, thus allowing to estimate the true shape of the wafer. The concept was developed in more detail, drawings for manufacturing the parts were created and the parts for building a functional, Vrängda kiselplattor och de problem som uppstår på grund av det är ett känt fenomen inom halvledarindustrin. För att kringgå dessa problem behövs god mätnoggranhet och det nuvarande sättet att hantera vrängda kiselplattor på inom företaget är långt från idealt. En batch kiselplattor hämtas hos kunden med antagandet att alla kiselplattor är identiskt vrängda. Ett enda exemplar som representerar hela batchen väljs sedan ut och skickas till ett externt mätföretag. Metoden som används för att mäta kiselplattan innehåller föroreningar och metoden repar även kiselplattan, som därmed inte kan användas efteråt. Utöver mätmetodens brister tillkommer även en utökad logistik och större materialspill som tillför kostnader för företaget. Examensarbetets syfte är att förbättra mätmetoden som används för att utvärdera kiselplattornas vrängning och målet med projektet är att utveckla en prototyp som tillåter att mätmetoden görs internt inom företaget. Rapporten innehåller metodiken som användes för att uppnå det slutgiltiga konceptet samt resultatet, och innehåller planeringsmoment samt projektets delmoment som: WBS, GANNT, funktionsnedbrytning, kravspecifikationer samt urvalsmatriser. Det valda konceptet består av en sorteringsmaskin kombinerat med mätutrustningen och liknar en FOUP (Front Opening Unified Pod), vilket tillåter sorteringsmaskinen att tillföra och byta ut kiselplattorna som ska mätas. Mätutrustningen består av en roterande rörelse hos kiselplattan och en linjär rörelse hos en konfokal sensor placerad ovanför kiselplattan. Kombinationen av de båda rörelserna tillåter att hela kiselplattans yta mäts med ett givet vinkel- och radiellt steg. Genom att vända kiselplattan uppochner med sorteringsmaskinen och utföra samma mätning igen kan kiselplattans korrekta form estimeras genom att eliminera gravitationseffekten. Konceptet utvecklades i detalj och tillverkningsunderlag och ritningar togs fram samt komponenter avsedda för tillverkning av en prototyp beställdes. På g

III-V semiconductor nanowires (NWs) display outstanding potential for many technological applications, but their implementation into devices is restricted due to high material and fabrication costs. Common techniques for NW synthesis rely on single crystalline substrates, which are single-use and have large costs associated to them. In this project a method for substrate reuse was designed and investigated. An aluminum phosphide (AlP) segment was grown as the base of gallium phosphide (GaP) NWs. The AlP segment was used as a sacrificial layer, allowing for separation of the GaP NWs from the GaP substrates used, thereby allowing for several uses of a substrate. These axial AlP/GaP NWs were synthesized with the vapor-liquid-solid growth mode, using metal organic vapor phase epitaxy. During the project, the combination of the AlP and GaP compound materials was investigated regarding epitaxial growth, chemical etch characteristics and potential for substrate reuse. As a reference to the approach with an AlP sacrificial layer it was investigated if reuse of a GaP wafer was possible after standard GaP NW growth. The wafer surface was planarized by wet chemical etching, before processing was performed. Regrowth of GaP NWs was possible with a yield of 50 %. The highest yields obtained for GaP, AlP and axial AlP/GaP NW growth were 96 %, 96 % and 97 % respectively. For the regrowth experiments axial AlP/GaP NWs were grown with a 80 % yield on 1x1 cm^2 substrates. This project reports on two cycles of reuse using this approach. For the first cycle an overall yield of 82 % could be achieved, during the given time of this project, and in the second cycle the yield was slightly lower at 75 %. The substrates were still intact after the second regrowth and it should be possible to further reuse them.

A wafer-scale fabrication method for isolated silicon quantum dots (Si QDs) using standard CMOS technology is presented. Reactive ion etching was performed on the device layer of a silicon-on-insulator wafer, creating nano-sized silicon islands. Subsequently, the wafer was annealed at 1100 degrees C for 1 h in an atmosphere of 5% H(2)in Ar, forming a thin oxide passivating layer due to trace amounts of oxygen. Isolated Si QDs covering large areas (similar to mm(2)) were revealed by photoluminescence (PL) measurements. The emission energies of such Si QDs can span over a broad range, from 1.3 to 2.0 eV and each dot is typically characterized by a single emission line at low temperatures. Most of the Si QDs exhibited a high degree of linear polarization along Si crystallographic directions [110] abd [(1) over bar 10]. In addition, system resolution-limited (250 mu eV) PL linewidths (full width at half maximum) were measured for several Si QDs at 10 K, with no clear correlation between emission energy and polarization. The initial part of PL decays was measured at room temperature for such oxide-embedded Si QDs, approximately several microseconds long. By providing direct access to a broad size range of isolated Si QDs on a wafer, this technique paves the way for the future fabrication of photonic structures with Si QDs, which can potentially be used as single-photon sources with a long coherence length., QC 20201027

A wafer-scale fabrication method for isolated silicon quantum dots (Si QDs) using standard CMOS technology is presented. Reactive ion etching was performed on the device layer of a silicon-on-insulator wafer, creating nano-sized silicon islands. Subsequently, the wafer was annealed at 1100 degrees C for 1 h in an atmosphere of 5% H(2)in Ar, forming a thin oxide passivating layer due to trace amounts of oxygen. Isolated Si QDs covering large areas (similar to mm(2)) were revealed by photoluminescence (PL) measurements. The emission energies of such Si QDs can span over a broad range, from 1.3 to 2.0 eV and each dot is typically characterized by a single emission line at low temperatures. Most of the Si QDs exhibited a high degree of linear polarization along Si crystallographic directions [110] abd [(1) over bar 10]. In addition, system resolution-limited (250 mu eV) PL linewidths (full width at half maximum) were measured for several Si QDs at 10 K, with no clear correlation between emission energy and polarization. The initial part of PL decays was measured at room temperature for such oxide-embedded Si QDs, approximately several microseconds long. By providing direct access to a broad size range of isolated Si QDs on a wafer, this technique paves the way for the future fabrication of photonic structures with Si QDs, which can potentially be used as single-photon sources with a long coherence length., QC 20201027

Warped wafers and all the issues arise with them. are known issue in semiconductor industry. To solve those issues, the shape of the wafer needs to be known precisely. Current way of working when it comes to warped wafers is far from ideal within the company. A batch of wafers is acquired at customer’s site and it is assumed, that all the wafers in the batch are warped identically. A single specimen, representing the whole batch, is then taken to external company to be measured. As the method of measuring currently used contaminates and scratches the wafer, wafer must be scrapped afterwards. All the logistics and scrapped wafers add unnecessary costs to the company. To optimize the warpage measuring procedure, a graduation internship project was initiated with a goal to develop a prototype of the tool, enabling inhouse warpage measuring. The report contains all the methodology used to reach the final concept and results and includes methods such as: WBS, GANTT chart, Functional breakdown, Design requirement specification, Morphological matrix and PUGH’s matrix. Final concept of warpage measuring tool consisted of implementing wafer sorting apparatus for wafer handling and enclosing the measuring tool to a custom housing, resembling a FOUP (Front Opening Unified Pod), allowing wafer sorting apparatus to load and unload test specimen for measuring. The measuring concept consists of rotary stage, where the wafer is loaded and rotated in addition to linear stage, that holds a confocal sensor above the wafer and moves it across the surface of the wafer, measuring the profile of the wafer, rotated every defined number of degrees between the measurements. Gravity induced deflection is eliminated by flipping the wafer using same wafer sorting apparatus and measuring the wafer inverted, thus allowing to estimate the true shape of the wafer. The concept was developed in more detail, drawings for manufacturing the parts were created and the parts for building a functional, Vrängda kiselplattor och de problem som uppstår på grund av det är ett känt fenomen inom halvledarindustrin. För att kringgå dessa problem behövs god mätnoggranhet och det nuvarande sättet att hantera vrängda kiselplattor på inom företaget är långt från idealt. En batch kiselplattor hämtas hos kunden med antagandet att alla kiselplattor är identiskt vrängda. Ett enda exemplar som representerar hela batchen väljs sedan ut och skickas till ett externt mätföretag. Metoden som används för att mäta kiselplattan innehåller föroreningar och metoden repar även kiselplattan, som därmed inte kan användas efteråt. Utöver mätmetodens brister tillkommer även en utökad logistik och större materialspill som tillför kostnader för företaget. Examensarbetets syfte är att förbättra mätmetoden som används för att utvärdera kiselplattornas vrängning och målet med projektet är att utveckla en prototyp som tillåter att mätmetoden görs internt inom företaget. Rapporten innehåller metodiken som användes för att uppnå det slutgiltiga konceptet samt resultatet, och innehåller planeringsmoment samt projektets delmoment som: WBS, GANNT, funktionsnedbrytning, kravspecifikationer samt urvalsmatriser. Det valda konceptet består av en sorteringsmaskin kombinerat med mätutrustningen och liknar en FOUP (Front Opening Unified Pod), vilket tillåter sorteringsmaskinen att tillföra och byta ut kiselplattorna som ska mätas. Mätutrustningen består av en roterande rörelse hos kiselplattan och en linjär rörelse hos en konfokal sensor placerad ovanför kiselplattan. Kombinationen av de båda rörelserna tillåter att hela kiselplattans yta mäts med ett givet vinkel- och radiellt steg. Genom att vända kiselplattan uppochner med sorteringsmaskinen och utföra samma mätning igen kan kiselplattans korrekta form estimeras genom att eliminera gravitationseffekten. Konceptet utvecklades i detalj och tillverkningsunderlag och ritningar togs fram samt komponenter avsedda för tillverkning av en prototyp beställdes. På g

III-V semiconductor nanowires (NWs) display outstanding potential for many technological applications, but their implementation into devices is restricted due to high material and fabrication costs. Common techniques for NW synthesis rely on single crystalline substrates, which are single-use and have large costs associated to them. In this project a method for substrate reuse was designed and investigated. An aluminum phosphide (AlP) segment was grown as the base of gallium phosphide (GaP) NWs. The AlP segment was used as a sacrificial layer, allowing for separation of the GaP NWs from the GaP substrates used, thereby allowing for several uses of a substrate. These axial AlP/GaP NWs were synthesized with the vapor-liquid-solid growth mode, using metal organic vapor phase epitaxy. During the project, the combination of the AlP and GaP compound materials was investigated regarding epitaxial growth, chemical etch characteristics and potential for substrate reuse. As a reference to the approach with an AlP sacrificial layer it was investigated if reuse of a GaP wafer was possible after standard GaP NW growth. The wafer surface was planarized by wet chemical etching, before processing was performed. Regrowth of GaP NWs was possible with a yield of 50 %. The highest yields obtained for GaP, AlP and axial AlP/GaP NW growth were 96 %, 96 % and 97 % respectively. For the regrowth experiments axial AlP/GaP NWs were grown with a 80 % yield on 1x1 cm^2 substrates. This project reports on two cycles of reuse using this approach. For the first cycle an overall yield of 82 % could be achieved, during the given time of this project, and in the second cycle the yield was slightly lower at 75 %. The substrates were still intact after the second regrowth and it should be possible to further reuse them.

A wafer-scale fabrication method for isolated silicon quantum dots (Si QDs) using standard CMOS technology is presented. Reactive ion etching was performed on the device layer of a silicon-on-insulator wafer, creating nano-sized silicon islands. Subsequently, the wafer was annealed at 1100 degrees C for 1 h in an atmosphere of 5% H(2)in Ar, forming a thin oxide passivating layer due to trace amounts of oxygen. Isolated Si QDs covering large areas (similar to mm(2)) were revealed by photoluminescence (PL) measurements. The emission energies of such Si QDs can span over a broad range, from 1.3 to 2.0 eV and each dot is typically characterized by a single emission line at low temperatures. Most of the Si QDs exhibited a high degree of linear polarization along Si crystallographic directions [110] abd [(1) over bar 10]. In addition, system resolution-limited (250 mu eV) PL linewidths (full width at half maximum) were measured for several Si QDs at 10 K, with no clear correlation between emission energy and polarization. The initial part of PL decays was measured at room temperature for such oxide-embedded Si QDs, approximately several microseconds long. By providing direct access to a broad size range of isolated Si QDs on a wafer, this technique paves the way for the future fabrication of photonic structures with Si QDs, which can potentially be used as single-photon sources with a long coherence length., QC 20201027

A wafer-scale fabrication method for isolated silicon quantum dots (Si QDs) using standard CMOS technology is presented. Reactive ion etching was performed on the device layer of a silicon-on-insulator wafer, creating nano-sized silicon islands. Subsequently, the wafer was annealed at 1100 degrees C for 1 h in an atmosphere of 5% H(2)in Ar, forming a thin oxide passivating layer due to trace amounts of oxygen. Isolated Si QDs covering large areas (similar to mm(2)) were revealed by photoluminescence (PL) measurements. The emission energies of such Si QDs can span over a broad range, from 1.3 to 2.0 eV and each dot is typically characterized by a single emission line at low temperatures. Most of the Si QDs exhibited a high degree of linear polarization along Si crystallographic directions [110] abd [(1) over bar 10]. In addition, system resolution-limited (250 mu eV) PL linewidths (full width at half maximum) were measured for several Si QDs at 10 K, with no clear correlation between emission energy and polarization. The initial part of PL decays was measured at room temperature for such oxide-embedded Si QDs, approximately several microseconds long. By providing direct access to a broad size range of isolated Si QDs on a wafer, this technique paves the way for the future fabrication of photonic structures with Si QDs, which can potentially be used as single-photon sources with a long coherence length., QC 20201027

We report electrically pumped, continuous-wave (cw) InAs& x002F;GaAs quantum dot (QD) lasers directly grown on quasi-nominal Si (001) substrates with offcut angle as small as 0.4& x00B0;. No GaP, Ge buffer layers or substrate patterning is required. An anti-phase boundary free epitaxial GaAs film was grown by metal-organic chemical vapor deposition (MOCVD) with a low threading dislocation density of 3 & x00D7; 10(7) cm(-2). Room-temperature cw lasing at similar to 1.3& x00A0;& x03BC;m has been achieved, with a minimum threshold current density of 34.6 A& x002F;cm(2) per layer, a maximum operating temperature of 80& x00A0;& x00B0;C, and a maximum single facet output power of 52 mW. A comparison of various monolithic III-V hetero-epitaxy on Si solutions is presented. Direct growth on unpatterned quasi-nominal (001) Si may yield the best material quality at the lowest lifecycle cost.

A three-fold reduction of threshold current, with a minimum threshold current density of 286 A/cm(2), a maximum operating temperature of 80 degrees C, and a maximum 3-dB band-width of 5.8 GHz was achieved for 1.3-mu m InAs quantum dot lasers on patterned, on-axis (001) Si. This was enabled by the reduced threading dislocation density (from 7 x 10(7) to 3 x 10(6) cm(-2)), and optimized probe design. The patterned Si produced antiphase domain free material in the coalesced GaAs buffer layer with reduced misfit/threading dislocation nucleation, without the use of Ge/GaP buffers or substrate miscut. Utilizing aspect ratio trapping, cyclic thermal annealing, and dislocation filter layers, high-quality III-V on Si devices were grown, demonstrating the compelling advantages of this patterned Si template for a monolithic Si photonics integration platform.

Silicon Pore Optics (SPO) uses commercially available monocrystalline double-sided super-polished silicon wafers as a basis to produce mirrors that form lightweight and stiff high-resolution x-ray optics. The technology has been invented by cosine and the European Space Agency (ESA) and developed together with scientific and industrial partners to mass production levels. SPO is an enabling element for large space-based x-ray telescopes such as Athena and ARCUS, operating in the 0.2 to 12 keV band, with angular resolution requirements up to 5 arc seconds. SPO has also shown to be a versatile technology that can be further developed for gamma-ray optics, medical applications and for material research. This paper will summarise the status of the technology and of the mass production capabilities, show latest performance results and discuss the next steps in the development.

The Silicon Pore Optics (SPO) technology has been established as a new type of X-ray optics enabling future X-ray observatories such as ATHENA. SPO is being developed at cosine together with the European Space Agency (ESA) and academic as well as industrial partners. The SPO modules are lightweight, yet stiff, high-resolution X-ray optics, allowing missions to reach a large effective area of several square meters. These properties of the optics are mainly linked to the mirror plates consisting of mono-crystalline silicon. Silicon is rigid, has a relatively low density, a very good thermal conductivity and excellent surface finish, both in terms of figure and surface roughness. For Athena, a large number of mirror plates is required, around 100,000 for the nominal configuration. With the technology spin-in from the semiconductor industry, mass production processes can be employed to manufacture rectangular shapes SPO mirror plates in high quality, large quantity and at low cost. Within the last years, several aspects of the SPO mirror plate have been reviewed and undergone further developments in terms of effective area, intrinsic behavior of the mirror plates and mass production capability. In view of flight model production, a second source of mirror plates has been added in addition to the first plate supplier. The paper will provide an overview of most recent plate design, metrology and production developments.

Silicon Pore Optics (SPO) has been established as a new type of x-ray optics that enables future x-ray observatories such as Athena. SPO is being developed at cosine with the European Space Agency (ESA) and academic and industrial partners. The optics modules are lightweight, yet stiff, high-resolution x-ray optics, that shall allow missions to reach an unprecedentedly large effective area of several square meters, operating in the 0.2 - 12 keV band with an angular resolution better than 5 arc seconds. In this paper we are going to discuss the latest generation production facilities and we are going to present results of the production of mirror modules for a focal length of 12 m, including x-ray test results.

Wafer werden in modernen Halbleiterfabriken mit automatisierten, schienengebundenen Deckenfahrzeugen (OHT) durch die Fertigungslinien transportiert. Die dabei entstehenden Schwingungen, z. B. durch Schienenstöße oder durch Hub- und Senkvorgänge, werden auf den Transportbehälter und schließlich auf die Wafer übertragen. Stimmt die Betriebsfrequenz aus dem Transport mit der Eigenschwingung des jeweiligen Wafers überein, entsteht eine Resonanz, die zum Bruch der Wafer und hohen wirtschaftlichen Schaden führen können. Um dies zu vermeiden, müssen die Eigenfrequenzen der beteiligten Systemelemente untersucht werden. In einem Schwingprüfstand wurden die Eigenfrequenzen von Wafern separat und in Verbindung mit ihrer Transportbox, dem Front Opening Unified Pod (FOUP) bestimmt. Dabei wurde der FOUP wie im Betrieb hängend an der dafür vorgesehenen Halterung befestigt und mit einem Schwingerreger erregt. Mithilfe einer Modalanalyse im FE-Modell konnten die Eigenfrequenzen und Frequenzverläufe ermittelt sowie die Schwingformen an den jeweiligen Messpositionen reproduziert werden. Weiterhin wurden simulativ wie auch experimentell schwingungsmindernde Maßnahmen durchgeführt. Die Ergebnisse sehen eine Versteifung der Halterung des FOUP als wirksamste Lösung., Wafers are transported through the manufacturing lines in modern semiconductor factories with automated, rail mounted and ceiling mounted vehicles (OHT). The resulting vibrations, for example, by shaving or lifting and lowering operations, are transferred to the transport container and finally to the wafers. If the operating frequency from the transport and the natural frequency of the respective wafer is accord, a resonance is formed, which can lead to the breakage of the wafers and high economic damage. In order to avoid this, the natural frequencies of the involved system elements have to be investigated. In a vibration test bench, the natural frequencies of wafers were determined separately and in conjunction with their transport box, the Front Opening Unified Pod (FOUP). As in operation, the FOUP was hanging mounted on the provided fixture and excited with a shaker. By means of a modal analysis in the FE simulation, the natural frequencies and frequency profiles were determined and the vibration forms were reproduced at the respective measuring positions. Furthermore, simulations as well as experimentally vibration reducing measures were carried out. The results see a stiffening of the fixture of the FOUP as the most effective solution.

Wafer werden in modernen Halbleiterfabriken mit automatisierten, schienengebundenen Deckenfahrzeugen (OHT) durch die Fertigungslinien transportiert. Die dabei entstehenden Schwingungen, z. B. durch Schienenstöße oder durch Hub- und Senkvorgänge, werden auf den Transportbehälter und schließlich auf die Wafer übertragen. Stimmt die Betriebsfrequenz aus dem Transport mit der Eigenschwingung des jeweiligen Wafers überein, entsteht eine Resonanz, die zum Bruch der Wafer und hohen wirtschaftlichen Schaden führen können. Um dies zu vermeiden, müssen die Eigenfrequenzen der beteiligten Systemelemente untersucht werden. In einem Schwingprüfstand wurden die Eigenfrequenzen von Wafern separat und in Verbindung mit ihrer Transportbox, dem Front Opening Unified Pod (FOUP) bestimmt. Dabei wurde der FOUP wie im Betrieb hängend an der dafür vorgesehenen Halterung befestigt und mit einem Schwingerreger erregt. Mithilfe einer Modalanalyse im FE-Modell konnten die Eigenfrequenzen und Frequenzverläufe ermittelt sowie die Schwingformen an den jeweiligen Messpositionen reproduziert werden. Weiterhin wurden simulativ wie auch experimentell schwingungsmindernde Maßnahmen durchgeführt. Die Ergebnisse sehen eine Versteifung der Halterung des FOUP als wirksamste Lösung., Wafers are transported through the manufacturing lines in modern semiconductor factories with automated, rail mounted and ceiling mounted vehicles (OHT). The resulting vibrations, for example, by shaving or lifting and lowering operations, are transferred to the transport container and finally to the wafers. If the operating frequency from the transport and the natural frequency of the respective wafer is accord, a resonance is formed, which can lead to the breakage of the wafers and high economic damage. In order to avoid this, the natural frequencies of the involved system elements have to be investigated. In a vibration test bench, the natural frequencies of wafers were determined separately and in conjunction with their transport box, the Front Opening Unified Pod (FOUP). As in operation, the FOUP was hanging mounted on the provided fixture and excited with a shaker. By means of a modal analysis in the FE simulation, the natural frequencies and frequency profiles were determined and the vibration forms were reproduced at the respective measuring positions. Furthermore, simulations as well as experimentally vibration reducing measures were carried out. The results see a stiffening of the fixture of the FOUP as the most effective solution.

Wafer werden in modernen Halbleiterfabriken mit automatisierten, schienengebundenen Deckenfahrzeugen (OHT) durch die Fertigungslinien transportiert. Die dabei entstehenden Schwingungen, z. B. durch Schienenstöße oder durch Hub- und Senkvorgänge, werden auf den Transportbehälter und schließlich auf die Wafer übertragen. Stimmt die Betriebsfrequenz aus dem Transport mit der Eigenschwingung des jeweiligen Wafers überein, entsteht eine Resonanz, die zum Bruch der Wafer und hohen wirtschaftlichen Schaden führen können. Um dies zu vermeiden, müssen die Eigenfrequenzen der beteiligten Systemelemente untersucht werden. In einem Schwingprüfstand wurden die Eigenfrequenzen von Wafern separat und in Verbindung mit ihrer Transportbox, dem Front Opening Unified Pod (FOUP) bestimmt. Dabei wurde der FOUP wie im Betrieb hängend an der dafür vorgesehenen Halterung befestigt und mit einem Schwingerreger erregt. Mithilfe einer Modalanalyse im FE-Modell konnten die Eigenfrequenzen und Frequenzverläufe ermittelt sowie die Schwingformen an den jeweiligen Messpositionen reproduziert werden. Weiterhin wurden simulativ wie auch experimentell schwingungsmindernde Maßnahmen durchgeführt. Die Ergebnisse sehen eine Versteifung der Halterung des FOUP als wirksamste Lösung., Wafers are transported through the manufacturing lines in modern semiconductor factories with automated, rail mounted and ceiling mounted vehicles (OHT). The resulting vibrations, for example, by shaving or lifting and lowering operations, are transferred to the transport container and finally to the wafers. If the operating frequency from the transport and the natural frequency of the respective wafer is accord, a resonance is formed, which can lead to the breakage of the wafers and high economic damage. In order to avoid this, the natural frequencies of the involved system elements have to be investigated. In a vibration test bench, the natural frequencies of wafers were determined separately and in conjunction with their transport box, the Front Opening Unified Pod (FOUP). As in operation, the FOUP was hanging mounted on the provided fixture and excited with a shaker. By means of a modal analysis in the FE simulation, the natural frequencies and frequency profiles were determined and the vibration forms were reproduced at the respective measuring positions. Furthermore, simulations as well as experimentally vibration reducing measures were carried out. The results see a stiffening of the fixture of the FOUP as the most effective solution.

Wafer werden in modernen Halbleiterfabriken mit automatisierten, schienengebundenen Deckenfahrzeugen (OHT) durch die Fertigungslinien transportiert. Die dabei entstehenden Schwingungen, z. B. durch Schienenstöße oder durch Hub- und Senkvorgänge, werden auf den Transportbehälter und schließlich auf die Wafer übertragen. Stimmt die Betriebsfrequenz aus dem Transport mit der Eigenschwingung des jeweiligen Wafers überein, entsteht eine Resonanz, die zum Bruch der Wafer und hohen wirtschaftlichen Schaden führen können. Um dies zu vermeiden, müssen die Eigenfrequenzen der beteiligten Systemelemente untersucht werden. In einem Schwingprüfstand wurden die Eigenfrequenzen von Wafern separat und in Verbindung mit ihrer Transportbox, dem Front Opening Unified Pod (FOUP) bestimmt. Dabei wurde der FOUP wie im Betrieb hängend an der dafür vorgesehenen Halterung befestigt und mit einem Schwingerreger erregt. Mithilfe einer Modalanalyse im FE-Modell konnten die Eigenfrequenzen und Frequenzverläufe ermittelt sowie die Schwingformen an den jeweiligen Messpositionen reproduziert werden. Weiterhin wurden simulativ wie auch experimentell schwingungsmindernde Maßnahmen durchgeführt. Die Ergebnisse sehen eine Versteifung der Halterung des FOUP als wirksamste Lösung., Wafers are transported through the manufacturing lines in modern semiconductor factories with automated, rail mounted and ceiling mounted vehicles (OHT). The resulting vibrations, for example, by shaving or lifting and lowering operations, are transferred to the transport container and finally to the wafers. If the operating frequency from the transport and the natural frequency of the respective wafer is accord, a resonance is formed, which can lead to the breakage of the wafers and high economic damage. In order to avoid this, the natural frequencies of the involved system elements have to be investigated. In a vibration test bench, the natural frequencies of wafers were determined separately and in conjunction with their transport box, the Front Opening Unified Pod (FOUP). As in operation, the FOUP was hanging mounted on the provided fixture and excited with a shaker. By means of a modal analysis in the FE simulation, the natural frequencies and frequency profiles were determined and the vibration forms were reproduced at the respective measuring positions. Furthermore, simulations as well as experimentally vibration reducing measures were carried out. The results see a stiffening of the fixture of the FOUP as the most effective solution.

Topology optimization is a strong approach for generating optimal designs which cannot be obtained using conventional optimization methods. Improving structural characteristics by changing the internal topology of a design domain has been fascinating scientists and engineers for years. Topology optimization can be described as a distribution of a given amount of material in a specified design domain, which is subjected to certain loading and boundary conditions. This domain can then be optimized to minimize specified objectives, for example compliance. For static problems, topology optimization is extensively used. The distribution of material, void and solid regions, can be used to solve several problems within the mechanical domain. However, this method of optimization is also used to optimize structures with respect to their resonant dynamics. Design of actuator placement is used to determine the most optimal actuator layout for a given objective, for example reducing responses. Combined with topology optimization, both design variables can influence each other, and be optimized towards the wanted behavior. This is done in a static domain. When material is removed, the force layout is updated, which influences the material distribution again. It is shown that the combination of these design variables in the optimization process, contributes to a better result; weight reduction can be achieved, while large deformations are preserved. Design of actuator placement, combined with topology optimization is also implemented in a dynamic domain. Since topology changes result in frequency response changes, the force placement is more sensitive. On the other hand, forces can be placed in a smart way, to ensure some mode shapes are not excited, whereas others are. By enabling positive and negative forces these forces can even be used to counteract or minimize certain modal responses. When implementing for example a harmonic excitation, the weight and total, Mechanical Engineering | Precision and Microsystems Engineering

Topology optimization is a strong approach for generating optimal designs which cannot be obtained using conventional optimization methods. Improving structural characteristics by changing the internal topology of a design domain has been fascinating scientists and engineers for years. Topology optimization can be described as a distribution of a given amount of material in a specified design domain, which is subjected to certain loading and boundary conditions. This domain can then be optimized to minimize specified objectives, for example compliance. For static problems, topology optimization is extensively used. The distribution of material, void and solid regions, can be used to solve several problems within the mechanical domain. However, this method of optimization is also used to optimize structures with respect to their resonant dynamics. Design of actuator placement is used to determine the most optimal actuator layout for a given objective, for example reducing responses. Combined with topology optimization, both design variables can influence each other, and be optimized towards the wanted behavior. This is done in a static domain. When material is removed, the force layout is updated, which influences the material distribution again. It is shown that the combination of these design variables in the optimization process, contributes to a better result; weight reduction can be achieved, while large deformations are preserved. Design of actuator placement, combined with topology optimization is also implemented in a dynamic domain. Since topology changes result in frequency response changes, the force placement is more sensitive. On the other hand, forces can be placed in a smart way, to ensure some mode shapes are not excited, whereas others are. By enabling positive and negative forces these forces can even be used to counteract or minimize certain modal responses. When implementing for example a harmonic excitation, the weight and total, Mechanical Engineering | Precision and Microsystems Engineering

Wafer werden in modernen Halbleiterfabriken mit automatisierten, schienengebundenen Deckenfahrzeugen (OHT) durch die Fertigungslinien transportiert. Die dabei entstehenden Schwingungen, z. B. durch Schienenstöße oder durch Hub- und Senkvorgänge, werden auf den Transportbehälter und schließlich auf die Wafer übertragen. Stimmt die Betriebsfrequenz aus dem Transport mit der Eigenschwingung des jeweiligen Wafers überein, entsteht eine Resonanz, die zum Bruch der Wafer und hohen wirtschaftlichen Schaden führen können. Um dies zu vermeiden, müssen die Eigenfrequenzen der beteiligten Systemelemente untersucht werden. In einem Schwingprüfstand wurden die Eigenfrequenzen von Wafern separat und in Verbindung mit ihrer Transportbox, dem Front Opening Unified Pod (FOUP) bestimmt. Dabei wurde der FOUP wie im Betrieb hängend an der dafür vorgesehenen Halterung befestigt und mit einem Schwingerreger erregt. Mithilfe einer Modalanalyse im FE-Modell konnten die Eigenfrequenzen und Frequenzverläufe ermittelt sowie die Schwingformen an den jeweiligen Messpositionen reproduziert werden. Weiterhin wurden simulativ wie auch experimentell schwingungsmindernde Maßnahmen durchgeführt. Die Ergebnisse sehen eine Versteifung der Halterung des FOUP als wirksamste Lösung., Wafers are transported through the manufacturing lines in modern semiconductor factories with automated, rail mounted and ceiling mounted vehicles (OHT). The resulting vibrations, for example, by shaving or lifting and lowering operations, are transferred to the transport container and finally to the wafers. If the operating frequency from the transport and the natural frequency of the respective wafer is accord, a resonance is formed, which can lead to the breakage of the wafers and high economic damage. In order to avoid this, the natural frequencies of the involved system elements have to be investigated. In a vibration test bench, the natural frequencies of wafers were determined separately and in conjunction with their transport box, the Front Opening Unified Pod (FOUP). As in operation, the FOUP was hanging mounted on the provided fixture and excited with a shaker. By means of a modal analysis in the FE simulation, the natural frequencies and frequency profiles were determined and the vibration forms were reproduced at the respective measuring positions. Furthermore, simulations as well as experimentally vibration reducing measures were carried out. The results see a stiffening of the fixture of the FOUP as the most effective solution.

Silicon Pore Optics (SPO), developed at cosine with the European Space Agency (ESA) and several academic and industrial partners, provides lightweight, yet stiff, high-resolution X-ray optics. This technology enables ATHENA to reach an unprecedentedly large effective area in the 0.2-12 keV band with an angular resolution better than 5". After developing the technology for 50 m and 20 m focal length, this year has witnessed the first 12 m focal length mirror modules being produced. The technology development is also gaining momentum with three different radii under study: Mirror modules for the inner radii (Rmin = 250 mm), outer radii (Rmax = 1500 mm) and middle radii (Rmid= 737 mm) are being developed in parallel.

Silicon wafers are getting bigger and bigger in the production line, aiming for faster manufacturing, lower cost and higher yield. The handling/transportation technique is becoming more and more critical during the production. As the wafer is being handled with physical contact there is always risk of damage and contemination coming from the contact surface. Contactless wafer stage utilizes a thin film of pressurized air to support the wafer, provides wafer handling without physical contact, hence reducing the risk of damage and contamination. A special contactless 3DoF wafer stage called "the Flowerbed" is developed by H.P.Vuong during his PhD research. This flowerbed has a creative mechanical design to combine the wafer support and driving function, so that the wafer can be supported and driven by pressurized air with 3 degrees of freedom (x-y-theta). The goal of this MSc research is to design an actuation system for the Flowerbed, and design a special pneumatic actuator specific for this application. Two actuation configurations are discussed and the concept of 3-RPR parallel manipulator is chosen. Pneumatic actuator is chosen to be the type of actuator in this research. This pneumatic actuator has to be specially made, because the requirement of the actuators is, that it should have a stroke of 80 micro meters, with a maximum force of higher than 140N, and the required bandwidth is 150Hz. Such pneumatic actuator is rarely seen and is not available. A model is developed for this special pneumatic actuator, and is validated by test setups. Further development is made by a design with piezo buzzer. This piezo buzzer is implemented as a low cost valve with high performance, and the use of piezo buzzer makes it possible to integrate the valve into the actuator housing, hence further reduce the cost and improve the performance. A prototype is made to demonstrate the feasibility of such kind of pneumatic actuator. This prototype meets the requirement of the actuator an, Mechatronic System Design, Precision and Microsystems Engineering, Mechanical, Maritime and Materials Engineering

Silicon wafers are getting bigger and bigger in the production line, aiming for faster manufacturing, lower cost and higher yield. The handling/transportation technique is becoming more and more critical during the production. As the wafer is being handled with physical contact there is always risk of damage and contemination coming from the contact surface. Contactless wafer stage utilizes a thin film of pressurized air to support the wafer, provides wafer handling without physical contact, hence reducing the risk of damage and contamination. A special contactless 3DoF wafer stage called "the Flowerbed" is developed by H.P.Vuong during his PhD research. This flowerbed has a creative mechanical design to combine the wafer support and driving function, so that the wafer can be supported and driven by pressurized air with 3 degrees of freedom (x-y-theta). The goal of this MSc research is to design an actuation system for the Flowerbed, and design a special pneumatic actuator specific for this application. Two actuation configurations are discussed and the concept of 3-RPR parallel manipulator is chosen. Pneumatic actuator is chosen to be the type of actuator in this research. This pneumatic actuator has to be specially made, because the requirement of the actuators is, that it should have a stroke of 80 micro meters, with a maximum force of higher than 140N, and the required bandwidth is 150Hz. Such pneumatic actuator is rarely seen and is not available. A model is developed for this special pneumatic actuator, and is validated by test setups. Further development is made by a design with piezo buzzer. This piezo buzzer is implemented as a low cost valve with high performance, and the use of piezo buzzer makes it possible to integrate the valve into the actuator housing, hence further reduce the cost and improve the performance. A prototype is made to demonstrate the feasibility of such kind of pneumatic actuator. This prototype meets the requirement of the actuator an, Mechatronic System Design, Precision and Microsystems Engineering, Mechanical, Maritime and Materials Engineering

The ATHENA mission, a European large (L) class X-ray observatory to be launched in 2028, will essentially consist of an X-ray lens and two focal plane instruments. The lens, based on a Wolter-I type double reflection grazing incidence angle design, will be very large (similar to 3 m in diameter) to meet the science requirements of large effective area (1-2 m(2) at a few keV) at a focal length of 12 m. To meet the high angular resolution (5 arc seconds) requirement the X-ray lens will also need to be very accurate. Silicon Pore Optics (SPO) technology has been invented to enable building such a lens and thus enabling the ATHENA mission. We will report in this paper on the latest status of the development, including details of X-ray test campaigns.

Розробка пристроїв і систем вирощування злитків арсеніду галію для виробів мікро, нано електроніки та фотовольтаіки. У роботі представлені результати розробки системи керування процесом вирощування зливків арсеніду галія, теплового вузла, методу й системи виміру внутрішніх напружень у пластинах арсеніду галію. Представлені в роботі технічні рішення дозволили одержати злитки кремнію діаметром 100 мм. с рухливістю, см2 В-1 с-1 - 2500 ÷ 3500; концентрацій носіїв заряду, см-3 - 5x1017 ÷ 5x1018; густиною дислокацій, см-2 - до 8x104.

Gallium arsenide is a perspective semiconductor, the need for which is constantly increasing. This is associated with the development of electronic components operating in excess of the high frequency range and development of terrestrial photovoltaics based on gallium arsenide solar cells. Increase in diameter of grown ingots leads to a deterioration in their performance, which is caused by the imperfection of growing technology. The paper presents the results of the development of systems and devices which help to improve existing technology to produce GaAs ingots and wafers with a diameter of 100 mm with the best technical parameters. Developed a system to manage growing GaAs ingot. As a sensor of diameter ingot it uses a weighting method provides a measurement error in the process of growing ± 1,0 mm. The system allows to grow GaAs ingots with an error of ± 2 mm. For the formation of temperature gradients developed thermal unit, which provides a gradient of 51 .. 53 K cm in growing of ingots with diameter of 100 mm. For adjusting the process parameters were developed measuring device of the internal stresses that are generated in the ingot during the growth of the GaAs ingot. Presented in paper technical solutions provided a silicon ingot with a diameter of 100 mm. with mobility, cm2 V-1 s-1 - 2500 ÷ 3500, the charge carrier density, cm-3 - 5x1017 ÷ 5x1018; dislocation density, cm-2 - to 8x104.

Three-dimensional (3D) integration is an emerging technologythat vertically interconnects stacked dies of electronics and/orMEMS-based transducers using through silicon vias (TSVs).TSVs enable the realization of devices with shorter signal lengths,smaller packages and lower parasitic capacitances, which can resultin higher performance and lower costs of the system. Inthis paper we demonstrate a new manufacturing technology forhigh-aspect ratio (> 8) through silicon metal vias using magneticself-assembly of gold-coated nickel rods inside etched throughsilicon-via holes. The presented TSV fabrication technique enablesthrough-wafer vias with high aspect ratios and superior electricalcharacteristics. This technique eliminates common issues inTSV fabrication using conventional approaches, such as the metaldeposition and via insulation and hence it has the potential to reducesignificantly the production costs of high-aspect ratio stateof-the-art TSVs for e.g. interposer, MEMS and RF applications., © 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.QC 20120618

Three-dimensional (3D) integration is an emerging technologythat vertically interconnects stacked dies of electronics and/orMEMS-based transducers using through silicon vias (TSVs).TSVs enable the realization of devices with shorter signal lengths,smaller packages and lower parasitic capacitances, which can resultin higher performance and lower costs of the system. Inthis paper we demonstrate a new manufacturing technology forhigh-aspect ratio (> 8) through silicon metal vias using magneticself-assembly of gold-coated nickel rods inside etched throughsilicon-via holes. The presented TSV fabrication technique enablesthrough-wafer vias with high aspect ratios and superior electricalcharacteristics. This technique eliminates common issues inTSV fabrication using conventional approaches, such as the metaldeposition and via insulation and hence it has the potential to reducesignificantly the production costs of high-aspect ratio stateof-the-art TSVs for e.g. interposer, MEMS and RF applications., © 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.QC 20120618

Three-dimensional (3D) integration is an emerging technologythat vertically interconnects stacked dies of electronics and/orMEMS-based transducers using through silicon vias (TSVs).TSVs enable the realization of devices with shorter signal lengths,smaller packages and lower parasitic capacitances, which can resultin higher performance and lower costs of the system. Inthis paper we demonstrate a new manufacturing technology forhigh-aspect ratio (> 8) through silicon metal vias using magneticself-assembly of gold-coated nickel rods inside etched throughsilicon-via holes. The presented TSV fabrication technique enablesthrough-wafer vias with high aspect ratios and superior electricalcharacteristics. This technique eliminates common issues inTSV fabrication using conventional approaches, such as the metaldeposition and via insulation and hence it has the potential to reducesignificantly the production costs of high-aspect ratio stateof-the-art TSVs for e.g. interposer, MEMS and RF applications., © 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.QC 20120618

Three-dimensional (3D) integration is an emerging technologythat vertically interconnects stacked dies of electronics and/orMEMS-based transducers using through silicon vias (TSVs).TSVs enable the realization of devices with shorter signal lengths,smaller packages and lower parasitic capacitances, which can resultin higher performance and lower costs of the system. Inthis paper we demonstrate a new manufacturing technology forhigh-aspect ratio (> 8) through silicon metal vias using magneticself-assembly of gold-coated nickel rods inside etched throughsilicon-via holes. The presented TSV fabrication technique enablesthrough-wafer vias with high aspect ratios and superior electricalcharacteristics. This technique eliminates common issues inTSV fabrication using conventional approaches, such as the metaldeposition and via insulation and hence it has the potential to reducesignificantly the production costs of high-aspect ratio stateof-the-art TSVs for e.g. interposer, MEMS and RF applications., © 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.QC 20120618

Three-dimensional (3D) integration is an emerging technologythat vertically interconnects stacked dies of electronics and/orMEMS-based transducers using through silicon vias (TSVs).TSVs enable the realization of devices with shorter signal lengths,smaller packages and lower parasitic capacitances, which can resultin higher performance and lower costs of the system. Inthis paper we demonstrate a new manufacturing technology forhigh-aspect ratio (> 8) through silicon metal vias using magneticself-assembly of gold-coated nickel rods inside etched throughsilicon-via holes. The presented TSV fabrication technique enablesthrough-wafer vias with high aspect ratios and superior electricalcharacteristics. This technique eliminates common issues inTSV fabrication using conventional approaches, such as the metaldeposition and via insulation and hence it has the potential to reducesignificantly the production costs of high-aspect ratio stateof-the-art TSVs for e.g. interposer, MEMS and RF applications., © 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.QC 20120618

Sapphire fiber has been studied intensively for harsh environment sensing in the past two decades due to its supreme mechanical, physical and optical properties. It is by far the most reported and likely the best optical fiber based sensing technology for sensing applications in temperature beyond 1000°C. Several sensing schemes have been proposed and studied to date including sapphire fiber extrinsic and intrinsic Fabry-Perot interferometers, fiber Bragg gratings and long period gratings inscribed in sapphire fibers. Lacking the cladding, sapphire fiber is highly multi-moded which renders sapphire fiber based sensor fabrication much more difficult than those based on silica fibers. Among all the reported work on sapphire fiber sensing, the vast majority is for single point temperature measurement. In this work, different sensing schemes are proposed to enhance the capability of the sapphire fiber based sensing technology. For the single point sensing, a miniaturized sapphire fiber temperature sensor for embedded sensing applications was proposed and studied. The sensors are no more than 75 µm in diameter and are ideal for non-invasive embedded sensing applications. Unlike existing sapphire fiber sensors, the thin film sensors are batch-fabrication oriented and thus have a potential to permit mass production with low cost. In addition to single point sensors, multiplexed sapphire fiber sensing systems are investigated for the first time. Two multiplexed sensing solutions, named frequency-multiplexing and spatial-multiplexing, are proposed and studied to achieve multiplexed sensing based on sapphire fibers.

Sapphire fiber has been studied intensively for harsh environment sensing in the past two decades due to its supreme mechanical, physical and optical properties. It is by far the most reported and likely the best optical fiber based sensing technology for sensing applications in temperature beyond 1000°C. Several sensing schemes have been proposed and studied to date including sapphire fiber extrinsic and intrinsic Fabry-Perot interferometers, fiber Bragg gratings and long period gratings inscribed in sapphire fibers. Lacking the cladding, sapphire fiber is highly multi-moded which renders sapphire fiber based sensor fabrication much more difficult than those based on silica fibers. Among all the reported work on sapphire fiber sensing, the vast majority is for single point temperature measurement. In this work, different sensing schemes are proposed to enhance the capability of the sapphire fiber based sensing technology. For the single point sensing, a miniaturized sapphire fiber temperature sensor for embedded sensing applications was proposed and studied. The sensors are no more than 75 µm in diameter and are ideal for non-invasive embedded sensing applications. Unlike existing sapphire fiber sensors, the thin film sensors are batch-fabrication oriented and thus have a potential to permit mass production with low cost. In addition to single point sensors, multiplexed sapphire fiber sensing systems are investigated for the first time. Two multiplexed sensing solutions, named frequency-multiplexing and spatial-multiplexing, are proposed and studied to achieve multiplexed sensing based on sapphire fibers.

This dissertation describes the finding that dissolved carbon dioxide is a potent inhibitor of sonoluminescence and describes the implications of the finding in the development of improved megasonic cleaning formulations. Megasonic cleaning, or the removal of contaminants particles from wafer surfaces using sound-irradiated cleaning fluids, has been traditionally used in the semiconductor industry for cleaning of wafers. Recently however, advancing technology and miniaturization has made wafer features increasingly susceptible to damage by megasonic energy. International Technology Roadmap for Semiconductors (ITRS) 2011 predicts the critical particle diameter, critical particle count and killer defect numbers to be 22 nm, 113 #/wafer and 4.3 #/mm², respectively, on a 300 mm wafer for 45 nm technology node. A critical challenge in the field, therefore, is to achieve removal of small particles (22 nm to 200 nm) without causing damage to fine wafer features. The work described here addresses this challenge by identifying sonoluminescence and solution pH as two key factors affecting damage and cleaning efficiency, respectively and establishing novel means to control them using CO₂(aq) release compounds in the presence of acids and bases. Sonoluminescence (SL) behavior of the major dissolved gases such as Ar, Air, N₂, O₂ and CO₂ was determined using a newly designed Cavitation Threshold Cell (CT Cell). SL, which is the phenomenon of release of light in sound-irradiated liquids, is a sensitive indicator of cavitation, primarily transient cavitation. It was found that all the tested dissolved gases such as Ar, Air, N₂ and O₂, generated SL signal efficiently. However, dissolved CO₂ was found to be completely incapable of generating SL signal. Based on this interesting result, gradual suppression of SL signal was demonstrated using CO₂(aq). It was further demonstrated that CO₂(aq) is not only incapable but is also a potent inhibitor of SL. The inhibitory role of CO₂(aq) was

Silicon pore optics is a technology developed to enable future large area X-ray telescopes, such as the International X-ray Observatory (IXO) or the Advanced Telescope for High ENergy Astrophysics (ATHENA), an L-class candidate mission in the ESA Space Science Programme 'Cosmic Visions 2015-2025'. ATHENA/IXO use nested mirrors in Wolter-I configuration to focus grazing incidence X-ray photons on a detector plane. The x-ray optics will have to meet stringent performance requirements including an effective area of a few m2 at 1.25 keV and angular resolution between 5(IXO) and 9(ATHENA) arc seconds. To achieve the collecting area requires a total polished mirror surface area close to 1000 m2 with a surface roughness better than 0.5 nm rms. By using commercial high-quality 12" silicon wafers which are diced, structured, wedged, coated, bent and stacked, the stringent performance requirements can be met without any costly polishing steps. Two of such stacks are then assembled into a co-aligned mirror module, which is a complete X-ray imaging system. Included in the mirror module are the isostatic mounting points, providing a reliable interface to the telescope. Hundreds of such mirror modules are finally integrated into petals, and mounted onto the spacecraft to form an X-ray optic. In this paper we will present the silicon pore optics mass manufacturing process and latest X-ray test results.

In this paper, we present a wafer-to-wafer attachment and sealing method for wafer-level manufacturing of micro-cavities using a room-temperature bonding process. The proposed attachment and sealing method is based on plastic deformation and cold welding of overlapping metal rings to create metal-to-metal bonding and sealing. We present the results from experiments using various bonding process parameters and metal sealing ring designs including their impact on the resulting bond quality. The sealing properties against liquids and vapor of different sealing ring structures have been evaluated for glass wafers that are bonded to silicon wafers. In addition, wafer-level vacuum sealing of microcavities was demonstrated when bonding a silicon wafer to another silicon wafer with the proposed room-temperature sealing and bonding technique., QC 20100525

Zwischen der Herstellung von Siliziumwafern und ihrer weiteren Verarbeitung zu Halbleiterbauelementen liegt eine Zeitspanne, in welcher die Scheiben in Kunststoffboxen aufbewahrt werden. Während dieser Lagerung kann es zu einem Ansteigen der Oberflächenrauhigkeit kommen. Dieses Phänomen wird als Time Dependent Haze (TDH) bezeichnet und durch chemische Prozesse von Verunreinigungen auf der Siliziumoberfläche verursacht. Diese Kontaminationen entstammen dem Kunststoff der Transportboxen, der Reinraumluft oder den Chemikalien der naßchemischen Waferreinigung. Time Dependent Haze wurde künstlich hergestellt und charakterisiert. Die Präparationen erfolgten in verschiedenen Versuchsreihen mit organischen und anorganischen Verbindungen. Diese gezielten Kontaminationen erlauben Rückschlüsse auf Substanzen und Einflußgrößen, welche TDH verursachen. Nach einer Lagerungsperiode wurden die Siliziumoberflächen mittels Streulichtmessungen untersucht. Das Auftreten von Licht-Punkt-Defekten diente als Maßstab für die TDH-Bildung. Mit verschiedenen analytischen Methoden, insbesondere dem Rasterkraftmikroskop, wurde TDH in einem frühen Entstehungszustand untersucht. Präparationen mit flüchtigen organischen Verbindungen zeigten, daß solche Substanzen TDH erzeugten, die sowohl einen hohen Dampfdruck als auch eine gute Wasserlöslichkeit besitzen. Beide Eigenschaften sind notwendig, um über die Gasphase auf die hydrophile Oberfläche eines Wafers zu gelangen. Die Morphologie dieses TDH fiel sehr unterschiedlich aus. Im Fall der Präparation mit Aceton enstanden Partikel von wenigen Nanometern Durchmesser. Die gezielte Verunreinigung mit Tetrahydrofuran führte zu einem Kontaminationsfilm mit einer sehr geringen Mikrorauhigkeit. Anorganische Verbindungen wie beispielsweise Schwefelsäure, die in der Waferreinigung Verwendung findet, können bei fehlerhaften Reinigungsschritten TDH bilden. Unter dem Einfluß einer solchen Lösung, bestehend aus H2SO4/H2O2, entstanden sulfathaltige Kristallite, we

A flash lamp has been proposed for annealing wafers with diameters approaching 100 mm. The equipment applies a pulse, with duration 0.5 ms to 20 ms, resulting in large transient thermal gradients in the wafer. In this paper, we present a model for the thermal reaction of this process and its effect upon the mechanical behaviour, in order to predict stresses, shape changes and to capture practical phenomenon, such as bifurcation of deformation modes. We then use the model to follow changes in the expected response consequent on altering process conditions, as well as exploring important issues associated with scaling to large wafer sizes. The model is further used to predict material yielding leading to permanent deformations. This work presents the first description of the thermo-mechanical response of wafers to flash lamp annealing in the millisecond time regime and is therefore fundamental to the use of this technique in the fabrication of semiconductor devices.

A flash lamp has been proposed for annealing wafers with diameters approaching 100 mm. The equipment applies a pulse, with duration 0.5 ms to 20 ms, resulting in large transient thermal gradients in the wafer. In this paper, we present a model for the thermal reaction of this process and its effect upon the mechanical behaviour, in order to predict stresses, shape changes and to capture practical phenomenon, such as bifurcation of deformation modes. We then use the model to follow changes in the expected response consequent on altering process conditions, as well as exploring important issues associated with scaling to large wafer sizes. The model is further used to predict material yielding leading to permanent deformations. This work presents the first description of the thermo-mechanical response of wafers to flash lamp annealing in the millisecond time regime and is therefore fundamental to the use of this technique in the fabrication of semiconductor devices.

A flash lamp has been proposed for annealing wafers with diameters approaching 100 mm. The equipment applies a pulse, with duration 0.5 ms to 20 ms, resulting in large transient thermal gradients in the wafer. In this paper, we present a model for the thermal reaction of this process and its effect upon the mechanical behaviour, in order to predict stresses, shape changes and to capture practical phenomenon, such as bifurcation of deformation modes. We then use the model to follow changes in the expected response consequent on altering process conditions, as well as exploring important issues associated with scaling to large wafer sizes. The model is further used to predict material yielding leading to permanent deformations. This work presents the first description of the thermo-mechanical response of wafers to flash lamp annealing in the millisecond time regime and is therefore fundamental to the use of this technique in the fabrication of semiconductor devices.