24 results on '"Hanzawa S"'
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2. Design of an 8-nsec-search 72-bit-word Content-Addressable Memory using Phase-Change Devices
3. Doped In-Ge-Te Phase Change Memory Featuring Stable Operation and Good Data Retention
4. A 512kB Embedded Phase Change Memory with 416kB/s Write Throughput at 100μA Cell Write Current
5. Ta2O5 Interfacial Layer between GST and W Plug enabling Low Power Operation of Phase Change Memories
6. Measurement method for transient programming current of 1T1R phase-change memory
7. Concordant memory-array design: an integrated statistical approach for high quality gigabit-DRAM design
8. Oxygen-doped gesbte phase-change memory cells featuring 1.5 V/100-/spl mu/A standard 0.13/spl mu/m CMOS operations.
9. A 0.4-V high-speed, long-retention-time DRAM array with 12-F2 twin cell.
10. A dynamic CAM - based on a one-hot-spot block code - for millions-entry lookup.
11. A robust array architecture for a capacitorless MISS tunnel-diode memory.
12. A DDR/SDR-compatible SDRAM design with a three-size flexible column redundancy.
13. Experiments of highly emissive MOS electron tunneling cathode.
14. Dual layer phase change optical disk using limit equalizer.
15. A DDR/SDR-compatible SDRAM design with a three-size flexible column redundancy
16. Concordant memory design using statistical integration for the billions-transistor era
17. A robust array architecture for a capacitorless MISS tunnel-diode memory
18. Experiments of highly emissive MOS electron tunneling cathode
19. A 0.4-V High-speed, Long-retention-time DRAM Array with 12-F/sup /2 Twin Cell
20. Dual layer phase change optical disk using limit equalizer
21. A ternary/quaternary CAM architecture with an NPU-side IP-address compression scheme and a dynamic re-configurable CODEC scheme for large-scale flow-table lookup
22. Cross-point phase change memory with 4F2 cell size driven by low-contact-resistivity poly-Si diode.
23. A ternary/quaternary CAM architecture with an NPU-side IP-address compression scheme and a dynamic re-configurable CODEC scheme for large-scale flow-table lookup.
24. Concordant memory design using statistical integration for the billions-transistor era.
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