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Graphitic carbon nitride (g−CN), a promising visible-light-responsive semiconductor material, is regarded as a fascinating photocatalyst and heterogeneous catalyst for various reactions due to its non-toxicity, high thermal durability and chemical durability, and "earth-abundant" nature. However, practical applications of g−CN in photoelectrochemical (PEC) and photoelectronic devices are still in the early stages of development due to the difficulties in fabricating high-quality g−CN layers on substrates, wide band gaps, high charge-recombination rates, and low electronic conductivity. Various fabrication and modification strategies of g−CN-based films have been reported. This review summarizes the latest progress related to the growth and modification of high-quality g−CN-based films. Furthermore, (1) the classification of synthetic pathways for the preparation of g−CN films, (2) functionalization of g−CN films at an atomic level (elemental doping) and molecular level (copolymerization), (3) modification of g−CN films with a co-catalyst, and (4) composite films fabricating, will be discussed in detail. Last but not least, this review will conclude with a summary and some invigorating viewpoints on the key challenges and future developments. [ABSTRACT FROM AUTHOR]

Ni-based superalloys are widely used to manufacture gas turbine core components, but reports on the reliability of superalloys at cryogenic temperatures are still limited. Considering the actual application of superalloys in the field of cryogenic temperature, the tensile deformation behavior of directionally solidified superalloy DZ406 was investigated at cryogenic temperatures from −125 °C to 25 °C, and the comparative analysis of room temperature and 1000 °C was carried out. The yield strength and ultimate strength at cryogenic temperatures were close to that at room temperature, and twice that at 1000 °C. The elongation was maintained at 10–15% and exhibited a certain plasticity at cryogenic temperatures. The morphologies and chemical composition of γ′ precipitates were close at cryogenic temperatures, room temperature and 1000 °C. The microstructure difference that was caused by different temperatures was mainly reflected in the fracture mode and dislocation configuration. At cryogenic temperature, the fracture samples basically exhibited no necking phenomenon, and the cracks were basically located in the interdendritic regions and occurred in MC carbide itself; at room temperature and 1000 °C, dimples with carbides inside were distributed on the fracture surface. Slip bands and dislocations contributed to the tensile deformation at cryogenic temperatures and room temperature, while only the dislocations worked at 1000 °C. [ABSTRACT FROM AUTHOR]

Recess structure is one of the main schemes for insulated-gate E-mode GaN transistors. In this work, selective area growth (SAG) is proposed to fabricate damage-free recess-gate device, and related progresses regarding process optimization and structure evolution have been reviewed. Firstly, the SAG process has been optimized by interface separation (conduction interface and regrowth interface) and n-type Si impurity removal to achieve high-quality AlGaN/GaN heterostructure. Compared to the traditional etching method, the feasibility and superiority of SAG scheme are demonstrated for realizing E-mode Al2O3/GaN MISFET with small Vth hysteresis. Then, by inserting an in situ AlN interlayer, the SAG Al2O3/AlN/GaN MISFET yields improved frequency dispersion and gate channel conduction performances. To further enhance the channel conduction, the SAG partially recess-gate Al2O3/AlGaN/GaN MIS-HFET structure is proposed, by which both high Vth and high-field-effect channel mobility have been achieved. Those results indicate that SAG method gives a perspective way for insulated-recess-gate GaN transistors fabrication. [ABSTRACT FROM AUTHOR]

In this letter, partial recessed-gate AlAl2O3/AlGaN/GaN MISFET is experimentally demonstrated based on selective-area growth. The device features different contents of Al in the AlGaN barriers that were grown in the recessed and accessed regions that contributed to a higher $\text{V}_{\textsf {th}}$ and lower ON-resistance. As a result, it achieves a positive shift in ${V}_{\textsf {th}}$ as compared to the reference (from 1.8 to 2.5 V). Besides, this method accomplished the highest reported peak $\mu _{\textsf {FE}}$ value of 2033 cm2/ $\textsf {V}\cdot \textsf {s}$ and a lower gate channel sheet resistance of $519~\Omega /\Box $ (access region, ${R}_{\textsf {sh}} $ of $418~\Omega /\Box $) owing to reserving damage-free AlGaN/GaN hetero-structure in the recessed-gate. Notably, the formed device also exhibits a low hysteresis, low gate leakage, and a slight current collapse. [ABSTRACT FROM AUTHOR]

In this paper, a normally off Al2O3/AlN/GaN MISFET on Si substrate for achieving high threshold voltage stability and uniformity is obtained based on selective area growth. A thin AlN space layer (SL, ~1 nm) is adopted to GaN-based template, and the AlGaN/GaN het-erostructureis selectivelygrownon the template to naturally form a recessed structure. By insertion of the AlN SL, the Al2O3/AlN/GaN interface trapping and scattering effects are effectively suppressed. As a result, a low threshold voltage hysteresis ( \Delta V\mathrm{ th} , 80 mV at maximum gate sweep voltage of 10 V by dc I – V measurement and smaller than 200 mV in linear region by pulse I – V measurement) and a high peak field-effect mobility ( \mu \sf FE) of 192 cm2/ \textV\cdot \texts are obtained in Al2O3/AlN/GaN MISFET. It is a significant improvement compared with Al2O3/GaN MISFET without AlN SL. The Al2O3/AlN/GaN MISFET also exhibits a maximum drain current ( Id,max) of 620 mA/mm, a low on-resistance ( Rds, \mathrm\scriptscriptstyle ON) of $9.6~\Omega \cdot $ mm, and a high uniformity of {V}_{\mathrm{ th}} (2.5 ± 0.1 V). [ABSTRACT FROM PUBLISHER]

In this work, H2O-Al2O3/O3-Al2O3 insulating bilayers were grown on GaN by atomic-layer deposition (ALD) technique using H2O vapor and O3 as oxidants. The electrical and material properties show that the H2O-Al2O3/O3-Al2O3 stack structure appeared to be an appropriate dielectric for GaN MOS devices that had low leakage current densities, high breakdown voltages, and good capacitance-voltage ( C-V) curves. The H2O-Al2O3 interlayer between the O3-Al2O3 and GaN efficiently prevented the GaN surface from oxidizing by ozone oxidant by its strong oxidizing power. By taking photo-assisted C-V measurements, it was found that the deep interface state densities at the Al2O3/GaN interface reduced, while increasing the thicknesses of the H2O-Al2O3 interlayer restricted the 'Vth shift' phenomenon and improved the stability and reliability of the GaN MOS devices. [ABSTRACT FROM AUTHOR]

The selective area growth (SAG) technique has been proved to be an effective method to achieve trench gate normally-off AlGaN/GaN MOSFET. In this paper, the two-dimensional electron gas (2DEG) transport properties of SAG AlGaN/GaN heterostructure are investigated for samples with different insertion layers. As the thickness of the GaN insertion layer increases, the mobility of 2DEG drops at first and then increases dramatically. This is explained by a shift of the location of the 2DEG from the GaN template into the GaN insertion layer. Interface contamination at the template/insertion layer interface is found to be the reason of the degradation of the transport properties. Through optimizing the thickness of the SAG GaN insertion layer, 2DEG mobility is similar to the value of as-grown AlGaN/GaN heterostructure. The proper thickness of SAG GaN insertion layer for device fabrication is 24 nm referring to the variation in 2DEG transport properties. [ABSTRACT FROM AUTHOR]

The influence of different AlGaN Impurity Blocking Layer (IBL) thickness in the GaN/Si (111) structure with GaN/AlN SLs buffer on the material and electrical properties of GaN/Si (111) system was studied in detail. It is found that the insertion of AlGaN IBL can increase the (102) FWHM and decrease the (002) FWHM. Meanwhile, AlGaN IBL with an optimized thickness can further improve the surface roughness and strain-state of GaN-Si (111) system. By using Secondary Ion Mass Spectroscopy, it is found that AlGaN IBL have a strong effect in blocking the Si donor impurities originating from the Si substrate during the high temperature growth, which can decrease the leakage current while the breakdown voltage can be dramatically increased. [ABSTRACT FROM AUTHOR]

In this paper, the selective area growth (SAG) technique is used to regrow thin AlGaN/GaN heterostructure on access region for realizing trench gate normally-off AlGaN/GaN MOSFET. Heavy background doping is found in SAG AlGaN/GaN heterostructure, which is not expected for its degradation on device performance. The background doping originates from SiO residuals at SAG interface. Through reducing the deposition temperature of SiO mask, background doping can be efficiently suppressed. As a result, the 2 dimensional electron gas transport property of SAG AlGaN/GaN heterostructure improves greatly, which is as good as the as-grown AlGaN/GaN heterostructure. Moreover, the performance of normally-off SAG AlGaN/GaN MOSFET improves greatly by suppression the Si residual on GaN template. [ABSTRACT FROM AUTHOR]

A nonvolatile memory (NVM) based on an amorphous-indium–gallium–zinc oxide (a-IGZO) thin-film transistor (TFT) with defect-engineered gate insulator was demonstrated. The gate insulator was a blocking alumina/storage alumina/tunneling alumina stack structure, which was simply assembled in a single atomic layer deposition step. The memory device showed a positive shift of threshold voltage as large as 14.4 V after +20 V, 1 s programming. In contrast, the memory erasing was not sensitive to negative gate voltage in the dark. Once programmed, the memory can only be light erased. Furthermore, the light combined with a negative bias improved the erasing speed effectively. In addition, a 10-year memory window as large as 7.5 V was extrapolated at room temperature with a charge loss of 34.7%. Based on the observation of blisters in the storage alumina layer after high temperature annealing, Fourier transform infrared spectroscopy measurement and first-principles calculations, the high electron storage capacity can be attributed to the deep defect levels in the storage alumina layer, which were originated from hydrogen impurity. This a-IGZO TFT charge trapping NVM with high performance and simple process is a candidate device for the application of fully functional transparent system on panel. [ABSTRACT FROM AUTHOR]

In this work, the leakage current properties of semi-insulating GaN (SI-GaN) grown on Si(1 1 1) substrate with a low-temperature (LT) AlN interlayer were studied. Two terminal lateral current–voltage measurements revealed an early conduction phenomenon via buffer layers with an LT-AlN interlayer, in which both p- and n-type conduction phenomena were observed from Hall-effect measurement during temperature changing. It is suggested that the p-type conduction existed in the Si substrate due to the diffusion of Al atoms into the Si substrate during the epitaxial growth. The origin of n-type conduction was two-dimensional electron gas (2DEG) in the LT-AlN/GaN interface, which acted as a conduction channel in SI-GaN. Furthermore, the vertical leakage current measurement and the space charge limited current model were used to analyse the impact of the 2DEG conduction channel on the leakage current properties. It is revealed that leakage current properties are very sensitive to the thickness of the GaN layer above the LT-AlN interlayer (Top-GaN). Increasing the thickness of Top-GaN becomes an effective way to suppress leakage current. Therefore, both strain engineering and leakage current properties are essential factors to be considered in the selection of strain compensation interlayer in the growth of SI-GaN on Si substrate for power switching applications. [ABSTRACT FROM AUTHOR]

In this letter, a normally-off GaN recessed-gate MOSFET is demonstrated using a nonplasma gate recess technique, in which the access region with AlGaN/GaN heterostructure was selectively grown on a semi-insulating GaN/Si template to naturally form a recessed gate. The normally-off recessed-gate Al2O3/GaN MOSFET presents a high threshold voltage of 3.5 V and a maximum drain current density of 550 mA/mm (at a positive gate bias of 12 V). A maximum field-effect mobility of 170 cm2 V−1 s−1 and a large on/off current ratio of more than 107 was obtained, which indicates the high quality of the Al2O3/GaN interface. [ABSTRACT FROM AUTHOR]

In this report, two types of normally-off AlGaN/GaN heterostructure field effect transistors (HFETs) with recessed-gate structure have been fabricated by using common technique of induced coupled plasma (ICP) dry etching and a novel technique of selective area growth (SAG), respectively. The devices fabricated by SAG (SAG-HFET) showed better performance than that of ICP-HFETs with larger maximum drain current of 300 mA/mm, positive threshold voltage of 0.4 V, and lower pinch off channel leakage current (2.17×10-3 mA/mm). The analysis indicates that such obvious difference originated from the different AlGaN quality of the gate region under the Schottky contact, in which the damage to the gate region stemmed from dry etching can be avoided by the SAG technique so that the forming of higher quality Schottky contact can be guaranteed. These results indicate that SAG technique is a promising method for fabricating the normally-off GaN based HFETs. [ABSTRACT FROM AUTHOR]

Abstract: In the present paper, compositionally graded AlGaN buffer layer was employed to compensate the tensile stress and improve the crystalline quality of GaN grown on silicon substrate. During the growth of the graded buffer layer, the flow rate of trimethylaluminum (TMAl) was gradually decreased according to a series of functions, while the flow rate of trimethylgalliumm (TMGa) was increased with the same linear function. Therefore, these graded AlGaN layers showed different distributions of Al, which was confirmed by the high-resolution X-ray diffraction (HR-XRD) and the secondary ion mass spectroscopy (SIMS). A linear compositionally graded AlGaN layer was obtained by using the convex parabolic TMAl flow rate, which leads to a large compressive stress in GaN layer due to a linearly gradual change of lattice parameters and thermal expansion coefficient (TEC) from AlN seeding layer to GaN layer. Using the linear compositionally graded buffer layer, a 3-μm-thick crack-free GaN film with a low dislocation density was grown on silicon substrate. The dislocation evolution associated with stress was investigated by the cross-sectional micro-Raman scattering and transmission electron microscopy (TEM). [Copyright &y& Elsevier]

Graphitic carbon nitride (g-CN), a promising visible-light-responsive semiconductor material, is regarded as a fascinating photocatalyst and heterogeneous catalyst for various reactions due to its non-toxicity, high thermal durability and chemical durability, and "earth-abundant" nature. However, practical applications of g-CN in photoelectrochemical (PEC) and photoelectronic devices are still in the early stages of development due to the difficulties in fabricating high-quality g-CN layers on substrates, wide band gaps, high charge-recombination rates, and low electronic conductivity. Various fabrication and modification strategies of g-CN-based films have been reported. This review summarizes the latest progress related to the growth and modification of high-quality g-CN-based films. Furthermore, (1) the classification of synthetic pathways for the preparation of g-CN films, (2) functionalization of g-CN films at an atomic level (elemental doping) and molecular level (copolymerization), (3) modification of g-CN films with a co-catalyst, and (4) composite films fabricating, will be discussed in detail. Last but not least, this review will conclude with a summary and some invigorating viewpoints on the key challenges and future developments.