120 results on '"Harjani, R."'
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2. OC-080: Liver an lung dose in deep inspiration breath hold (DIBH) radiotherapy to right breast/chestwall
3. Highly digital 1 GS/s 7‐bit PWM ADC in 65 nm CMOS using time‐domain quantisation.
4. A 23.5GHz PLL with an adaptively biased VCO in 32nm SOI-CMOS.
5. A simple, unified phase noise model for injection-locked oscillators.
6. A 5Gb/s 2×2 MIMO crosstalk cancellation scheme for high-speed I/Os.
7. Fully integrated on-chip DC-DC converter with a 450x output range.
8. Capacitor bank design for wide tuning range LC VCOs: 850MHz-7.1GHz (157%).
9. A 24-GHz phased-array receiver in 0.13-µm CMOS using an 8-GHz LO.
10. Agent Protection Based on the Use of Cryptographic Hardware.
11. A sub-2.5ns frequency-hopped quadrature frequency synthesizer in 0.13-μm technology.
12. A 5Gbps 0.13μm CMOS pilot-based clock and data recovery scheme for high-speed links.
13. A CMOS 3.3-8.4 GHz wide tuning range, low phase noise LC VCO.
14. 1–10GHz inductorless receiver in 0.13µm CMOS.
15. Sub-10ns Frequency Hopping Synthesizer based on Injection-Locking.
16. I/O Staggering for Low-Power Jitter Reduction.
17. Modeling, measurement and mitigation of crosstalk noise coupling in 3D-ICs.
18. Modeling and synthesis of wide-band switched-resonators for VCOs.
19. Inductorless Design of Wireless CMOS Frontends.
20. High-Speed Circuits for a Multi-Lane 12 Gbps CMOS PRBS Generator.
21. Fast Hopping Injection Locked Frequency Generation for UWB.
22. Understanding the Transient Behavior of Injection Locked LC Oscillators.
23. High Speed Frequency Hopping Using Injection Locked Front-Ends.
24. FEXT Crosstalk Cancellation for High-Speed Serial Link Design.
25. Analog/RF physical layer issues for UWB systems.
26. Novel CMOS low-loss transmission line structure.
27. A CMOS high efficiency +22 dBm linear power amplifier.
28. Enhanced analytic noise model for RF CMOS design.
29. On the selection of on-chip inductors for the optimal VCO design.
30. A digital DFT technique for verifying the static performance of A/D converters.
31. A low-phase-noise CMOS ring oscillator with differential control and quadrature outputs.
32. An integrated quadrature mixer with improved image rejection at low voltage.
33. A high efficiency +20 dBm, 900 MHz power amplifier module in 0.35 μm CMOS.
34. A European ISM band power amplifier module.
35. Analysis and design of low-phase-noise ring oscillators.
36. Optimal test-set generation for parametric fault detection in switched capacitor filters.
37. Macrornodeling Of Analog Circuits For Hierarchical Circuit Design.
38. Analog circuit observer blocks.
39. Digital detection of analog parametric faults in SC filters.
40. Analog circuit synthesis and exploration in OASYS.
41. A prototype framework for knowledge-based analog circuit synthesis.
42. Optimal design of op amps for oversampled converters.
43. Nonlinear settling behavior in oversampled converters.
44. The design of analog self-checking circuits.
45. A 273 MHz low noise CMOS MR preamplifier for disk drives.
46. An ISM band RF front-end for short range wireless telemetry.
47. A prototype framework for knowledge-based analog circuit synthesis.
48. Compact, ultra low power, programmable continuous-time filter banks for feedback cancellation in hearing aid.
49. A high speed low noise CMOS MR preamplifier for disk drives.
50. Digital detection of parametric faults in data converters.
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