1. CMOS Integration of Dual Work Function Phase-Controlled Ni Fully Silicided Gates (NMOS:NiSi, PMOS:Ni2Si, and Ni31Si12) on HfSiON.
- Author
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Kittl, J. A., Lauwers, A., Veloso, A., Hoffmann, T., Kubicek, S., Niwa, M., Van Dal, M. J. H., Pawlak, M. A., Brus, S., Demeurisse, C., Vrancken, C., Absil, P., and Biesemans, S.
- Subjects
COMPLEMENTARY metal oxide semiconductors ,ELECTRON work function ,SILICIDES ,DIELECTRICS ,SILICON compounds - Abstract
The CMOS integration of dual work function (WF) phase-controlled Ni fully silicided (FUSI) gates on HfSiON was investigated. For the first time, the integration of NiSi FUSI gates on n-channel MOS (NMOS) and Ni
31 Si12 FUSI gates on p-channel MOS (PMOS) with good Vt control to short gate lengths (LG = 50 nm, linear Vt of 0.49 V for NMOS, and -0.37 V for PMOS) is demonstrated. A poly-Si etch-back step was used to reduce the poly-Si height on PMOS devices, allowing for the linewidth-independent formation of NISi on NMOS and Ni-rich silicides on PMOS with a two-step rapid thermal processing (RTP) silicidation process. The process space for the scalable formation of NiSi on NMOS and Ni2 Si or Ni31 Si12 on PMOS devices was investigated. It was found that within the process window for linewidth-independent NiSi FUSI formation on 100-nm poly-Si NMOS devices, it is possible to control the silicide formation on PMOS devices by adjusting the poly-Si etch-back and RTP1 conditions to obtain either Ni2 Si or Ni31 Si12 FUSI gates. A reduction in the PMOS threshold voltage of 90 mV and improved device performance (18% Ion improvement at Ioff = 100 nA/µm) was obtained for Ni31 Si12 compared to Ni2 Si FUSI gates, as well as a Vt reduction of 350 mV when compared to a single WF flow using NiSi FUSI gates on PMOS. [ABSTRACT FROM AUTHOR]- Published
- 2006
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