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18 results on '"Yang, Shu-Meng"'

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2. Synthesis and Physical Characteristics of Undoped and Potassium-Doped Cubic Tungsten Trioxide Nanowires through Thermal Evaporation.

3. Controlled Synthesis and Enhanced Gas Sensing Performance of Zinc-Doped Indium Oxide Nanowires.

4. Catalyst-free synthesis of tungsten oxide nanowires via thermal evaporation for fast-response electrochromic devices.

5. Chemical Vapor Deposition-Fabricated Manganese-Doped and Potassium-Doped Hexagonal Tungsten Trioxide Nanowires with Enhanced Gas Sensing and Photocatalytic Properties.

6. Fabrication and Photocatalytic Properties of Zinc Tin Oxide Nanowires Decorated with Silver Nanoparticles.

7. Synthesis and Characterization of Indium Tin Oxide Nanowires with Surface Modification of Silver Nanoparticles by Electrochemical Method.

8. Synthesis of morphology-improved single-crystalline iron silicide nanowires with enhanced physical characteristics.

9. Endoplasmic reticulum stress mediates the arsenic trioxide-induced apoptosis in human hepatocellular carcinoma cells.

10. Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications.

11. A Sub-0.3 V Area-Efficient L-Shaped 7T SRAM With Read Bitline Swing Expansion Schemes Based on Boosted Read-Bitline, Asymmetric-VTH Read-Port, and Offset Cell VDD Biasing Techniques.

12. Low-Voltage Embedded NAND-ROM Macros Using Data-Aware Sensing Reference Scheme for VDDmin, Speed and Power Improvement.

13. Noise-Immune Embedded NAND-ROM Using a Dynamic Split Source-Line Scheme for VDDmin and Speed Improvements.

14. A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time.

15. Synthesis of High-Density Indium Oxide Nanowires with Low Electrical Resistivity.

16. Single Crystalline Higher Manganese Silicide Nanowire Arrays with Outstanding Physical Properties through Double Tube Chemical Vapor Deposition.

17. Synthesis and Photocatalytic Properties of CuO-CuS Core-Shell Nanowires.

18. A 260mV L-shaped 7T SRAM with bit-line (BL) Swing expansion schemes based on boosted BL, asymmetric-VTH read-port, and offset cell VDD biasing techniques.

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