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Thermal interface materials (TIMs) used to fill the gaps between chip and heat sink are one of the most important materials for electronic packaging. Low thermal resistance is the key to achieving high heat dissipation efficiency. However, most studies only focused on how to enhance the thermal conductivity of the gel TIMs and ignored the thermal resistance, which is significantly influenced by the rheological properties. In this work, we aimed to investigate the effects of in situ modification of aluminum fillers on the rheological properties and thermal resistance of the gel TIMs. Six modifiers were compared for their ability to improve the compatibility between aluminum fillers and silicone oil. The rheological results showed that the gel TIM modified with 0.170 wt% dodecyl trimethoxysilane had the best rheological properties, including the lowest viscosity and yield stress, the weakest Payne effect, and the shortest relaxation time. The thermal resistance measurements further verified that the bond line thickness and thermal resistance of gel TIMs were determined by the rheological properties. This work provides a reference for the formulation design and process optimization of gel TIMs. [ABSTRACT FROM AUTHOR]

Die-bonding materials are essential packaging materials for high-power light-emitting diodes (LEDs), which affects their heat dissipation and reliability. In this work, a die-bonding structure with high strength and low thermal resistance was proposed for high-power LEDs. A Cu-foam/Sn composite preform was prepared as the die-bonding material in this die-bonding structure. The composite preform is composed of high-melting-point Cu skeleton and low-melting-point Sn. The Cu-skeleton structure accelerates the bonding process and forms intermetallic compounds (IMCs) with high remelting point. Consequently, the die-bonding structure displays robust joints from the transient-liquid-phase (TLP) interconnection layer and high thermal conductivity from the Cu skeleton. The effects of bonding temperature on the mechanical and thermal properties of LEDs were investigated. After bonded with the Cu-foam/Sn composite preform, the LED achieves a low thermal resistance of 6.75 K/W, a low junction temperature change of 6.5 °C, and a high shear strength of 37.8 MPa. Moreover, the proposed die-bonding structure has a lower thermal resistance and higher light output power, which are 27.2% lower and 7.2% higher than the traditional die-bonding structure, respectively. [ABSTRACT FROM AUTHOR]

An accurate and efficient algorithm is presented, which allows deriving the structure function of a discretized 3-D heat conduction problem. In this approach, the partial thermal conductances and capacitances in the structure function are computed in terms of weighted spatial averages of thermal resistivity and volumetric heat capacity. As a result, the exact influence of all materials and geometric details on each part of the structure function is determined. The approach is validated on a state-of-the-art SiGe heterojunction bipolar transistor (HBT) for high-frequency applications. [ABSTRACT FROM AUTHOR]

The traditional cup-shaped LED packaged with epoxy molding compound materials (EMC-LED) and chip-scale packaged LED (CSP-LED) were prepared and analyzed in this article. It is found that high temperature can result in the spectrum red shift and the photoelectric performance degradation for these LEDs due to the degradation of chip and packaging materials. Compared with EMC-LED, the CSP-LED device has a lower thermal resistance of 3.31 °C/W due to the shorter thermal dissipation path and has better stability under the different temperature and drive current conditions. All the simulation results agree well with experimental and theoretical results, indicating that the photoelectric and thermal properties of the CSP-LED can be improved by introducing ceramic substrate and optimizing the material of the interconnected surface and the size of the conduction area. These results have guiding significance for the future CSP-LED design and application. [ABSTRACT FROM AUTHOR]

Increased demand on the mechanical and thermal properties on the thermal interface and die attach material creates a demand for materials with tailored material properties. Solder matrix fiber composites (SMFCs) have been shown to address these challenges, but have, so far, required complicated procedures and components. In this paper, we present the fabrication of a new type of SMFC based on commercially available fiber networks infiltrated with Sn–Ag–Cu alloy (SAC305) or indium using equipment for large-volume production. The composite material exhibits similar thermal properties compared to pure solder, and mechanical properties that can be tailored toward specific applications. We also show that the handling properties of the SMFC allows it to be used in process flows where multiple reflow cycles are required and can achieve a well-defined bond line thickness (BLT) and good bonding using fluxless reflow under pressure. [ABSTRACT FROM AUTHOR]

Light-emitting diodes (LEDs) are considered as a next-generation lighting due to their high luminous efficiency, low power consumption, and long lifetime. However, the low heat dissipation of LEDs is an inevitable roadblock. Here, a high heat-conducting Cu nanoparticle (NP) paste was prepared and demonstrated for high-power LEDs. The effects of sintering temperature on the electrical and thermal properties of the Cu NP paste were investigated. The junction temperature change and thermal resistance of LEDs were measured and compared with the traditional die-attach materials. Consequently, the Cu NP paste sintered at 250 °C possesses low electrical resistivity of $5.1~{ \mu \Omega \cdot }$ cm and high thermal conductivity of 142.37 W/(m.K). The packaged LEDs display the low thermal resistance of 6.58 K/W and the low junction temperature change of 3.22 °C, which are significantly lower than those of LEDs packaged by the traditional die-attach materials. These results demonstrate that the promising Cu NP paste provides a feasible and effective strategy for enhancing the heat dissipation of high-power LEDs. [ABSTRACT FROM AUTHOR]

An optimized two-zone model based on the critical degree of saturation is proposed in this paper for ampacity calculations of underground power cables. Moisture migration is fully considered based on geological soil models. Comprehensive finite-element method (FEM) simulations are performed to study the effect of the moisture content and its effects on soil thermal resistivity and critical temperature rise. The critical degree of saturation (Scr) is used in the improved two-zone model instead of the critical temperature rise (Δθx) used in the IEC Standard 60287. The comparative analysis presented between the new method and the IEC Standard shows that IEC is more susceptible to changes in the ambient conditions. The use of a fixed critical temperature rise may yield significant errors. Shortcomings of numerical solutions are discussed highlighting the advantages of the new (optimized) two-zone model. The optimized method is useful for the design of new installations as it accounts for changes in soil thermal resistivity and critical temperature rise. The new method has been validated with available test results. [ABSTRACT FROM AUTHOR]

Thermal interface materials (TIMs) play a major role in the performance of semiconductor devices by optimizing the thermal contact between device and heatsink. Their influence is further increasing with the usage of novel chip materials such as SiC and GaN. In this methodology study, we compared five of the most established evaluation methods for solid TIMs with each other: transient plane source, LaserFlash, DynTIM, TIMA, and an application-oriented $R_{\mathrm{ th}}$ measurement system. We investigated a wide range of typical TIMs in order to explore the limits of the different measurement systems. The results show that, despite existing norms, the used characterization method has a significant influence on the measured thermal conductivity. We also show that the temperature and pressure dependence has a significant influence on the thermal performance of TIMs and that these data need to be included in device specifications. Additionally, detailed error analysis and discussion about sample selection, error influence, and measurement effort for the presented methods are given. [ABSTRACT FROM AUTHOR]

A reliable thermal interface material (TIM) typically has a low storage modulus ( \textG^\prime ) and a tan( $\delta$ ) less than one; these mechanical properties are crucial for minimizing contact resistance ( \mathbf {R}_{\mathbf {c}} ). This paper demonstrates the correlation between storage modulus ( \textG^\prime ) and the crosslink density of silicone gels. Formulations span between 0.30 and 1.00 hydride to vinyl (H:Vi) ratios for the vinyl terminated and hydride pendent polymers used in the gel. These gels are tailored for TIM applications by adding highly conductive particles to improve thermal conductivity. During this study, when 80 wt% conductive filler was added to gels with a 0.6 H:Vi ratio, the \textG^\prime increased by 6025%. In order to minimize \textG^\prime , the crosslinker in the formulation was replaced with a chain extender. With this formula substitution, the modulus of the filled gel can be successfully lowered to the original value of the unfilled gel while maintaining the crucial properties of a reliable TIM. In effect, it is possible to independently optimize the thermal conductivity of a TIM while creating a compliant gel that maintains surface contact and minimizes contact resistance. [ABSTRACT FROM AUTHOR]

In this paper, we propose a new method for estimating the peak junction temperature and thermal resistance in modern heterojunction bipolar transistors (HBTs). The proposed method uses the temperature dependence of thermal conductivity of the material. The method is analytic in nature and does not require any iteration as opposed to the existing state-of-the-art model. This analytic method can easily include the available scaling relations relevant to specific technology to estimate the junction temperatures and thermal resistances of the corresponding transistors. The analytic model is tested against iterative self-consistent solutions for simple structures without any trench isolation and for structures corresponding to the ST Microelectronics B9MW technology that includes shallow and deep trench isolations. The model is slightly modified in order to include the effects from the back-end-of-line metal layers. The resulting analytic model is validated against the measured results for silicon germanium HBTs fabricated in ST Microelectronics B9MW technology. [ABSTRACT FROM PUBLISHER]

Thermal performance characteristics of fin-shaped FETs (FinFETs) are studied and analyzed in this paper for sub-22-nm technologies using the well-calibrated TCAD simulations. In this paper, we show that bulk FinFETs have a relatively better thermal performance as compared with SOI FinFETs. In order to understand the isothermal characteristics of these devices because of thermal effects, we use pulse rise-time as well as ac conductance methods. We demonstrate that the ac conductance method fails to accurately capture thermal time constants for FinFETs, as self-heating and gate resistance regions are indistinguishable from each other. A pulse rise-time method gives isothermal characteristics of these devices. As verified from both these independent techniques, only at high frequencies (>1 GHz), FinFETs show a suppression of thermally induced degradation, which can be attributed to their higher surface-to-volume ratio. It is observed that bulk FinFETs will perform better than SOI FinFETs for small effective fin heights. However, as we show in this paper, increased body doping in bulk FinFETs will increase the self-heating effects. Channel length scaling in FinFETs, which shows a decrease in drain current degradation with heating, will be an important design parameter for sub-22-nm devices. [ABSTRACT FROM AUTHOR]

A key limitation, especially for the continuous-wave operation of terahertz quantum cascade lasers, is the large amount of heat dissipated in the active region. We demonstrate an all-electrical technique for monitoring the lattice temperature and characterizing the thermal properties of the active region, using the waveguide of the device as a temperature sensor. We report a measured temperature difference between the heat sink and top waveguide layer of up to 27 K during the continuous-wave operation of GaAs/Al0.15Ga0.85As-based devices, lasing at 2.4 THz. A thermal model of the devices is used to determine the thermal conductivity of the active region perpendicular to the semiconductor interfaces to be 7.3 W/(m·K). [ABSTRACT FROM PUBLISHER]

We have investigated the impact of surface recombination on the effective carrier injection efficiency and the Joule heating of axial InGaN/GaN nanowire light-emitting diodes (LEDs). The results reveal that the carrier injection efficiency of such devices is extremely low (<;10%), due to the severe carrier loss through nonradiative surface recombination. It is further observed that the thermal resistance of typical nanowire LEDs is comparable with, or lower than that of their planar counterparts, in spite of the reduced thermal conductivity of nanowires. The poor carrier injection efficiency, however, leads to significantly elevated junction temperatures for nanowire LEDs. We have further demonstrated, both theoretically and experimentally, that the carrier injection efficiency can be significantly improved in p-doped nanowires, due to the downward surface band bending, and in InGaN/GaN/AlGaN dot-in-a-wire core-shell nanoscale heterostructures, due to the superior carrier confinement offered by the large bandgap AlGaN shell. This paper offers important insight for the design and epitaxial growth of high-performance nanowire LEDs. [ABSTRACT FROM AUTHOR]

Temperature rise and thermal spreading resistance in multilayered structures are an important research topic in several branches of the thermal-fluid sciences, including thermal management of electronics and contact resistance. Previous work in developing analytical solutions for the temperature rise and thermal spreading resistance has been limited to relatively few layers and simple conditions at the interfaces. Recent development of multilayer epitaxial structures for high power electronics has led to the need for more general and flexible analytical solutions because numerical methods, such as the finite element method, are often computationally inefficient. This paper presents a closed-form, analytical solution for the temperature distribution in a rectangular structure with rectangular isoflux heat sources, any number of layers of arbitrary thermal conductivity, and perfect interfacial contact or finite interfacial conductance. Extensions are also presented for convective boundary conditions in the source and sink planes. The proposed analytical solution is demonstrated and validated to study gallium nitride (GaN)-based epitaxial structures in realistic device configurations. The capability to explore the parametric space in a computationally efficient manner provides the ability to understand the key dependencies of the temperature rise on the properties of the structure, such as the substrate thickness in GaN-on-diamond epitaxial structures. Our results show that reduction of the thickness of diamond substrates may actually increase the device temperature in a realistic device configuration due to the importance of thermal spreading within the first \sim100~\mum of the heat source. [ABSTRACT FROM AUTHOR]

Many factors affect the loading of the underground power cables, such as ambient temperature, depth of laying of cable, number of parallel circuits of cable, and thermal resistivity of the surrounding soil. One important factor, usually ignored, is the formation of dry zones around the underground power cables. Dry zones are usually formed around underground power cables under loading conditions due to the migration of moisture within the soil. In this paper, the effect of the formation of the dry zone on the ampacity of underground power cables is investigated. The derating factor for the formation of dry zones around underground power cables is suggested and calculated for different types of natural backfill soil. IEC 60287-1-3 is taken as a reference. Experimental work was conducted to study the phenomena of the dry zone as related to different types of soils. [ABSTRACT FROM AUTHOR]

We report about the self-heating management of an InP double heterojunction bipolar transistor (DHBT) by the way of the thermal resistance. In order to reduce this latter, an AlInP/GaAsSb DHBT has been transferred on a silicon substrate offering a high thermal conductivity. According to our thermal resistance measurements on a \(0.8 \times 6 \mu \) m \(^{2}\) DHBT, a low thermal resistance of 1625 K/W is obtained, 65 % lower than for the same device fabricated on its own substrate of InP and which exhibited a value of 4452 K/W. [ABSTRACT FROM AUTHOR]

The programming current required to switch a phase-change memory cell depends upon the thermal resistances in the device. In many designs, significant heat loss occurs through the electrode. This letter investigates the thermal properties of a multilayer electrode stack. This material offers greater thermal resistance than single-material electrodes due to the presence of multiple thermal boundary resistances (TBRs), reducing heat loss from the device and potentially lowering the programming current. Picosecond time-domain thermoreflectance interrogates the temperature-dependent thermal conductivity of three as-deposited and postannealed electrode materials: carbon, titanium nitride, and tungsten nitride. These data are used to extract the temperature-dependent, as-deposited, and postannealed TBR in two multilayer electrode stacks: carbon–titanium nitride and tungsten–tungsten nitride. The C–TiN stacks demonstrate an as-deposited TBR of 4.9 \m^2\K/GW, increasing to 11.9 \m^2\K/GW postanneal. The \W– \WNx stacks demonstrate an as-deposited TBR of 3.9 \m^2\K/GW, decreasing to 3.6 \m^2 \K/GW postanneal. These resistances are equivalent to electrode films with thickness on the order of tens of nanometers. [ABSTRACT FROM PUBLISHER]