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Capacitance–voltage (C–V) profiling has been used to study the interface properties and apparent doping profile of NiSi/strained-Si heterostructure Schottky diodes. The interface states have been characterized using the capacitance–voltage (C–V) and capacitance–frequency (C–f) techniques for diodes annealed at 400 and 600 °C. Based on the depletion approximation and interfacial layer with interface states, an equivalent circuit model has been developed to explain the anomalous C–V characteristics observed in case of silicided-Schottky diodes. Self-consistent analytical expressions, developed from the proposed equivalent circuit, have been used to simulate the experimental C–V characteristics using both the MATHCAD and SEMICAD device simulation tool. An excellent agreement has been obtained between the experimental and simulated C–V characteristics, which strongly support the validity of the proposed model.

This work examines the utility of semi-physical vertical bipolar inter-company (VBIC) model for the first time to develop for an accurate, easy and fast scaling methodology for high-frequency SiGe:C heterojunction bipolar transistors (HBTs) with a peak f T of 75 GHz fabricated in a low-cost BiCMOS technology. The methodology allows one to find transistor models from single-finger transistor to multi-finger and variable length emitter devices with a minimal parameter extraction procedure. The devices modeled include several base–emitter structures in parallel, on top of a single collector to obtain different transistor area. The scaling rules are given in detail. Using this methodology, scalable VBIC model parameters were generated to describe the DC and RF behavior of SiGe:C HBTs up to peak f T and f max within ±10% accuracy. The key advantage of this methodology is that one does not need any special test structure while keeping the extraction procedure simple and fast.

Deposition and electrical properties of high dielectric constant (high-k) ultrathin ZrO2 films on tensilely strained silicon (strained-Si) substrate are reported. ZrO2 thin films have been deposited using a microwave plasma enhanced chemical vapor deposition technique at a low temperature (150 °C). Metal insulator semiconductor (MIS) structures are used for high frequency capacitance–voltage (C–V), current–voltage (I–V), and conductance–voltage (G–V) characterization. Using MIS capacitor structures, the reliability and the leakage current characteristics have been studied both at room and high temperature. Schottky conduction mechanism is found to dominate the current conduction at a high temperature. Observed good electrical and reliability properties suggest the suitability of deposited ZrO2 thin films as an alternative as gate dielectrics. Compatibility of ZrO2 as a gate dielectric on strained-Si is shown.

The purpose of this article is to report on the recent developments on the gate dielectric formation on strained-Si/SiGe heterolayers. In the first part, growth of a high quality strained-Si layer on a relaxed, linear or step-graded SiGe buffer layer and SiGe-free strained-Si on Silicon-on-Insulator (SSOI) is briefly reviewed. Characterization results of strained-Si films using atomic force microscopy (AFM), transmission electron microscopy (TEM) and Raman spectroscopy are then presented. In the second part, the processing issues of gate dielectric formation on strained-Si films are critically examined and the thermal oxidation of strained-Si layers are discussed. Low thermal budget processing, such as rapid thermal oxidation (RTO) and low temperature microwave plasma oxidation and nitridation of strained-Si layers are discussed in the third part. Microwave plasma deposition of various high-k gate dielectrics, such as ZrO2, Ta2O5, and TiO2 on strained-Si, their electrical properties and the current conduction mechanisms are also discussed.

Metal–semiconductor interfaces play a crucial role in electronic and optoelectronic devices. Strained-Si heterostructure devices are expected to play an important role due to its compatibility with Si processing technology. The interfacial reactions and chemical phase formation between nickel and ultrahigh vacuum chemical vapor deposited (UHVCVD) strained-Si layers on relaxed Si0.75Ge0.25 layers have been studied in the temperature range of 300–900 °C for forming low resistive and uniform silicide films for future generation strained-Si metal oxide semiconductor field-effect transistors (MOSFETs). The silicide films were characterized by scanning electron microscopy (SEM) and cross sectional transmission electron microscopy (XTEM). Smooth and uniform nickel monogermanosilicide films have been obtained for samples annealed around 450 °C. Ni/strained-Si Schottky barrier diodes (SBDs) have been fabricated and characterized in the temperature range of 150–300 K for the determination of barrier height (φb) and ideality factor (n). SBDs having epitaxial strained-Si layer thickness of 200 and 520 A have been modeled by incorporating an interfacial layer and associated series resistance to achieve a better agreement with the experimental data. Schottky barrier height (SBH) was found to decrease with a decrease in the measurement temperature while the ideality factor was found to increase. The interface states have been characterized using the capacitance–voltage (C–V) characteristics of the diodes.

A technique for the formation of gate quality ultrathin oxynitride films at a low temperature (150 °C) by a three-step (NO/O 2 /NO) process in a microwave plasma is reported. Oxynitride films have been grown on strained-Si 0.74 Ge 0.26 films. The mechanism of nitrogen incorporation has been studied in detail. The electrical properties of the oxynitride films have been characterized using a metal–insulator–semiconductor (MIS) structure. Capacitance–voltage ( C – V ), conductance–voltage ( G – V ), constant current and voltage stressing characteristics have been measured. It is shown that a NO/O 2 /NO three-step process, in general, gives rise to better electrical properties and reliability compared to a single-step O 2 - and NO-plasma grown oxide films.

Ultrathin hafnium oxide (HfO 2 ) films have been deposited by rf sputtering on strained-Si 0.81 Ge 0.19 films. The structure and chemical composition of the deposited films have been studied using high resolution transmission electron microscopy, time-of-flight secondary ion mass spectroscopy and X-ray photo-electron spectroscopy techniques. Current conduction mechanism in HfO 2 films has been studied using current–voltage ( I – V ) characteristics. The leakage current is found to be dominated by the Schottky emission at a low electric field, whereas Poole–Frenkel emission takes over at a high electric field.

Titanium dioxide (TiO 2 ) based gate insulators are being considered seriously for next generation metal oxide semiconductor field effect transistor applications due to its high permittivity. In this work, ultrathin TiO 2 films have been deposited at 150 °C on carbon implanted solid phase epitaxy grown strained Si 1− y C y layers by microwave plasma enhanced chemical vapor deposition using titanium tetrakis isopropoxide and oxygen. The deposited films have been analyzed by X-ray photoelectron spectroscopy for chemical composition. Using a metal–insulator–semiconductor capacitor structure, the interfacial and electrical properties of the deposited films have been characterized in the temperature range 25–125 °C. The leakage current has been found to be dominated by the Schottky emission at a low electric field, whereas Poole–Frenkel emission takes over at higher fields.

The minority carrier lifetime and diffusion length have been measured in partially strain-compensated Si 0.795 Ge 0.2 C 0.005 layers grown using ultrahigh vacuum chemical vapor deposition. A minority carrier lifetime greater than 1 μs has been observed. The data indicate that the minority carrier lifetimes are degraded due to carbon incorporation.

Oxidation of strained-Si/relaxed-SiGe heterostructure grown by UHVCVD method using a rapid thermal processing technique in N2O ambient is investigated. The electrical properties of the grown oxide have been characterized using a MOS structure. Hole confinement in the SiGe layer at low field is observed from the capacitance–voltage curve and this suggests that the strain in the initially strained Si epilayer is retained after oxidation. The experimental results are compared with simulation results obtained from a 1D Poisson solver. Dit and Qf/q values are estimated to be 3×1011 cm−2 eV−1 and −1.2×1011 cm−2, respectively. These high values of Dit and negative Qf/q could possibly be due to Ge out diffusion and pile up at the SiO2/strained-Si interface. The oxide exhibits an excellent breakdown field of 15 MV cm−1.

Ultrathin oxynitride films have been grown on partially strain compensated Si/Si 1− x − y Ge x C y /Si layers by microwave plasma at a low temperature. Significant improvements in charge-to-breakdown ( Q BD ) and charge trapping under static and dynamic electric field stress are observed for O 2 /NH 3 /NO-plasma treated films due to efficient removal of H species from the interface. The trapped charge generation and charge centroid show a frequency dependence for bipolar stress and polarity dependence in case of unipolar stress.

Wireless communication systems require radiofrequency integrated circuit implementation of high performance front-end receiver at a low cost. In this paper, suitability of silicon–germanium heterojunction bipolar transistors (SiGe-HBTs) is examined. DC characterization both at room and low temperature have been performed. A single-stage SiGe-HBT amplifier has been designed and fabricated on Duroid board. A linear gain of 13.2 dB at a center frequency of 1.5 GHz has been obtained.

Ultra-thin oxides (

A simulation study of spectral response, dark current and capacitance of Si 1− x Ge x heteroepitaxial p–i–n photodiodes as a function of thickness of the i -layer and Ge mole fraction has been performed. It has been found that the cut-off wavelength of the diodes increases from 1.12 to 1.50 μm as the Ge mole fraction ( x ) is increased from 0.0 to 0.75 and the photoresponse increases with the thickness of the absorbing i -layer. The simulated photoresponse of p–i–n diodes is in good agreement with reported experimental data. The dark current is found to increase with Ge concentration and remains in the nA range for upto 30% Ge which corresponds to a cut-off wavelength of ≈1.3 μm, extending the possibility of these devices in fiberoptic communication applications.

A simulation study of a short-channel strained-Si p-MOSFET is presented. An analytical model for hole mobility enhancement in strained silicon has been used in a two-dimensional (2D) device simulator to evaluate the strain dependence of the drain current and transconductance. Simulation results have been verified with experimental device results and the leverage of the strained-Si channel p-MOSFET over conventional Si p-MOSFETs is shown both at low temperature and room temperature. Optimal confinement of holes within the strained silicon occurs for a graded Si 0.7 Ge 0.3 buffer cap thickness of 40 nm. This layer structure gives rise to an enhancement in transconductance of up to 60%.

The growth of a high quality, step-graded lattice-relaxed SiGe buffer layer on a Si(100) substrate is investigated. p -MOSFETs were fabricated on strained-Si grown on top of the above layer. Carrier confinement at the type-II strained-Si/SiGe buffer interface is observed clearly from the device transconductance and C - V measurements. At high vertical field, compared to bulk silicon, the channel mobility of the strained-Si device with x =0.18 is found to be about 40% and 200% higher at 300 K and 77 K respectively. Measurements on transconductance enhancement are also reported. Data at 77 K provide evidence of two channels and a large enhancement of mobility at high transverse field.

The Schottky barrier height and ideality factor of Ti on p-type strained-Si (grown on a graded relaxed Si0.82Ge0.18 buffer layer) were investigated in the temperature range 200–300 K using the current-voltage (I-V) characteristics and were found to be temperature dependent. While the ideality factor decreases with an increase in temperature, the barrier height increases.