34 results on '"Collaert, N."'
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2. Improved physics-based analysis to discriminate the flicker noise origin at very low temperature and drain voltage polarization
3. Mobility extraction for short channel UTBB-FDSOI MOSFETs under back bias using an accurate inversion charge density model
4. Detailed characterisation of Si Gate-All-Around Nanowire MOSFETs at cryogenic temperatures
5. Low frequency noise assessment in n- and p-channel sub-10 nm triple-gate FinFETs: Part II: Measurements and results
6. Low frequency noise assessment in n- and p-channel sub-10 nm triple-gate FinFETs: Part I: Theory and methodology
7. Different stress techniques and their efficiency on triple-gate SOI n-MOSFETs
8. Integration aspects of strained Ge pFETs
9. DC and low frequency noise performances of SOI p-FinFETs at very low temperature
10. GIDL behavior of p- and n-MuGFET devices with different TiN metal gate thickness and high-k gate dielectrics
11. Low frequency noise characterization in n-channel FinFETs
12. Substrate bias dependency of sense margin and retention in bulk FinFET 1T-DRAM cells
13. Influence of the sidewall crystal orientation, HfSiO nitridation and TiN metal gate thickness on n-MuGFETs under analog operation
14. Gate-edge charges related effects and performance degradation in advanced multiple-gate MOSFETs
15. Analytical threshold voltage model for lightly doped short-channel tri-gate MOSFETs
16. Effect of high-energy neutrons on MuGFETs
17. Effect of rotation, gate-dielectric and SEG on the noise behavior of advanced SOI MuGFETs
18. Low-frequency noise and static analysis of the impact of the TiN metal gate thicknesses on n- and p-channel MuGFETs
19. DC and low frequency noise characterization of FinFET devices
20. Performance improvement in narrow MuGFETs by gate work function and source/drain implant engineering
21. Experimental characterization of the subthreshold leakage current in triple-gate FinFETs
22. Multi-gate devices for the 32 nm technology node and beyond
23. Impact of strain and source/drain engineering on the low frequency noise behaviour in n-channel tri-gate FinFETs
24. Reduction of gate-to-channel tunneling current in FinFET structures
25. Gate induced floating body effects in TiN/SiON and TiN/HfO 2 gate stack triple gate SOI nFinFETs
26. Specific features of multiple-gate MOSFET threshold voltage and subthreshold slope behavior at high temperatures
27. Impact of fin width on digital and analog performances of n-FinFETs
28. Evaluation of triple-gate FinFETs with SiO 2–HfO 2–TiN gate stack under analog operation
29. Minimization of MuGFET source/drain resistance using wrap-around NiSi-HDD contacts
30. Minimization of specific contact resistance in multiple gate NFETs by selective epitaxial growth of Si in the HDD regions
31. FinFET analogue characterization from DC to 110 GHz
32. Shift and ratio method revisited: extraction of the fin width in multi-gate devices
33. Effect of the Ge-molefraction on the subthreshold slope and leakage current of vertical Si/Si 1− xGe x MOSFETs
34. Effect of the Ge-molefraction on the subthreshold slope and leakage current of vertical Si/Si1−xGex MOSFETs
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