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The drastic surge in urbanisation and construction-related activities is increasing the demand for cement and aggregates, especially for concrete production. Concrete is utilised for a wide variety of structural applications, including rigid pavements construction, due to its superior strength and durability performance. However, the production of cement increases carbon footprint; and the source of natural aggregates depletes. Hence, there is an increased demand for pavement designs that incorporate sustainable materials and maintain a consistent level of service. In rigid pavements construction, this can be achieved with the integration of alternate binder systems, such as paper mill ash (PMA). This paper presents a systematic review of the engineering properties of PMA as a partial cement replacement material for sustainable concrete production. The review is focused on the influence of PMA on the engineering properties of concrete. The main advantages and limitation of using PMA were highlighted and discussed. Grey areas for possible research exploit were also identified. Based on the superior tensile strength (2.68–3.98 MPa) and flexural strength (4.04–5.01 MPa) documented in the various works of literature reviewed, it can be concluded that PMA is a feasible alternative binder material for rigid pavement applications. This, coupled with its negligible CO2e emission value, indicate that PMA is beneficial to the sustainability and serviceability states of rigid pavements. The viewpoint of this review will be useful for researchers and stakeholders in the construction industry to acquire more understanding of PMA concrete.

In this work we designed, fabricated and assessed a p+/n/n+ structure which constitute the basis and the core part of the n-type silicon solar cells. The process of fabrication is based on the co-diffusion of pre-deposited phosphorus and boron. It consists of carrying out simultaneously in one single high temperature step the diffusion of both boron and phosphorus of the p+ emitter and pre-deposited n+- back surface field (BSF), respectively. The first step was the pre-formation of the n+-BSF in a POCl3 furnace system. After depositing the silicon nitride film onto the wafers rear side as a diffusion barrier to protect them from being boron doped, the wafers underwent an alkaline bath to etch the phosphorus layer of the front side. Onto this latter we used a boron source paper sheets to create a p+ emitter (preform source) simultaneously with n+-BSF drive-in step. This co-diffusion process was carried out at a temperature of 930 °C in a quartz tube devoted to this purpose. The resulting structure has a sheet resistance of 49 Ω/□ and 39 Ω/□ for emitter and BSF, respectively, corresponding to junction depths of 0.40 μm and 0.55 μm. The dopants surface concentrations are of 1.14 E20 atoms. cm−3 and 6.20 E19 atoms. cm−3 for emitter and BSF, respectively. This p+/n/n+ structure was used to fabricate solar cells after passivating the emitter and screen printing the front and rear side metallic contacts. A short circuit current density of 31.60 mA/cm2, an open circuit voltage of 555 mV and an efficiency of 10.70% was measured indicating that our non-optimized fabrication process and the resultant device is viable.

In this paper, we present a double gate JL-TFET based biosensor by varying the gate dielectric constant to detect various biomolecules through label-free detection technique. An investigation regarding properties and behavior device has been investigated with the help of Silvaco TCAD. It is observed that Junction less TFET has advantageous over JLFET and TFETdue to the absence of junctions. The proposed device shows reduced short channel effects, lower subthreshold swing along with a higher voltage gain. The detection of the biomolecule is done by varying the gate dielectric constant inside the cavity and different electrical parameters such as electric field, sensing current, threshold voltage and transconductance are observed. The change in the threshold voltage, drain current, transconductance has been used as the sensing metric to detect the sensitivity of the presented device for biomolecule detection. Biomolecule position inside the cavity have been investigated to find out their effect on sensitivity parameter.

In the current study, by employing first-principles computations, the adsorption behavior of letrozole (LET) was investigated on the pristine graphdiyne nanosheet (GDY) as well as Si-doped graphdiyne (SiGDY). According to the adsorption energy, charge transfer value, and the change in the bang gap energy, the tendency of the pristine GDY towards LET is insignificant. However, the interaction of LET with SiGDY was strong and the adsorption energy was approximately − 19.20 kcal/mol. In addition, the associated electrical conductivity with SiGDY increased by approximately 23.53 % following the adsorption of LET. The results show that SiGDY can be employed as an electronic sensor to detect LET. Furthermore, LET is detected by SiGDY in the water phase based on the magnitude of solvation energy. Finally, a considerable charge-transfer between LET and SiGDY is a precondition for the adsorption of the LET molecule with proper binding energies, which delivers the Si atoms with a significant positive charge.

Sugarcane bagasse ash is used as a pozzolan in concrete. Although studies on sugarcane bagasse ash blended concrete are available, investigation on the influence of different curing methods in the performance of bagasse ash and marble waste blended concrete is essential. Therefore, the present study focuses on the effect of eight types of curing methods on the strength and durability of bagasse ash and marble waste based concrete. Sugarcane bagasse ash (20 %) and marble waste (25 %) were used at their optimum levels as a pozzolan and fine aggregates in concrete. Compressive strength, water permeability, sorptivity and abrasive resistance of concrete for different curing methods were studied. River sand and crusher sand were used as primary fine aggregate. Strength and durability performance of concrete specimens was comparable for moist curing, jute bag curing and straw curing. Normal water curing is found to be beneficial than other curing methods. Water cured bagasse ash and marble waste blended specimens had higher strength (36 %) and lesser permeability (18.8 %) than ambient cured specimens. Although variations in the abrasive wear are observed in the SCBA and MW blended concrete specimens, it is lesser than the permissible limit of 10 mm.

A highly-sensitive remote temperature sensor based on Tamm resonance is proposed using a one-dimensional photonic crystal. The proposed structure is prism/Ag/Toluene/SiO2 /(PSi1/PSi2)N/Si. The transfer matrix method is used to discuss the interaction between the structure and the S-polarization of the incident radiation waves. We optimized the structure by studying the effect of the incident angle, the thickness of the first and second layers of the photonic crystal unit cell, the porosity of them, and the thickness of the toluene layer. High sensitivity, high signal-to-noise ratio, and very low resolution are achieved due to the coupling between the porous silicon photonic crystal properties and Tamm resonance that makes it very distinguished compared to previous works.

The scarcity of water, especially during the dry season, is the main factor influencing water consideration with unknown characteristics for mixing cement mortar and concrete. This study investigates Palm Oil Mill Effluent (POME) effects as mixing and curing water on the hardened cement matrix properties. The cement pastes were prepared with ordinary Portland cement, which was used as a binder. In contrast, Potable Water (PW) and POME were used separately for mixing cement and a mixture of cement and sand to produce cement paste and cement mortar, respectively. Two different mix ratios of cement: sand of 1:3 and 1:5 with the constant water-to-cement ratio of 0.5 were used to prepare the cement mortar. The PW and POME were also utilized as the liquid curing media for hardened cement mortar until the testing ages of 7, 14, and 28 days. Soundness, normal consistency, and setting times tests were performed to evaluate cement paste’s fresh properties, while unit weight and compressive strength tests to determine the hardened properties of cement mortar at different ages. The results showed that soundness, normal consistency, and setting times of cement paste with POME as mixing water were higher than that of PW. This indicates that POME exhibits the potential of serving as retarding admixture. The unit weights of mortar (1:3 or 1:5 mix proportion) with POME as mixing water were lower than those produced with PW as mixing water after curing in PW or POME for 28 days; but for the mortar with POME as mixing water, the unit weight was slightly higher when cured in POME than water at the same curing age. The mortar specimens with 1:3 mix proportions with PW as mixing and curing water had the maximum 28-day compressive strength values of 26.01 N/mm2, while a decrease of 20% was recorded when cured in POME. Further decrease in 28-day compressive strength values was recorded cement mortar with 1:3 mix proportions and POME as mixing water after being cured in PW and POME. A similar trend was observed for cement mortar with 1:5 mix proportion with POME as mixing water when cured in PW and POME, and PW as mixing water when cured in POME, compared with the cement mortar with PW when cured in PW for 28 days. The maximum strength reduction of 20% specified by the standard for cement composite or concrete at 28 days of curing for water from the questionable source was exceeded with the use of POME as mixing water. It can be concluded that POME is not suitable for mixing cement mortar.

High performance concrete (HPC) is produced in this study by utilizing the agriculture industry by-product. The usage of by-product helps to condense the disposal issues, ecological degradation and also makes the production of concrete economical. The raw sugarcane bagasse ash from sugarcane industry is processed to ensure the suitability with the properties of cement to be used in HPC. Sugarcane bagasse ash (SCBA) is used as binder in HPC as an alternative of ordinary Portland cement. The properties of the SCBA have been studied. Investigation were carried out experimentally on M 60 grade of high performance concrete blended with SCBA to assess the workability, strength and durability properties at different ages of curing. Three SCBA blended HPC specimens were tested for each trial and test. Test results indicate improved performance in strength and durability properties up to 15% substitution level of SCBA with ordinary Portland cement.

In this fast-growing technological world biosensors become more substantial in human life and the extensive use of biosensors creates enormous research interest among researchers to define different approaches to detect biomolecules. The FET based biosensors have gained a lot of attention among all because of its high detection ability, low power, low cost, label-free detection of biomolecules, and CMOS compatible on-chip integration. The sensitivity of the biosensor inversely proportional to device size since they detect low concentration yields quick response time. Although FET based biosensor is having a lot of advantages among others but the short channel effects (SCE’s) and the theoretical limitation on the subthreshold swing (SS > 60mv/dec) of the FET leads to restrict device sensitivity and also have higher power dissipation due to the thermionic emission of electrons. To avoid these problems researchers focus shifts to the new technology FET based biosensors i.e. TFET based biosensors which are having low power and superior characteristics due to Band to band tunneling of carrier and steep subthreshold swing. This manuscript describes the full-fledged detail about the TFET based biosensors right from unfolding the device evaluation to biosensor application which includes qualitative and quantitative parameters analysis study like sensitivity parameters and different factors affecting the sensitivity by comparing different structures and the mechanisms involved. The manuscript also describes a brief review of different sensitivity parameters and improvement techniques. This manuscript will give researchers a brief idea for developing for the future generation TFET biosensors with better performance and ease of fabrication.

A novel biochar, whose precursor is popped rice, was produced to remove oil pollution in water. Popped rice biochar is characteristic with large pores. When popped rice was carbonized at 300 °C, its oil absorption capacity for paraffin oil is up to 10.88 ± 0.51 g/g, being much higher than that of the original popped rice (4.03 ± 0.39 g/g). In order to improve the oil-water separation property of popped rice biochar to absorb oil selectively, epoxy resin was used as a binder to make superhydrophobic SiO2 coated on the surface of popped rice biochar. The water contact angle of superhydrophobic SiO2 / popped rice biochar is 153 ± 0.9°, and it has good oil-absorption capacity with low water-absorption ratio. As the oil-absorption material is environmentally friendly, it will be a good select for the removal of oil pollution.

In this research work, a master batch (comprising of AA2024 alloy, Silicon Nitride (Si3N4) and Graphite particulates) was reinforced by Silicon-Carbide (SiC) ceramic particulates (0–6 wt.-%; at steps of 2%; i.e. four composites samples viz. ASC-0; ASC-2; ASC-4; ASC-6) with the aim of enhancing mechanical and sliding tribology performance. The semi-automatic stir-casting fabrication process was followed as per standard industrial practice in-order-to fabricate the sample plates of the said alloy composites as per design. Thereafter, the sample specimens were prepared via wire EDM cutting followed by polishing over emery paper; as per ASTM standard dimensions and various physical (density and void content), mechanical (tensile strength, flexural strength, impact strength, hardness etc.), sliding tribology performance (steady state sliding wear; ASTM G-99; Pin-on-Disc tribo-meter), thermal (thermal conductivity, Thermo-Gravimetric Analysis (TGA)); thermo-mechanical (Dynamic Mechanical Analysis (DMA)), fracture-analysis, X-ray diffraction (XRD) etc. characterisation were performed and discussed. In Part-1: Physical, mechanical and sliding tribology performances were discussed. The Taguchi design of experiment technique was employed for designing of experimental runs having input controlling parameters like sliding velocity (0.654–2.616 m/s), sliding distance (784.8–3139.2 m), normal load (5–50 N), reinforcement content (0–6 wt.-%) and environment temperature (20–50 °C). The worn surface morphology studies were performed to understand prevalent wear mechanism using Field Emission Scanning Electron Microscope (FESEM) along with Energy-dispersive X-ray spectroscopy (EDS) that reveals elemental composition and its dispersion on the surface. In Part-2: evaluation of characterizations like thermal, thermo-mechanical, fracture-analysis, X-ray diffraction (XRD) etc. were discussed in correlation with mechanical and sliding wear performance. In Part-3: the entire performance data are analysed using hybrid AHP-TOPSIS technique (an MCDM technique; computationally simple and easy to understand) in-order-to rank the composites formulations.

The northeast region is the main producer of melons in Brazil. Soils under melon cultivation in this region are mainly pH-neutral and sandy, and hence prone to respond to Si fertilization, but there are no studies investigating Si application and melon responses in such an important producing area. To address this, here we carried out a field experiment to evaluate the effects of applying a diatomaceous earth-based fertilizer to melon grown on a Si-depleted soil from northeastern Brazil. The yield, weight, number, and quality of fruits, as well as the accumulation of Si and nutrients in melon leaves were evaluated. We found that Si fertilizer application increased the number, weight, and tonnage of melon fruits. This improvement in yield was related to an enhanced Si and nutrient uptake (N, P, K, Ca, Mg, Fe, Mn and Zn) by melon plants with the addition of silicon. Applying Si to soil did not significantly improve the pulp thickness, pulp firmness or soluble solids of melon fruits, despite a trend towards increased pulp thickness and soluble solids. The benefits of Si application were clearly observed to melon grown in sandy soils of northeast Brazil, but careful dose recommendation must be observed to make the practice cost-efficient and sustainable.

Herein, abrasive wear characteristics of SiCp dispersed zinc-aluminum based composites have been analyzed under high-stress condition. The wear tests were conducted on a Pin-on-Disc machine at a constant linear velocity of 1.57 m/s in the applied load range of 1-7 N while the abrasive platform used is 600 grit emery paper. A matrix alloy was also characterized under identical conditions to assess the influence of the dispersoid (SiC) particle on the wear behaviour. Wear rate, frictional heating and friction coefficient are the focused parameters of the study. The base alloy used has a dendrite structure comprising of α-dendrites surrounded by an α + η eutectoid and metastable e phase in interdendritic regions. The composite shows similar features to those of the base alloy except the additional presence of the reinforcing SiC particles. The wear rate and friction coefficient decrease with increase in abrading distance while a reverse trend was observed in the case of frictional heating which gradually increases with the increase in abrading distance. Incorporation of SiC particles improves the wear resistance of the matrix alloy and increasing the percentage of SiC increases the frictional heating and reduces the friction coefficient of the test material. The wear mechanism has been understood through SEM examination of wear surface, subsurface, debris particles and degraded abrasive grit papers.

In nanoregime, heterojunction diodes have efficient applications in design and fabrication of sensors. Heterojunction diodes are formed by fusing two dissimilar semiconductors. Based on the combination of the materials used, these heterostructures find applications in bioelectronics and miniaturized sensors. In the literature, many different combinations are prevailing –GaN/AlGaN, Au/ZnO, NiO/ZnO. In this paper, a heterojunction diode is designed using Si/ ZnO combination and for the first time,the device is discovered to be used as pressure sensors.. The IV characteristics, energy band profile and CV curves of Si/ZnO is studied, analyzed and validated using TCAD-ATLAS software. This paper also proves that the performance of the device fits well for pressure sensing applications using COMSOL software.

This paper exemplifies an exhaustive, figurative and subjective study on the RF performance and DC characteristics analysis of an Underlapped Double-Gate (U-DG) AlGaN/GaN heterojunction-based MOS-HEMT device with Hafnium-based high-k dielectric gate material. This paper depicts the effect of gate length variations on the drain current (ID), the transconductance (gm), the transconductance generation factor (gm/ID) and the RF FOMs intrinsic capacitances (CGD, CGS and CGG), intrinsic resistances (RGD and RGS), cut-off frequency (fT) and maximum oscillation frequency (fMAX). This study reveals shortening of channel length leading to better gate controllability hence an overall superior analog and RF performance is achieved. The U-DG AlGaN/GaN based MOS-HEMT device of 100 nm channel length shows a better Power Output Efficiency (POE) of 33% in contrast to 31% and 23% for the 200 nm and 300 nm devices respectively.

In the present communication, for the first time, applicability of Field Plate (FP) for Double Channel (DC) AlGaN/GaNHEMT is demonstrated. Impact of design space parameters such as field plate length (LFP) and Silicon Nitride thickness (tSiN) on breakdown voltage of DC HEMT is investigated and benchmarked with Single Channel (SC) HEMT. The investigation is carried out using ATLAS Technological Computer Aided Design (TCAD) Simulation tool, which is an efficient method in terms of time and cost to analyze and understand DC HEMT prior to the fabrication. The simulation shows new findings that breakdown voltage of DC device exhibited a large deviation with that of SC device. The breakdown voltage deviation is well corroborated through electric field, impact ionization and off-state leakage analysis. The electric field analysis has shown optimal value of LFP and tSiN for DC HEMT. It is also observed that tSiN for DC-HEMT should be lower than that of SC-HEMT. In this paper, the off-state leakage, electron-depletion and impact ionization are the first-hand observations for benchmarking DC device with SC device. Furthermore, it is found that DC device yield higher cut-off frequency and device linearity than that of SC device, which is highly desirable for Radio-Frequency (RF) and linear amplifiers. Thus, the observation presented in this paper assist device technologist to enhance the performance of DC device further and foundries to optimize the FP for DC device.

This paper uses impedance spectroscopy as a simulation tool to analyze grain boundaries properties in poly-crystalline materials. The interfacial structure at grain boundaries in poly-crystalline materials plays a decisive role in their electrical behaviors and degrades the performance in integrated circuits, gas sensors and solar photovoltaics. A numerical simulation is carried out to optimize grain size of poly-crystalline material to behave as mono-like material using impedance spectroscopy technique. The grain boundary potential (Vb) obtained from thermionic emission diffusion theory based continuum and localized energy models are utilized for obtaining the resistance (R), capacitance (C) and angular frequency (ω) of the bulk of the grain (Rb, Cb and ωb) and that of grain boundaries (Rgb, Cgb and ωgb) using the brick layer model. Two markedly different impedance spectra are obtained, one for the bulk of the grain and another for the grain boundaries. It is found that with an increase in the grain size (Lg), the signatures of grain boundaries spectra diminish and at a particular grain size, disappear completely which indicates that the poly-silicon material behaves comparable to mono-crystalline material. In this simulation work, silicon material is taken as the reference due to its abundant availability and huge market potential for photovoltaic and semiconductor applications but the simulation can be implemented on any poly-crystalline materials. The effect of varying silicon material resistivity (1.0–3.5 Ωcm) and temperature (300-420 K) on grain size was also analysed using the impedance spectra. The findings of the paper will be helpful for the silicon ingot growth industries to decide the optimum grain size during the polysilicon materials growth.

This paper presents a comprehensive TCAD based assessment to evaluate the intrinsic gain and minimum noise figure metrics of the T – Gate, and the π – Gate AlGaN/AlN/GaN HEMTs along with their recessed architectures. The work presented in this paper, to the best of author’s knowledge, is first in its attempt to systematically bring out both the effect of minimum noise figure metrics and intrinsic gain at the device level for the π – Gate architecture and their recessed counterparts whilst evaluating its stability for high frequency operations. Comparison demonstrates an enhancement in intrinsic gain by 64.5% in case of asymmetric π – Gate and 77% for asymmetric recessed π – Gate in comparison to their T – Gate counterparts. Further, the said architectures possess a wider range of flat gain operation with suppressed values of minimum noise figure metrics. These modifications result in a modest trade off in the minimum noise figures when best case is considered and compared with their T – Gate counterparts. Additionally, it is also demonstrated that such device architectures demonstrate much stable high frequency operation in comparison to their primer. The results so presented establish the superiority of the π – Gate AlGaN/AlN/GaN HEMTs for low noise and high gain applications.

Recent studies have pointed out that FinFET are immune to short channel effects (SCEs) but their performances at high frequencies are compromised due to strong fringing field between gate and source/drain region. Because of technological advancement, the gate structure of MOSFET has been improved from planar to nonplanar with an enhancement in the number of controlling gates. In this paper we propose FinFET structure for high frequency applications. The proposed model has been verified with finite element numerical simulations as well as with reported experimental measurements. In this paper, we propose for the first time an analytical model of Outer Fringe Capacitance of Multifin Diamond Shaped Raised Source/Drain FinFET. The development of parasitic model is necessary for accurate quantitative prediction of the parasitics introduced by each part of the device structure. The relative contribution of the total parasitic capacitance is addressed as well as their impact on RF-figure of merit (RF-FOM) (cut-off frequency fT) is presented. This work presents the possibility to improve fT by about 42% due to reduced parasitic gate capacitance that results from faceted surfaces of S/D region.

This paper presents the analysis of noise in Single Gate Extended Source TFET (SG-ESTFET) considering the absence and presence of interface trap charges, when the device is subjected to scaling and variation of parameters like device gate length (Lg), extended source length and height, SiGe mole fraction (x), oxide thickness (tox), gate dielectric material, and frequency (f). Furthermore, the influence of variation of dimensionality and material parameters in presence of noise on Drain Current Noise Power Spectral Density (Sid) and Gate Voltage Electron Noise Power Spectral Density (Svgee) are studied for different trap charge conditions. Assuming Gaussian distribution of trap charges at the interface, it is perceived that the effect of noise is more as compared to the case of absence of trap charges. In reference to other FET devices, present paper reports that, the proposed SG-ESTFET device under absence of trap charges, illustrates an improved Sid and Svgee value of 1.4 × 10−29 A2/Hz and 5.21 × 10−16 V2/Hz, respectively whereas under the presence of trap charges, Sid and Svgee value are 6.6 × 10−26 A2/Hz and 8.74 × 10−12 V2/Hz, respectively. Moreover, this study also reports that the generation recombination (G-R) noise is mainly prevailing at low and mid-frequencies in presence of trap charges while diffusion noise is prevailing at high-frequencies. Likewise, the flicker noise is observed to be noteworthy at low and medium-frequencies in absence of trap charges.

This paper presents a quantum analytical modeling of UTBB SOIMOSFET as lateral dual gate for the first time. In this paper, a 2-dimensional analytical modeling of electric field distribution, threshold voltage (Vth), surface potential and drain current (ID) have been developed and then including Quantum mechanical effects (QMEs)in it. The proposed model provides an expression for Vth shift due to QMEs, which can be used for compact modeling as a quantum correction term. The results of quantum analytical modeling have been verified with the results achieved from numerical TCAD device simulator. Different analog/ radio frequency (RF) performance parameters like transconductance (gm), output resistance (RO), transconductance generation factor (TGF), intrinsic gain (gm*RO), cut-off frequency (fT), gain bandwidth product (GBW), maximum frequency of oscillation (fmax) etc. has been investigated. The effect of negative voltage on the control gate on RF/analog performance parameters has been studied. Result reveals that the potential of UTTB SOI MOSFET with lateral dual gate becomes a choice for analog and mixed signal SOC applications.

This paper presents, analytical modeling of surface potential,threshold voltage and DIBL for a Dual-Metal Double-Gate Gate-All-Around (DM-DG-GAA) MOSFET considering the parabolic approximation of surface potential. Poisson’s three-dimensional (3D) charge density equation has been solved by using proper boundary conditions to formulate the surface potential throughout the channel length. In this work, two gate metals of distinct work functions are used for gate electrode to create a step profile in channel potential. The potential step profile in surface potential reduces the SCEs in DM-DG-GAA MOSFET. The developed surface potential model is further considered to formulate the threshold voltage (Vth)model by using an effective conductive path and Fermi potential difference. The modeled threshold voltage is further used to find the Drain Induced Barrier Lowering (DIBL) effect. The threshold voltage and the DIBL are discussed with different values of device physical parameters like gate oxide (sio2) thickness, gate length ratio, channel thickness, and screening gate work function. This paper compares the SCEs of DM-DG-GAA MOSFET with Dual-Gate Gate-All-Around (DG-GAA) MOSFET and the results showing that DM-DG-GAA MOSFET offering better short channel characteristics than DG-GAA MOSFET. The model results are verified with simulation results generated from 3D device simulator ATLAS from SILVACO.

The Selective Buried Oxide-Charge Plasma based Junctionless Transistor (SELBOX-CPJLT) is a new upcoming device used mainly for reducing self-heating effects and second order effects. In this paper, 2D mathematical modeling of Surface Potential for SELBOX-CPJLT using Poisson’s equation has been proposed. We have modelled the fringe capacitance for SELBOX-CPJLT with the help of conformal mapping. SELBOX structure is a novel idea to counter the self-heating effect which is present in the SOI technologies. Implementation of the charge plasma on SELBOX based JLT MOSFETs is called as SELBOX-CPJLT. The electrostatic performance and the lattice temperature of SELBOX-CPJLT is also compared with the SELBOX-JLT in this paper. The simulation results show that the SELBOX-CPJLT device has low Drain Induce Barrier Lowering (DIBL) effect, Subthreshold Slope (SS) with high Ion/Ioff ratio. It also provides good thermal stability as compared to SELBOX-JLT. The Fringe capacitance of SELBOX-CPJLT MOSFET has also been tabulated for different device parameters using conformal mapping technique. The proposed device is simulated and validated by using 2D-Silvaco (ATLAS) simulation.

Linearity and intermodulation distortion (IMD) analysis examined major reliability issues that arise due to the non-linear behavior of the devices in analog/RF circuit applications. In this paper, by means of virtually doped (dopingless), a distinctive influence of charge-plasma (CP) is proposed on novel dual metal gate (DMG; control and screen gate) recessed source/drain (Re S/D) transistor; envisaged as recessed source/drain dopingless junctionless transistor (Re S/D DLJLT). Re S/D structure diminishes series resistance without any accretion of the gate-drain Miller capacitance resulting in a better drive current (ION). DC and analog characteristics have been further improved by adopting CP conception for induction of N+ S/D region owing to favorably well-chosen metal work function electrodes. The main intent of this paper is to appraise the linearity and IMD performance characteristics of the Re S/D DLJLT using 2-D numerical calculations and scrutinize the distinction with recessed source/drain junction transistor (Re S/D JT) with identical dimensions. Device linearity parameters comprise of transconductance (Gm1) and its higher order coefficients (Gm2 and Gm3), second and third order voltage and input intercept point (VIP2, VIP3, and IIP3) third order IMD, and 1 − dB compression point (1 − dBCP) which are based on possible structural and control to screen gate length ratios (CSLR) variations in both devices. The influences of parametric modifications on linearity Figure of merits (FOMs) explore optimum bias point by investigating optimum structural with CSLR variations. The detailed investigation of linearity FOMs of the impact on different device engineering has been carried out. The obtained outcomes divulge that proposed device delivers appreciably enhanced linearity FOMs as compared to Re S/D JT.

Silicon carbide piezoresistive pressure sensor is more suitable for harsh environment due to its wide bandgap, corrosion tolerance, excellent chemical inertness, high Young’s modulus and high carrier mobility. In this paper, a square diaphragm with X-shaped piezo-resistor located on high stress region of the membrane has been analysed. The simulation study has been done with different materials like silicon, silicon carbide, and polysilicon using device simulation software. Various device characteristics of pressure sensors are measured and compared for different parameter variations to get optimum performance. The results show that for introductory parameters, sensitivity with silicon carbide is 1.358 times to that of silicon. The work presented in this paper motivates researchers for alternate choice of semiconducting materials for piezoresistors and diaphragm to get optimum device performance.

Tunnel FET (TFET) is a significant discovery in the field of low power application, which has the ability to sustain short channel effects arising due to scaling. But the disadvantage of TFET is low ON current, and it is a challenge to maintain a high ON current with very low OFF current, hence it is tough to obtain a higher switching ratio maintaining a low SS. In this paper, to investigate the influence of dimensionality and other electrical parameters on TFET with simulation, a device based on an extended source TFET (ES-TFET) with SiGe pocket layer at the edge of source channel junction is proposed. It shows excellent performance improvement over standard TFET. In this paper, for the first time the effect of increase in length of the extended source has been studied while SS degrades but threshold voltage remains unchanged, also extended source distance from surface degraded effect on SS has been improved with the introduction of SiGe layer. Various scaling parameters have been investigated to study its impact on electrical parameters showing an ON-current of 0.01 mA/μm and OFF-current of 6.48 × 10−17 A/μm neglecting gate leakage for 1 V gate and drain voltage. The Remarkable value of SS of 16 mV/decade and ON-OFF current ratio of more than 1011 for a threshold voltage of 0.4 V is obtained. Scalability of the proposed device according to ITRS is well maintained, and it is validated by its improved performance over the wide range of channel length.

In this paper an Underlap Double Gate (U-DG) Symmetric Heterojunction AlGaN/GaN Metal Oxide Semiconductor High Electron Mobility Transistor (MOS-HEMT) with gate oxide materials of different dielectric constant has been studied using gate oxide materials such as Hafnium dioxide (HfO2), Silicon dioxide (SiO2) and a symmetric gate stack (GS) of HfO2-SiO2. In this work, the analog performance of the devices has been studied on the basis of parameters like transconductance (gm), transconductance generation factor (gm/ID) and intrinsic gain (gmR0). This paper depicts the effect of varying oxide materials on the analog and RF figure of merits (FOMs) such as the gate to drain capacitance (CGD), gate to source capacitance (CGS) and total gate capacitance (CGG), intrinsic resistances, cut-off frequency (fT) and maximum frequency of oscillation (fMAX) using non-quasi-static approach. Studies show that the introduction of a gate oxide layer in the MOS-HEMT device increases the gate controllability reducing gate leakage currents improving RF performance. U-DG AlGaN/GaN MOS-HEMT with HfO2 gate dielectric shows superior Power output efficiency (POE) of 55% compared to the HfO2-SiO2 composite structure and SiO2 with 26% and 20% respectively.

The demonstration of all-optical basic logic gates using single silicon micro-ring resonator is presented in the paper. Based on the nature of the pump signal rather than its intensity, the polarization-conversion in ring resonator occurs with the response time of 0.2 ps. To validate the proposed model, the finite-difference time domain (FDTD) and Matlab simulation results are included in the report. The Q-factor and operational speed are also calculated to justify its utility. The ring parameters are optimized through numerical simulation to obtain the conversion of polarization in the ring resonator. The nature of the pump and source signal is responsible to obtain polarization conversion based all-optical switch and all-optical logic gates in the ring resonator. The design in this paper is simple and stable.

In this paper a double gate MOSFET having non uniform channel doping with gate stack structure is explored to study the linearity analysis. The extractions of linearity parameters confirm the novelty of the device and also enable us to achieve better the analog/RF applications. This promising device has an advantage of showing higher cut-off frequency, reduced DIBL, better gate oxide reliability and limiting the effects of parasitic bipolar phenomenon. In this paper we have studied the detail analysis of important linearity parameters of this proposed device with respect to change in high K oxide thickness (toxh) to have clear ideas on different linearity parameters like VIP2, VIP3, IIP3 and IMD3 and their variations. The simulated results validate that the change in toxh of this device plays a significant role on improving the linearity performance and there by careful optimization of this parameters can infer achieving better and reliable analog/linearity performances for SOC applications.

Lateral Double Diffused Metal Oxide Field Effect Transistor (LDMOS) are widely used in power applications for the high breakdown voltage. However, the device may have high on-resistance. So, the challenge for achieving high breakdown voltage and small on-resistance is important. In this paper, a new structure is proposed to enhance the conventional LDMOS performance. In this case, a U-shape P silicon layer is considered in bottom of the drift region and under the gate. The P layer has higher doping density than the drift region which is different from the channel and source/drain. This difference creates some new peaks in the electric field profile decreasing the main peaks. Therefore, the breakdown voltage significantly increases. The on-resistance is reduced when the doping density increases. The higher doping density of P layer than drift region reduces the on-resistance. The paper is simulated using two dimensional ATLAS simulator and is compared to the conventional one. The simulation results show that the proposed structure performance is acceptable in case of electric voltage, breakdown voltage, on-resistance and switching characteristics.

Natural fibre reinforced composites are replacing conventional materials as natural fibres are cheap, biodegradable, and non abrasive. They have high specific properties and low density. The natural fibre composites offer specific properties compared to conventional fibre composites. In this paper, hybrid composites are fabricated with basalt and banana fibre as reinforcement materials with epoxy resin as matrix. The hand layup process is used for fabricating the composite. The objective of this paper is to estimate tensile strength, flexural strength, impact strength and hardness of hybrid composites. The result of the investigation shows that the tensile strength and flexural strength of hybrid composites are superior to mono fibre composites. Morphological analyses are also done to study the internal structure of the tested specimens in which fibre twist fracture and fibre pull out are observed.

This paper presents the results of an investigation of Passivated Emitter Rear Cell (PERC) solar cell technology and the current understanding of the fundamental device physics. The research work has been focused on the influence of the bulk lifetime, the incident angle of the solar radiation, and temperature dependence on electrical properties of the considered PERC solar cell by using TCAD-ATLAS Silvaco. Also, this paper shows the best results obtained recently and some guidelines to improve still more the efficiency of the devices. The optimization at 300 K led to the following results Jsc = 41.70 mA/cm2, Voc = 0.727 V, FF = 80.53 %, P $_{{\max }} =$ 244.439 W/m− 2, and η = 24.44 % which are close with those found in different research works. This technology provides a better electrical control over the cell and thus leads to valuable improvements in device performance.

In a recent paper [(2018) Silicon 10 (3):841–850] Rajagopalan et al. studied the physical properties of the Tetrakis (Thiourea) Palladium Chloride Semi-Organic Non-Linear Optical Crystals. The authors have used a wrong approach to calculate the reflectance spectra of the samples and obtained values of this parameter are incorrect. Consequently, other reported optical parameters in the commented paper that are calculated based on the reflectance such as refractive index and dispersion parameters evaluated from the Wemple-Didomenico single oscillator model are wrong.

In this paper, an ultra-compact and highly sensitive silicon micro-ring resonator (SMRR) based modulator is proposed which exhibits modulation based on the placement of graphene sheet at the coupling region. The device is realizable on a standard 220 nm silicon-on-insulator (SOI) platform. The intensity modulation is achieved by changing the coupling coefficient due to the variation of the length in the graphene layer placed over the coupling region of the device as well as by varying the external bias. Theoretical analysis of the proposed modulator using first-order perturbation theory and time-dependent dynamic model is presented. The proposed modulator offers a 10.2 dB of extinction ratio with 6 nm/μm wavelength tuning sensitivity. The wavelength tuning sensitivity with external bias voltage has been achieved and noted as 1.5 nm/V. The device has a footprint of ~40 μm2.

In this paper, we have proposed an etched silica Fiber Bragg Gratings (FBGs) based interrogation technique using an optical spectrum analyser (OSA). The efficiency of the proposed system has extensively been investigated for measuring the temperature and strain simultaneously with higher sensitivity and accuracy covering a larger measurement range. A Single mode-Multi mode-Single mode fiber (SMS) which acts as a bandpass filter is employed in the circuitry for an efficient and fast interrogation technique. We recorded a remarkable enhancement in sensitivity of 20.30 pm/°C and 2.89 pm/μɛ over the temperature and strain range of 25–225 °C and 50–2050 μɛ, respectively. These data were recorded with the strain resolution of ±10 μɛ whereas the resolution for the temperature is ±0.50 °C. The experimental results show the capability of the sensor for measuring the strain and temperature simultaneously with higher intrinsic sensitivity and resolution. The performance of the proposed sensor has been compared with various reported techniques.

This paper outlines the study of a Doping-Less Vertical Nanowire Tunnel Field Effect Transistor (DLVNWTFET) with a p-i-n structure, aiming to enhance the performance of this device. The proposed device, which is a p-n-p-n configured DLVNWTFET, switches with a steeper sub-threshold slope while keeping the Off-state current (IOFF) and threshold-voltage (VTH) low and also improves the On-state current (ION) of the device; which is one of the crucial problems in TFETs. The nanowire TFET structure is vertically grown on an intrinsic silicon wafer. This vertical structure eases the fabrication process and also helps in the implementation of Charge-Plasma (CP) Technique. It is a process by which electrodes of specific work functions are used to induce charges in the Source (P) and Drain (N) regions. To realize the p-n-p-n configured structure, pocketing technique is used where the N+ heavily doped pocket is introduced between the Source and the Channel through CP concept. Upon calculation and comparison of various analog and device parameters, the proposed p-n-p-n structure shows better performance in contrast to the p-i-n DLVNWTFET. Analysis of the performance of the two configurations has been done, comparing various parameters like transconductance (Gm), output conductance (GD), transfer characteristics (ID–VGS), output characteristics (ID–VDS), cut-off frequency (fT), total gate capacitance (CGG) and intrinsic gain.

This paper reports the mechanical-erosion wear properties of extracted silica from Biowaste (rice husk) and pure rice husk-filled epoxy composites. A comparison is made on the influence of dispersed silica and rice husk particles on the properties of the epoxy composites. The composites are fabricated by hand lay-up process. The specimens are tested as per the ASTM standards for three different filler loadings of each silica and rice husk separately (2,4 and 6wt%). It is perceived that with the increase in the rice husk filler loading in epoxy, there is a decline in tensile, flexural, and erosion wear properties. It is also evident that, with the increase in silica content until 6%, the tensile and flexural strength have displayed consistent enhancement. Alongside, erosion results confirm that the properties of the pure epoxy had exhibited transition from semi-brittle to ductile nature due to the addition of silica fillers.

In this paper, the analytical modeling of Trigate Junctionless FinFETs has been explored. The analytical model expresses the potential distribution, minimum center potential and threshold voltage. The variable separation method has been used to develop the potential distribution and threshold voltage. Further, the analytical model analyzed for different device parameters of Fin width, Fin height, Gate oxide thickness and gate work function. The analytical model results are compared with Synopsys TCAD results which proves the validation of proposed analytical model.

The off-state currents of Side contacted Field Effect Diode (S-FED) and Double-Gate Field Effect Diode (DG-FED) structures increase for the lengths of the channel shorter than 35 nm. This is owing to the minority carrier’s injection from the source and drain into the channel and the band to band tunneling phenomenon caused by the high impurities of the drain, source, and reservoirs. In this paper, a structure with a 25 nm channel length with low doping and without reservoirs has been presented. The charge channel of the proposed structure modified using Multi Gate and Extended source/drain electrode. We have called the structure as modified charge channel FED (MCC-FED). The main idea in the proposed device is to modify the charge channel for improving the electrical performance. This device achieved lower gate delay time and energy-delay production and a higher on-current and on/off current ratio compared to conventional FEDs. In addition, two-dimensional analytical models for the surface potential and the electric field at the channel surface are presented by solving the two-dimensional Poisson equation in three distinct zones in the channel with appropriate boundary conditions. To verify the validity of the proposed model, the modeling results are compared with the simulation results and appropriate matching between results demonstrates appropriate accuracy of the proposed model.

The key objective of this research study is to examine the performance of TiAlSiN coated insert while performing dry machining of AISI 420 martensitic stainless steel on quantified output responses. This paper seeks to optimize process parameters namely speed, feed, and depth of cut during turning process, such as surface roughness, flank wear, and material removal rate simultaneously. TiAlSiN thin film was coated on the carbide tool through high power impulses magnetron sputtering. To confirm the existence of coated elements, SEM and XRD studies were performed. For coated and pure inserts, microhardness was measured, whereas the TiAlSiN coated tool possesses 43.34% higher than pure inserts. The dry machining was performed with three process parameters, each in three phases. The experimentation was performed based on Taguchi’s design of experiments (DoE). In this study, a Multi-Criteria decision making (MCDM) approach encompassing Data Envelopment Analysis based Ranking Methodology (DEAR) with Taguchi’s design was applied. The multi-response performance index (MRPI) was calculated and their impact on the machining parameters was scientifically examined. The parameter combination of cutting speed: 240 m/min; feed rate: 0.20 mm/rev and depth of cut: 0.50 mm was observed to be the optimal input parameters.

In this paper, comparison among single gate organic light emitting transistor (SG-OLET), dual gate organic light emitting transistor (DG-OLET) and cylindrical organic light emitting transistor (C-OLET) are discussed in detail. Where the device structural and material parameter includes the pentacene(400 nm) as an organic semiconductor, PMMA/SiO2 (200 nm) is an insulator, the source and drain of Au (35 nm) along with Ni/Ti (5 nm) contact pads for tunneling electrons from source to drain and gate electrode of Si (200 nm). The extracted performance parameters for DG-OLET are drive current (Ids), threshold voltage (Vth), mobility (μ), and current on-off ratio (Ion/Ioff) are of 9.0 μA, 0.5 V, 1.1cm2/Vs and 2*108, respectively at Vgs of -3 V and Vds of 0 to -3 V. The observed results of DG-OLET are significantly higher in comparison to SG-OLET, whereas results of C-OLET is approximately comparable. Afterward, quantum dots (QDs) based single and dual OLETs are analyzed and observed the significantly higher drive current in both SG and DG-OLET devices in comparison to pentacene OSC based devices. Thereafter, coulomb blockade concept is discussed in-depth, because there is a need of coupling to their surroundings of electrodes by these structures which can either add or subtract electrons from the electrodes. Subsequently, single electron tunnelling (SET) phenomena is explained thoroughly. This method permits the optical and electrical behavior of the single-island structures of the SET. Light production is controlled by the gate voltage that controls the hole current. The results also indicate that OLET with high brightness can be fabricated by use of a light emitting conducting polymer. Besides this, performance of CG-OLET is investigated and additionally, mathematical model for cylindrical gate OLET is described. The DG-OLET is realized that helps in higher charge carrier modulation in OSC channel layer, whereas Cylindrical -OLET will be utilized in wearable electronics for medical and space technology applications.

In this paper, we design, simulate and analyze FinFET with different materials, corresponding variation in ID VS VGS, transconductance, subthreshold slope. There is an increase in ON current on using a high-k dielectric material and subsequently an improvement in other parameters like subthreshold slope and transconductance.

In this paper, for the first time, we have investigated a Dielectric Engineered Schottky Barrier MOSFET (DE-SBMOS) for Biosensor applications. The DE SBMOS uses dielectric engineering and modulation approach to detect biomolecules. The DE SBMOS incorporated the high-k gate dielectric at the source side and low-k gate dielectric at the drain side. In addition, a nano gap cavity is created near the source region by etching the gate metal precisely. The presence of biomolecules in the cavity results in change in drive current of the device. The sensitivity of the proposed device is measured in terms of threshold voltage (VTH), ION current, IOFF current, Subthreshold Swing (SS), and IDS current. In later part, misalignment effect of cavity length with high-k dielectric material length examined and that result in three different modes i.e. Underlapped Biosensor (UBS), Aligned Biosensor (ABS), Overlapped Biosensor (OBS). Based on aforementioned modes, the proposed device shows the optimal choice for OBS mode.

In this paper, we have proposed a 2D analytical model for Asymmetric gate stack triple metal gate MOSFET(AGSTMGAAFET) and performed a comparative analysis with the simulation results obtained using the SILVACO 3D simulation software. Existing devices such as gate all around single metal (SMGAAFET), gate all around triple metal (TMGAAFET), gate stack single metal (GSSMGAAFET), gate stack triple metal (GSTMGAAFET) and asymmetric gate stack single metal (AGSTMGAAFET) have been compared with our proposed structure AGSTMGAAFET. Our device provides excellent performance in terms of drain current, transconductance, output conductance, current gain, maximum transducer power gain which shows our device’s suitability for various analog applications moreover the potential and electric field plots obtained have twostep profile and extremely low electric field near the drain region which ordains our device with the ability to suppress various SCE’s like DIBL and hot-carrier effect. The analytical model and simulation results show good convergence in values which validate the correctness of the proposed model.

The advancement in technology has focussed on the development of new tool materials for sustainable manufacturing using different surface coating techniques. Hardfacing is one of the methods of fabrication in multilayer deposition. Ni-W-Cr-B-Si hardfaced deposit exhibits exceptional wear resistance, high hot hardness, adequate fracture toughness, good chemical and thermal stability by formation complex carbides, borides, and carboborides. This paper illustrates the performance of Ni-W-Cr-B-Si hardfaced turning tool inserts for machining of AISI 1040 steel. Temperature, material removal rate, and surface roughness have been studied at different combinations of machining speed and feed rate. The combination of high machining speed and high feed has not only raised the temperature but also increased the material removal rate. However, the surface roughness has been considerably reduced by 47.34 % at high speed and low feed machining due to a reduction in shear marks and scratches as compared to low speed and high feed machining.

In silicon-based piezoresistive pressure sensor, the accuracy of the sensor is affected mainly by thermal drift and the sensitivity of the sensor varies with the rise in temperature. Here, the temperature effects on the desired representation of the sensor are analysed. Use of smart material Carbon nanotubes (CNT) and a few effective temperature compensation techniques are presented in this study to reduce the temperature effect on the accuracy of the sensor. Resistive compensation employed extra piezoresistors with Negative Temperature Coefficient of Resistivity (TCR) for temperature compensation. The attainment of the desired compensation techniques is highly compatible with the MEMS device fabrication. The compensated pressure sensor is supremacy for pressure measurement with temperature variations. Though various techniques have been suggested and put into actuality with successful attainment, the techniques featuring easy implementation and perfect compatibility with existing schemes are still blooming demanded to design a piezoresistive pressure sensor with perfect comprehensive performance. In this paper, CNT piezoresistive material has been employed as sensing elements for pressure sensor and compared with silicon in terms of output voltage and sensor performance degradation at higher temperature. Pressure sensors using CNT and silicon piezo resistive sensing materials were simulated on silicon (100) diaphragm by ANYSIS. Based on simulation results, silicon and CNT both pressure sensor also shows better results at near room temperature. With the increasing temperature it is observed that silicon pressure output underestimated by 23%.

In this paper, a new low voltage MOSFET (LV MOSFET) and high voltage dual-gate MOSFET (HV DG MOSFET) have been proposed with concept of integration based on trench technology on InGaAs material. Junction isolation technique is used for the implementation of a low voltage MOSFET and a high power dual gate MOSFET in same InGaAs epitaxial layer side by side. The HV DG MOSFET consists of dual gate that are placed in drift region under the oxide-filled trenches. The proposed structure minimize on-resistance (R on ) along with increased breakdown voltage (V br ) due to enhanced RESURF effect, the creation of dual channels, and due to folding technique of drift region in vertical direction. In the HV DG MOSFET, the drain current (I D ) increases leading to enhanced transconductance (gm) by simultaneous conduction of channels with improved maximum oscillation frequency (f max ) and cut-off frequency (f t ). On the other side, the low voltage MOSFET consists of a gate placed in a centre of the structure within an oxide trench to create two n-channels in the p-base. The two channels are conducting in parallel and give substantial enhancement in peak g m , I D , f max and f t with more control over the short channel parameters. The design and performance analysis of low voltage MOSFET (LV MOSFET) and high voltage dual-gate MOSFET (HV DG MOSFET) are carried out on 2-D ATLAS device simulator.

This paper proposes a new rad hard layout L style of nmos metal oxide semiconductor field effect transistor (n-MOSFET), which is evaluated to show that its efficacy at reducing radiation-induced leakage currents, thus improving the total ionization dose(TID) tolerance with very less area and parasitic capacitance as compared to enclosed layout transistor(ELT). This proposed layout structure is fully compatible to present commercial fabrication technology without any additional mask requirement as compared to conventional n MOSFET fabrication and can be used as radiation tolerant by design technique. The simulated ID - VG characteristics of the rad hard L n-MOSFET layout demonstrated the effectiveness of eliminating radiation-induced leakage current paths. The leakage current in proposed rad hard L n-MOSFET has been reduced by factor of 108 at 300Krad dose as compared to conventional layout n-MOSFET.

In this paper, we propose a novel n-type raised source/drain dopingless tunnel field-effect transistor along with stacked source configuration. Using calibrated TCAD 2-D device simulations, we show that the proposed device has three order reduced ambipolar current due to the raised source/drain regions and improved subthreshold characteristics through the use of stacked source configuration (upper Ge/ lower Si source region) in comparison with conventional DLTFET. The raised upper Ge source layer enables vertical tunneling for excellent dc characteristics in terms of high ION/IOFF ~ 1011 ratio, and 2.5 times steeper average subthreshold swing without any increment in leakage current in contrast to conventional DLTFET. Moreover, the proposed device encapsulates the ingrained advantages of reduced fabrication complexity and high invulnerability towards random dopant fluctuations(RDFs) on account of the dopingless architecture using charge-plasma concept.

In this Paper, we have studied and compared the performance of two different configurations of simulation model advanced MOSFET devices which can be used for biosensor application. The bio-molecules like protein, biotin, streptavidin, APTES, etc., undergo label free electrical detection with the help of dielectrical modulation technique in order to overcome the limitations of short channel effect in a more efficient way. The bio-molecules trapped inside the cavity region change the electrical parameters of the MOSFET. Biosensors based on MOSFETs have certain issues, like short channel effects (SCEs) and problems related to scaling and power supply. Therefore the proposed device is better withstand to SCEs and can be consider as an alternative for biosensing applications. For channel material, silicon is used for both the configurations i.e. with stack and without stack model and we have also studied the performance of the device based on the analog as well as RF parameters by considering the protein as bio-molecule in the cavity. Two different oxide materials are used to design the device structure such as HfO2 (K = 25) and SiO2 (K = 3.9) and for simulation purpose the 2D Sentrausu TCAD simulator has been used. The sensing capability of this proposed dielectric modulated device can be applicable for IOT based applications. They can also be uses in health IOT systems for medical research applications and as bio chip sensor in wearable device so as to study the protein content of the human body.