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Owing to the phase delay and resonance oscillations introduced by the LC filter connected in-between the voltage-source inverter (VSI) and the induction motor (IM), the “L” and “C” design methodology is critical. Also, the closed-loop control and the speed sensorless operation of such drives are complex without stator voltage sensors. This article addresses these issues by proposing a simple filter inductor ($L_{f}$) selection criterion for an LC filter equipped IM drive, which allows retaining the designed dc-bus capacitor, heat-sink, and power devices of VSI upon LC filter insertion in-between the VSI and IM. Furthermore, an existing filter capacitor selection criterion is improved adhering to the constraint on voltage drop ($V_{f}$) across $L_{f}$. In addition, this article also examines the existing active damping (AD) techniques to perform the speed sensorless operation on the IM + LC (IMLC) filter drive without stator voltage sensors and improves one of them to achieve the same. Summarily, through the filter selection criteria and improved active damping technique, this article proposes to retrofit the LC filter into the IM drive and performs speed and voltage-sensorless operation. The simulation and experimental results obtained from a 5-hp IM drive are presented to validate the proposed work. [ABSTRACT FROM AUTHOR]

Capacitor voltage balancing is one of the most important issues for the safe, reliable, and economical operation of the modular multilevel converter (MMC). This article proposes a modified individual capacitor voltage balancing method for MMCs with phase-shifted carrier pulsewidth modulation (PWM) (CPS-PWM) to solve the problem of the poor dynamic performance that the conventional individual voltage balancing methods suffer at low output power. In the proposed method, the information of arm current is incorporated into the balancing algorithm to cancel out the coupling effect of the output power on balancing control. Compared with conventional balancing methods, the proposed method shows better robustness against varying output power and maintains a good dynamic performance in a wider power range. The complete modeling process and parameter design are presented and considered for system stability. The effectiveness of the proposed method is verified with both MATLAB/Simulink simulation and experimental results. [ABSTRACT FROM AUTHOR]

This article proposes a space vector pulsewidth modulation using space voltage vector mapping and the midpoint-voltage self-balancing strategy to overcome the shortcomings of the existing active neutral-point-clamped five-level inverter modulation. Through multispace mapping, the five-level topology is converted into multiple two-level topologies for calculation. It greatly simplifies the computational burden. By adopting the midpoint-voltage self-balancing strategy, the midpoint-voltage self-balance is achieved, since the switching sequence of different sectors compensates each other for balancing the midpoint voltage. Therefore, this algorithm realizes that there is no or only a minimum number of switch tube actions when the reference voltage vector swaps different sectors. It reduces the switching loss and effectively avoids equipment damage caused by the simultaneous switching of multiphase switches. In addition, it also realizes the floating-capacitor voltage control by reasonably distributing the redundant switch states. Simulations and experiments verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This article presents an efficient and fast echelon battery equalization method based on wide voltage range bidirectional converter combined with DBSCAN (density-based spatial clustering of applications with noise) clustering control strategy. Thanks to the wide voltage range and bidirectional buck-boost characteristics of the four-switch bidirectional converter, the battery energy can be reasonably redistributed between the battery and the super capacitor. The converter operating in synchronous rectification mode can not only achieve bidirectional energy flow in a wide voltage range, but also has a high energy conversion efficiency. The DBSCAN clustering algorithm is used to divide all battery cells into groups, and each group may contain one or more adjacent and nonadjacent battery cells. First, the nonadjacent single cells are balanced and integrated into adjacent group with the closest voltage. Then, the groups with different voltages are balanced by group-to-group, thereby realizing rapid balance of the entire battery pack. In order to verify the effectiveness of the proposed method, simulations and experimental verification were carried out. The experimental results show that, comparing with traditional battery balancing methods, the proposed method achieves shorter balancing time and higher balancing efficiency. [ABSTRACT FROM AUTHOR]

High junction temperature is usually the main factor leading to device failures in high-power working conditions, such as surges or avalanches. It is of great significance to obtain the junction temperature quickly and accurately. Direct measurement of junction temperature is inconvenient, and usually indirect electrical measurement combined with model calculation is used. An electrothermal coupling junction temperature calculation model with distributed heat sources is proposed in this article. This model can accurately and quickly predict the device behavior during the surge process, as well as the voltage drop and temperature changes of each part of the device, without actually performing surge tests. This article describes the theoretical basis and calculation principles of the model. By taking a commercial SiC merged PiN Schottky diode as an example, this article also explains the details of the establishment of the electrical and thermal characteristic models of the device, as well as the calculation steps of the junction temperature by the thermal coupling model. The calculated device voltage drop curve of the device is in good agreement with the measured ones, and the calculated junction temperature curve is more consistent with the device failure mechanism than the one by the traditional RC thermal circuit model. [ABSTRACT FROM AUTHOR]

This article presents a resistor-array-tuning-based hybrid adaptive digital delay compensated rectifier for wireless power transfer systems. A no-crossing problem and nonlinearity problem for conventional delay-compensations are analyzed. In order to enhance the robustness of digital control, the on-delay and off-delay are compensated with different compensation schemes. The on-delay is compensated with a comparator-offset-adjusted technique, while the off-delay is compensated with a pulsewidth modulation (PWM)-based technique to guarantee falling zero-voltage crossing and adjust off-delay time linearly. Compared with the previous works, the delay time is adjusted by tuning the voltage drop across resistor arrays instead of changing the injected offset current of push–pull comparator so as to improve the power conversion efficiency (PCE) and loop stability. Implemented in a 0.18- $\mu$ m BCD process with a total area of 0.446 mm $^{2}$ , the rectifier delivered a maximum output power of 54.5 mW. With a 13.56 MHz ac input voltage in the range of 2.5 and 3.3 V, the measurement results show the peak VCR of 96.1 $\%$ and peak PCE of 93.1 $\%$ for the load resistance of 2 k $\Omega$ and 500 $\Omega$ , respectively. [ABSTRACT FROM AUTHOR]

Current sourceinverters (CSIs) require power switches with first quadrant current conduction and gate-controlled output characteristics as well as reverse blocking capability. Experimental demonstration of a SiC monolithic reverse blocking transistor (MRBT) suitable for CSI applications is described in this letter. The proposed device is based on the integration of a SiC JBS diode with a SiC power mosfet on the same chip. The cathode of the SiC JBS diode is connected to the drain of the SiC power mosfet by their common N+ substrate. The proposed device structure creates a novel SiC-based unipolar single-chip three-terminal transistor with reverse blocking capability. The measured characteristics of a 1.2 kV 4H-SiC MRBT, fabricated in a commercial six-inch wafer foundry, are reported in this letter. The devices show a diode-like on-state characteristic with a low knee voltage of 1.3 V and an on-state voltage drop of 2.8 V at 5 A. The measured reverse transfer capacitance and output capacitance for the MRBT at a drain bias of 2 and 1000 V are a factor of ∼3x and ∼1.6x smaller than the measured values for the internal mosfet device. Switching measurements show a 12% reduction in the gate-drain charge for the MRBT compared with the internal mosfet which is favorable for reducing switching losses. [ABSTRACT FROM AUTHOR]

This article proposes a novel flux weakening scheme for five-phase PMSM with active harmonic currents injection. The conventional flux weakening control schemes applied in the five-phase PMSM do not consider the voltage limit drop in the fundamental subspace due to the harmonic current controller. Thus, the derivation between the reference current trajectory and actual current trajectory would cause the current distortion when applying deadbeat current controller (DBCC). This article analyses the precise voltage limit circles considering the voltage drop caused by the resistance and harmonic currents control at first. Then, a feed-forward flux weakening control algorithm is designed to optimize the current trajectory online. The gradient descent method is used to ensure the converge speed and stability of the optimized current trajectory. Thirdly, the peak value of phase currents would be clipped by the harmonic currents to prevent the inverter current limit, where a new non-linear harmonic current controller is designed to precisely control the harmonic currents. Finally, the DBCC and modified SVPWM technology are utilized to generate the duty cycle. The proposed improved flux weakening control strategy is successfully implemented in an interior five-phase PMSM, and the performance demonstrate the effectiveness of this strategy. [ABSTRACT FROM AUTHOR]

This article proposes a high-frequency integrated gate driver for gallium nitride (GaN) synchronous buck converter. The proposed adaptive bang-bang dead-time control minimizes dead-time at any load condition. Thus, it mitigates the excessive power loss caused by GaN device reverse conduction in high-frequency applications. The proposed charge sharing bootstrap circuit ensures sufficient gate overdrive voltage with reduced chip area. Fabricated in a TSMC 0.25-μm BCD process, the driver integrated circuit enabled GaN-based buck converter to operate at 10 MHz switching frequency with minimal dead-time to as low as 0.4 ns under light load and heavy load conditions. Compared with fixed dead-time control, the proposed work improves around 5% efficiency under heavy load condition. The fully integrated bootstrap circuit with 100 and 60 pF (HV) capacitor obtained the lower than 0.6 V driving voltage drop with only 45% capacitance and around half of the voltage drop compared with a conventional bootstrap circuit. Besides, the proposed driver successfully tackled the parasitic ringing and dead-time overcharging issues in the GaN converter. [ABSTRACT FROM AUTHOR]

Photovoltaic energy is one of the most widespread renewable sources of electrical energy. At the heart of the power conversion system is the grid-connected interface converter based on power electronics. Single-stage systems offer higher efficiency and lower cost and size. However, they suffer from a reduced operating range due to the effects of irradiation and temperature. In addition, especially for low-power single-phase systems, pulsating power is an additional handicap. A dual-function decoupling circuit is proposed to mitigate these drawbacks. It compensates for the pulsating power and increases the lifetime of the system. In addition, the proposed low-power interface compensates for the voltage drop due to low irradiation and increases the operating range. A 1 kW test bench is designed, and experimental results show that when injecting power into the grid, the compensator attenuates 85% of the power oscillations and perfectly compensates up to 20% of the voltage drop due to low. [ABSTRACT FROM AUTHOR]

In this article, coupled inductors with cross-coupled windings are described and designed for voltage source converters with parallel-connected inverter legs in each phase. The nature of the cross-coupled windings produces a very low effective series output inductance, related to the intralimb leakage inductance rather than the higher interlimb leakage. The effective inductance between the parallel inverter output terminals can be made high to reduce circulating currents and is related to inductor magnetizing inductance. These two features make the use of parallel inverters attractive for generating multilevel high-frequency fundamental pulsewidth modulation output voltages with a very low fundamental voltage drop across the coupled inductors. Sample magnetic designs are presented for a three-phase system using three inverter legs connected in parallel in each phase. The effective output inductance of the cross-coupled winding arrangement is compared with that of the coupled windings on separate limbs without cross-coupling and is shown to be 97% smaller. The performance of the two inductor winding arrangements is demonstrated with simulation and experimental results of an 11 kW (300 Vdc, 208 Vac/30 A) laboratory prototype operating with fundamental frequencies in the kilohertz range up to 5 kHz. [ABSTRACT FROM AUTHOR]

As the increase of power and voltage level of back-to-back three-level neutral-point clamped (NPC) converters, the high-amplitude and high-frequency common-mode voltage (CMV) has become an urgent problem. To address this, a CMV elimination method based on pulsewidth modulation pulse alignment for back-to-back three-level NPC converter is proposed. On this basis, a neutral-point potential balance method based on zero-sequence voltage (ZSV) is also proposed. In order to decouple the CMV elimination and the neutral-point potential balance, the same optimal ZSV is injected into both the rectifier and inverter sides, and the CMV elimination will not be affected. Simulation and experiments are presented to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

A high switching frequency isolated voltage-fed dual-transformer-based hybrid semidual active bridge converter is introduced in this article for unidirectional power flow and wide voltage range applications. The converter embraces the full-bridge and half-bridge properties under varying operating conditions to improve efficiency. Five appropriate working patterns are elaborated, including ideal output power derivation, current stress analysis, working voltage matching, output power distribution, and soft switching features. Afterward, a simple segmented control strategy is adopted in accordance with the analysis results. The zero voltage switching of all switches is achieved by introducing the magnetic current and suitable drive logic. Compared with the existing works, the proposed converter has outstanding merits in terms of reduced conduction loss, switching loss, and peak current of ac inductor, resulting in high conversion efficiency. Hence, the converter is more suitable for cases with wide and frequent input voltage variations. Eventually, the effectiveness of the converter and the control strategy is verified by a 1.0-kW prototype. [ABSTRACT FROM AUTHOR]

In this article, a virtual space vector based overmodulation algorithm is presented for three-level neutral-point (NP) clamped converters in high-speed aerospace motor drives. With the proposed inscribed polygonal-boundary compression technique, the output voltage capability is enhanced under a lower crossover angle and compression coefficient. As a result, it brings an opportunity for the operation of the studied aircraft electric starter/generator (ESG) systems easily extending from the linear modulation range into the overmodulation region. Furthermore, an active capacitor voltage balancing control method is investigated to recover NP potential imbalance in the case of high modulation index and low power factor operating conditions. To simplify the digital implementation of the algorithm, a fast calculation approach is adopted in this work. The modulation performance of the proposed strategy is verified by both simulation and experimental results with a 45 kW, 32 k r/min ESG prototype system. [ABSTRACT FROM AUTHOR]

Synchronous rectification (SR) is an effective method to reduce the secondary side conduction loss of CLLC bidirectional resonant converter and improve its efficiency, but the SR driving signal in CLLC converter is hard to determine. Existing SR signal generating methods can be divided into three categories: theoretical calculation, voltage detection, and current detection. Compared with the other two methods, the current detection method has wider applicability and is insensitive to parasitic parameters, but usually requires lossy, bulky and costly current sensors, increasing the cost and size of the converter. This article proposed a SR scheme based on resonant inductor voltage. The polarity of the resonant current is obtained indirectly through the inductor voltage, thereby avoiding the use of current sensors. To handle the false pulses problem caused by parasitic oscillation, a corresponding SR control strategy is proposed. The SR driving signal is then adjusted according to the delay and transient requirements. Experimental results on a 380V/270V 3kW CLLC converter prototype were presented to verify the effectiveness of the proposed SR method. [ABSTRACT FROM AUTHOR]

This article introduces voltage-balancing control methods in stacked multicell converters based on single space-vector modulation. Two different control strategies for capacitors voltage are presented. The basic vectors with the smallest common-mode voltage are chosen to accomplish the voltage-balancing control. The nearest vector is selected for the first proposed method, and the appropriate switch combinations of each phase are determined by the cost function of floating-capacitor voltages and neutral point (NP) voltage. For the second proposed method, we consider sacrificing a little current performance to provide more possibility of switching state selection. The switching state of each phase is determined according to the voltage-balancing control of floating capacitors, and the optimal switching state with the smallest NP voltage is selected from the two nearest adjacent basic vectors. Experimental results compared with the existing space vector pulsewidth modulation method are presented to verify the effectiveness of the proposed methods. [ABSTRACT FROM AUTHOR]

In the voltage-source-converter-based dc system, the short-circuit current increases rapidly due to neighborhood dc-link capacitance. The protection system using a high-speed fuse has been applied in the industry to protect before the current freewheeling that ruins a semiconductor device. For proper protection system design, the capacitor-discharge I2t must be analyzed and set higher than the melting I2t of the fuse by securing sufficient capacitance. However, due to the implicit characteristics of the I2t function, it is difficult to calculate the required capacitance directly considering unknown fault resistance. In this article, the normalized I2t map of capacitor-discharge is presented as a calculation reference. After calculating the base values, the normalized I2t value can be calculated easily from the map without complicated formula. Since it is expressed as a function of the damping factor (half of the normalized resistance) and normalized capacitor's voltage, it helps I2t design with the range of fault resistance and voltage drop simultaneously. The proposed normalization and its result were verified through the experimental tests under various fault resistance. [ABSTRACT FROM AUTHOR]

In the voltage source inverter applications, inverter nonlinearities would affect the parameter identification process in many ways. Hence, this article proposes an offline identification method for resistance and dq-axis inductance surface by considering the inverter nonlinearity characteristics. A variable amplitude square-wave injection (VASI) scheme is proposed for the dq-axis inductance identification. The VASI method achieves the inductance identification with a novel data sampling strategy. Meanwhile, it can also establish the inductance surfaces by only a few identified data points with a polynomial fitting algorithm, which greatly reduces the identification time compared with the existing methods. The resistance identification is realized by a slope signal injection method, in which the effect of IGBT voltage drop is analyzed. In order to improve the identification accuracy, the inverter nonlinearities are compensated by a self-learning method considering the zero-axis voltage at different rotor positions. At the same time, the sampling error in zero current zones of abc-phases is researched. In order to verify the effectiveness and generality, the proposed method is carried out on two different test machines and confirmed by finite element analysis. [ABSTRACT FROM AUTHOR]

This article proposes a systematic synthesis method to identify the optimum converter topology for a specified voltage conversion ratio. This gain-oriented converter synthesis is formulated as an inverse problem around the inductor flux balance equations. The proposed synthesis method consists of two processes. A set of distinct converter topologies is first synthesized from the specified voltage conversion ratio by obtaining the solutions for a set of six inverse equations in twelve unknowns. The optimal topology for any intended application can be identified based on the desired performance metrics. The complete synthesis method is illustrated with quadratic buck–boost gain as an example. In total, 25 distinct topologies are synthesized using the first process, and their feasibility is validated by PLECS simulation. In total, three case studies are reported to explain the second process. Ground-referenced output and the minimum number of switches are used as the first two selection criteria in all the case studies. Minimum peak inductor current, minimum component stress factor, and minimum voltage and current stress are the third selection criterion in Case Studies-1, 2, and 3, respectively. The steady-state operations of two optimal converters selected in Case Study-1 were verified experimentally. [ABSTRACT FROM AUTHOR]

This article presents a bidirectional soft-switching push–pull resonant converter that is highly efficient over a wide range of battery voltages. It is derived by integrating a current-fed push–pull circuit and an active voltage doubler circuit with a bidirectional switch. The converter operates as a pulsewidth modulation (PWM) current-fed push–pull resonant-boost converter in the forward direction, but as a PWM half-bridge resonant converter in the backward direction. The most attractive feature of the proposed converter is that, by employing the bidirectional switch and corresponding switching modulation, it can achieve almost ZVS at turn-off instants under wide variations of battery voltages. Therefore, the proposed converter achieves high efficiency even during high-frequency operation. Moreover, no instantaneous reactive current flows through the circuit under wide variations of battery voltages and loads. Furthermore, the proposed bidirectional resonant converter has a high conversion ratio in both power flow directions without using a transformer that has high turns-ratio. The operating principles and characteristics of the proposed bidirectional resonant converter are presented in detail. Experimental results using a 1-kW prototype verified the feasibility and efficiency of the proposed converter. [ABSTRACT FROM AUTHOR]

More demanding harmonic limits of future grid standards are likely to aggravate the disadvantages associated with the use of passive filters in high-power converters. These include substantial additional losses, a large footprint, and a considerable, power factor dependent voltage drop. For this reason, active filters (AFs) are an increasingly attractive alternative for reducing converter-induced harmonics; however, their performance is often subject to a limited frequency range and a frequency-dependent attenuation. To further improve the potential of AFs for use with grid-connected power converters, this article presents a novel control scheme for a parallel voltage-source AF integrated into a high-power main converter. A detailed converter analysis shows that, due to the advantageous converter configuration, the AF requires only fundamental frequency current control to mitigate converter-induced current harmonics. In contrast to conventional AF applications, this avoids tuning to specific frequencies, identification of individual harmonics, and measurement of high-frequency current ripple and high control bandwidth. The control design is carried out with the aim of minimizing the AF current load in steady state and transient operation. As shown by simulation results, the AF thus allows the mitigation of harmonics up to frequencies above the switching frequency of the main converter at only a small share of the total power and with small passive components. Finally, the hybrid converter is compared to LCL-filter based converter systems and the effectiveness of the presented control scheme is verified experimentally using a silicon carbide demonstrator. [ABSTRACT FROM AUTHOR]

The linear–nonlinear step load control is proposed to meet the requirements of the pulse load. The nonlinear optimal step control from absolute no-load to full-load is able to force the converter to reach the full-load steady-state operation point with the minimum output voltage drop and minimum settling time. The key is to calculate the initial switching frequency and the duty cycle of the first switching period depending on the load condition. The proposed method is realized by analytic geometry analysis on the state trajectory and confirmed in a 6.6-kW 1-kV/48-V SiC LLC converter. From no-load to full-load, the output voltage drops by 2.24 V and the settling time is 0.76 ms, which reduce by 18.8% and 79.3% compared with the conventional linear control, respectively. Under 100-Hz pulse load with the duty cycle of 30%, the output voltage drop is limited within 2.30 V and overshoot by 1.68 V. [ABSTRACT FROM AUTHOR]

This article presents a new algorithm of finite control set model predictive control (FCS-MPC) with floating virtual voltage vectors (VVs) applied to grid-connected voltage source converter. The new solution improves the conventional FCS-MPC and FCS-MPC with virtual VVs, assuring a fixed switching frequency. In comparison with FCS-MPC using virtual VVs, the proposed algorithm ensures a shorter distance between floating virtual VVs and actual voltage vector achieves lower THDi and ripples of the grid current for the same sampling time. The proposed control method has been experimentally validated using a 5-kW prototype. The algorithm was examined and compared in steady and transient states as well as under grid voltage disturbances, such as higher harmonics, dips, and unbalance. The simulation results and experimental measurements confirm that the developed control technique shows a high quality of the grid current (low THDi value), high dynamic performance, and immunity in case of weak grid conditions. [ABSTRACT FROM AUTHOR]

The Huang-Pair is a novel hybrid diode concept based on the integration of a low forward voltage drop, low voltage rating diode with a high voltage majority carrier switch, such as a silicon carbide (SiC) Junction gate field-effect transistor (JFET). A 1200 V Huang-Pair is developed to demonstrate the concept in which a low voltage Si diode is paired with a 1200 V SiC JEFT, resulting in a low-forward voltage, low reverse recovery high voltage diode. The Huang-Pair is a two terminal device and its performance tradeoff between forward voltage drop, leakage current, and reverse recovery can be conducted between two discrete devices, which is more flexible. The Huang-Pair concept can also be realized by SiC MOSFET and gallium nitride MOSFET, and it can be applied to different voltage classes. [ABSTRACT FROM AUTHOR]

This article presents a reconfigurable voltage multiplying rectifier (RVMR) to improve the performance of an LLC resonant converter for wide output voltage applications. The RVMR can operate as voltage-doubler mode or voltage-quadrupler mode according to the primary switching strategy. Two operation modes split a wide output voltage range into two narrow ranges. Therefore, the RVMR enables the LLC resonant tank to be designed in a narrow output voltage range, which results in a narrow switching frequency range, high efficiency, and high power density. A smooth mode transition can be achieved by adopting a phase-shift control to general pulse frequency modulation control without any additional switch. The proposed RVMR LLC converter can improve its efficiency by 2.9% and reduce component volume by 26% compared to the conventional full-bridge LLC resonant converter. A 750-W prototype with 400 V input, 100–300 V output voltage, and 2.5 A max output current has been built and tested to verify the effectiveness of the proposed converter. [ABSTRACT FROM AUTHOR]

The gallium nitride high electron mobility transistors (GaN HEMTs) are a superior candidate for the new-generation power electronics systems with higher efficiency and power density. However, due to the unique reverse characteristics, the reverse voltage drop of GaN HEMTs is much higher than that of diode. The deadtime loss in GaN-based bridge converters will be comparable to switching losses if the deadtime is not optimized. To optimize the deadtime for higher efficiency, this article proposes an accurate analytical model of GaN HEMTs, including circuit's parasitic inductances, the nonlinear capacitances, the unique reverse characteristics, etc. Taking a GaN-based synchronous buck converter as the example, the proposed model is realized, which fully uses the datasheet to avoid additional experiments. In order to accurately measure the switching current for validation, a novel parasitics-based current measurement method is proposed. The proposed model is verified by simulation in LTspice and experiment, and good agreement is shown. Based on the accurate analytical model, the deadtime is optimized for different load currents to improve the efficiency within the full load range. Compared with the fixed deadtime of 15 ns, the increase of efficiency can be up to 8%. This work will promote the high-frequency application of GaN HEMTs. [ABSTRACT FROM AUTHOR]

The performance of theoretical ultrahigh-voltage power semiconductor devices has been predicted by means of numerical simulations using the Sentaurus technology computer-aided design tool. A general silicon carbide punch-through insulated-gate bipolar transistor (IGBT) structure has been implemented with suitable physics-based models and parameters to reflect the device characteristics in a wide range of device blocking voltages from 20 to 50 kV. The models for 20 kV class IGBTs have been implicitly validated by means of published experimental results. Mixed-mode simulations were performed that predicted total switching energy loss densities of 335, 629, 906, and 999 mJ/cm2 for 20, 30, 40, and 50 kV class devices, respectively, at 25 °C, JC = 20 A/cm2, and an ambipolar carrier lifetime of 20 μs. While the IGBT on-state forward voltage drop reduces, the switching losses increase with higher charge-carrier lifetime for a given current density (e.g., 20 A/cm2). The large span of simulation results will be used as an input support to the design of future high-power converters. [ABSTRACT FROM AUTHOR]

In this article, a novel control method is proposed to control capacitor voltages for the T-type five-level nested neutral point piloted (5L-NNPP) converter. Due to the diversity of switching states for NNPP topology, there is no guarantee that the redundant vectors have the opposite effect on the dc bus neutral voltage. Meanwhile, the voltage balance controls between the dc bus neutral voltage and three-phase flying capacitor voltage are coupled and interacted with each other in the 5L-NNPP converter. This has severe voltage balance problems with the conventional space vector modulation (SVM), which limits its wide applications, especially under low output frequency. To solve the voltage balance problems, an improved SVM and voltage balance control (VBC) function are proposed to balance dc bus capacitor voltages and flying capacitor voltages, which realizes decoupling of voltage control. The switching states, switching principle, and dwell time calculation are developed, and the flowchart of VBC function is also elaborated on. The performance of the proposed improved SVM is investigated and compared with conventional SVM. The effectiveness and validity of the improved SVM with a VBC function is verified by simulation and experimental results of the 5L-NNPP converter. [ABSTRACT FROM AUTHOR]

This letter proposes a voltage balancing method for series-connected power devices in an LLC resonant converter. Series connection of power devices can allow an LLC resonant converter to operate in high-voltage applications. One key problem of series-connected power devices is the voltage imbalance due to device parameter deviations and gate drive delays. To achieve voltage balancing, an auxiliary module (AM) is connected in parallel with each power device. Each AM consists of a capacitor and an auxiliary switch with an antiparallel diode. The AM operates as a clamping circuit and voltage among the series-connected power devices can be shared evenly if the AM capacitor voltages are well-balanced. The AM capacitors are charged during the asynchronous period of the series-connected power devices. The excess energy of AM capacitors can be released by the freewheeling current during dead time in an LLC converter. By assigning a pulsing gate signal to AMs with higher voltages in every switching cycle, the AM capacitor voltages can be balanced. The proposed method will not induce additional power loss and does not affect the normal operation of power devices. Experimental results are provided to verify the effectiveness and feasibility of the proposed method. [ABSTRACT FROM AUTHOR]

Nowadays, more and more converters under voltage control mode with LC filter and current control mode with L/LCL filter are interconnected, forming a more complicated impedance network and resulting in coupled control behaviors. This type of interconnected converter system can be commonly seen in a stand-alone microgrid and some advanced testing benches for power electronics converters. In this article, a system consisting of a voltage-controlled converter with LC filter and a current-controlled converter with LCL filter have been studied. A detailed mathematical model is proposed to describe the stability and coupling characteristics of such system. It is found that the stability problem in this type of configuration may arise in an uncommon way, which is different from the typical resonance in a grid-connected converter system and can be triggered in higher frequency band. Meanwhile, the voltage and current behaviors of interconnected converters are strongly coupled through the complicated filter impedances and control loops in low-frequency band and mid-frequency band. [ABSTRACT FROM AUTHOR]

Commutation failure is a serious malfunction in line-commutated high voltage direct current (HVdc) converters which is mainly caused by the inverter ac faults, and results in a temporary interruption of transmitted power and damage to the converter equipment. In this article, a controllable commutation failure inhibitor (CCFI) is developed which obviates the main drawbacks of the existing power electronic based and fault current limiting based strategies. Under normal circumstances, the developed CCFI improves the steady-state stability and the power transfer capability of the inverter ac lines, while it does not cause excessive voltage stress on the converter valves. In addition, it would reduce the risk of commutation failure occurrence, since it does not lead to any voltage drop in the commutation circuit. When a fault occurs at one of the inverter ac systems, its corresponding CCFI limits the fault current depending on the reduced extinction angle. This would not only inhibit the successive commutation failures on the HVdc converter, but also extend the lifetime of components in the inverter ac systems. The practical feasibility of the developed CCFI is assessed through laboratory testing, using a real-time Opal-RT hardware prototyping platform. The obtained results indicate that the developed CCFI can reliably inhibit the commutation failures during various types of faults. [ABSTRACT FROM AUTHOR]

A virtual synchronous generator (VSG) control-based grid-connected converter (GCC) is an attractive solution to improve the stability of a more renewable-energy-integrated power system. Unfortunately, the inherent power coupling (i.e., the interaction between the active power loop and the reactive power loop) defect of VSG control severely restricts the power delivery capacity and the grid support capability of the GCC. The virtual inductor is commonly used to reduce coupling, but its decoupling capability is very limited. In addition, the power coupling mechanism and its limiting factors are not clear. For this issue, the nature of power coupling in the VSG system is investigated first. The decoupling capability of the virtual inductor is studied, and the reason for decoupling effectiveness is revealed. It indicates that the effectiveness of decoupling results from the proper voltage compensation, but this kind of positive effect is limited by the d-axis voltage drop across the virtual inductor. Then, a q-axis voltage-drop-based power decoupling control (QVPDC) is proposed to further reduce the power coupling, which does not consider the d-axis voltage drop when applying the virtual inductor. Compared with the virtual-inductor-based decoupling method, the decoupling performance of QVPDC is better, and the computation burden is reduced by half. Finally, the analysis and the proposed method are validated by simulation and experiment. [ABSTRACT FROM AUTHOR]

Compared to Si FETs, when the main GaN FET is in full zero voltage switching condition, maximum switching loss reduction can be achieved. Therefore, in this article, an active clamp flyback converter with GaN devices that implements fast ZVS by using the proposed dynamic resonant period control (DRPC) technique can reduce large transformer leakage inductance energy loss on the active resonant circuit. As the loading changes, the DRPC technique can dynamically adjust the on-time in auxiliary switch to prevent large voltage stress on the components in the primary side. In full load condition, the leakage energy loss can be reduced, thereby transferring more energy to the secondary side with maximum efficiency up to 94%. [ABSTRACT FROM AUTHOR]

This letter proposes a high output voltage dc–dc converter topology with series stacked converter modules. To implement the proposed modular dc–dc converter structure, output voltage balancing of the modules and simplification of the control circuitry were considered the major design objectives. To achieve voltage balancing between the modules, we proposed a split-secondary transformer winding structure and distributed connections to the rectifier circuit blocks. Each transformer includes two secondary windings, with each wire pair connected to a different rectifier circuit. Consequently, one rectifier receives ac power simultaneously by sharing the secondary windings fed from two different transformers. The proposed method was verified using a modular LCC resonant converter, which is widely employed in high-voltage applications. As a result, the control circuit was simplified by using a single controller to regulate the total output voltage and by applying a compact sensing circuit referenced to the output voltage of the module placed at the lowest grounding point. [ABSTRACT FROM AUTHOR]

In this article, the mechanism of neutral-point potential oscillations of neutral-point-clamped (NPC) three-level inverter fed dual three-phase ac motors is described. In a dual three-phase ac motor drive system, the three-level NPC inverter can be controlled as one six-phase system or two separate conventional three-phase systems. Therefore, this article extends the traditional control strategy, which injects the uniform zero-sequence voltage into the three-phase system to the six-phase system. The relationship of the uniform zero-sequence voltage and the neutral current is analyzed in detail. Meanwhile, the neutral-point potential-balancing strategy adopting dual zero-sequence voltages is presented in this article. The simulation and experiment verify that the proposed strategy adopting dual zero-sequence voltages has better control of the neutral point potential than the strategy adopting uniform zero-sequence voltage. [ABSTRACT FROM AUTHOR]

In recent decades, applications of selective harmonic elimination pulsewidth modulation (SHE-PWM) have been extended from two-level to multilevel converters (MLCs). For most MLC topologies, one of the main challenges of using SHE-PWM lies on capacitor voltage balancing, especially with very low switching frequency in high-power applications. Due to the broad variety of MLCs, it is of great difficulty to develop a generalized capacitor voltage balancing method under SHE-PWM that is suitable for all topologies. In order to further facilitate the industrial applications of SHE-PWM on MLCs, this article provides a comprehensive review of the state-of-the-art capacitor voltage balancing strategies for MLCs under SHE-PWM. The voltage balancing methods in this article include self-balancing control, charge amount regulation, zero-sequence harmonic adjustment, redundant switching angle sets adjustment, angle modification, selective harmonic elimination model predictive control, space voltage vectors adjustment, and redundant states adjustment. Detailed comparisons of the eight voltage balancing strategies under SHE-PWM are presented to facilitate the selections of the most suitable method for specific applications. Moreover, discussions on open questions and future trends of this topic are also presented, to motivate future research and explore new alternatives. [ABSTRACT FROM AUTHOR]

In this article, an improved dc capacitor voltage balancing control is proposed for single-phase cascaded H-bridge (CHB) multilevel converters. Compared with conventional voltage balancing control methods, the proposed scheme has a comprehensive consideration of three aspects while balancing the capacitor voltages among H-bridges: coupling effect elimination, reactive power balancing, and dynamic performance improvement. First, the system mathematical model in the d–q reference frame is derived, and the relationship among duty cycle modifications of H-bridges is revealed to eliminate the coupling effect of voltage balancing control on the current control loop. Then, based on the H-bridge power model, a quantitative solution for reactive power balancing is presented to design the reactive duty cycle modifications. In order to enhance the dynamic performance of voltage balancing control, a dynamic references design method is adopted to evaluate the active duty cycle modifications. Finally, both simulation and experimental results are presented to validate the effectiveness of the proposed scheme. [ABSTRACT FROM AUTHOR]

Modular multilevel converter (MMC) with reduced number of voltage sensors is conducive to the reduction of equipment cost and hardware complexity, however, usually resulting in the performance degradation. For example, when only one voltage sensor is equipped for the measurement of arm voltage, estimation of capacitor voltages may be not accurate enough, moreover, condition monitoring and fault diagnosis of submodules (SMs) are hard to implement. Thus, capacitor voltage estimation with capacitance self-updating based on grouping measurement (GM) is proposed in this article. By grouping and updating SM capacitance periodically, the accuracy of voltage estimation is greatly increased, meanwhile, severely aging or faulty capacitors can be detected, convenient for prompt replacement. Furthermore, GM-based fault diagnosis and fault disposal are proposed. Utilizing the measured and estimated group voltages, single or multiple SM open-circuit failures can be located in several sampling cycles and the isolating time of faulty SMs can be easily obtained even considering the time delay of bypass switch. Therefore, capacitor overvoltage and current distortion during SM failures are restrained effectively, which enhances the reliability and achieves seamless operation of MMC. Finally, the effectiveness of the proposed scheme is confirmed by simulation and experimental results. [ABSTRACT FROM AUTHOR]

This article presents a simple yet effective capacitor voltage balancing method for a five-level nested neutral point clamped (NNPC) converter. The NNPC has been recently developed for medium-voltage high-power applications and has interesting features. This hybrid topology has three flying capacitors in each leg. Like other flying capacitor-based topologies, it is necessary to regulate and balance the voltage of the flying capacitors in an NNPC converter to certain values. In this article, a new approach is proposed to accomplish this task. The proposed regulation technique employs line current direction and voltage deviation of flying capacitors to achieve regulation. The charging/discharging status of flying capacitors with respect to different switching states is used to define a priority index. This index is eventually used to select the proper switching state. A detailed investigation is presented to determine the best switching state for each level of the output voltage. The proposed method does not need any cost function and is very intuitive and simple to implement. Using simulations, the amplitude of the flying capacitor voltage ripple is measured, which shows reduction under all operating conditions. The feasibility and performance of the proposed method are confirmed by using a laboratory-type experimental setup. [ABSTRACT FROM AUTHOR]

Multilevel inverters in renewable applications usually require a high-voltage dc link fed by a front-end dc--dc boost stage. Such a two-stage power conversion, however, increases the switch count, leading to higher costs and power losses. To lower the number of switches, this letter proposes a six-switch inverter, capable of generating a seven-level voltage and a triple-voltage boost. Both features are achieved with only four switches operating at a high frequency while clamped by low-voltage capacitors. The remaining two switches must, however, endure higher voltage stresses but fortunately operate at a much lower frequency. The overall switching losses of the inverter are, thus, significantly reduced. Besides, the inverter shares a common ground between its dc input and ac output, which theoretically helps to eliminate the leakage current, if powered by photovoltaic sources. The operating principles of the inverter have been described and verified through experiments with an 800-W prototype. [ABSTRACT FROM AUTHOR]

This article proposes a distributed secondary level control strategy for dc microgrids, which achieves accurate and proportional power sharing and dc-bus voltage deviation restoration based on voltage shifting. In contrast to similar approaches, only one variable per converter is transmitted in the low-bandwidth communication link and with a simple integrator as the secondary level controller both objectives are achieved simultaneously. The information state shared between converters is a λ factor that incorporates the converter output voltage and power information. The secondary control computes the average λ locally and the controller generates an unique voltage-shifting term that modifies the converter output voltage reference. When all converters’ λ converge to the average value, both proportional power sharing and dc-bus voltage restoration are attained. The proposed technique suppresses the need for a complex control structure and large amount of converter variables. The proposed control is evaluated through PLECS simulation and it is validated in a 6.4 kW dc microgrid setup. [ABSTRACT FROM AUTHOR]

The input-series converters based on integrated-transformer are suitable for the high-input voltage multiple-output applications. In these converters, the integrated-transformer is an important device, through which active input voltage sharing of each series-module is achieved. Aiming at this type two-transistor flyback converter, stray capacitances effects of the integrated-transformer are analyzed, based on which windings arrangements of the integrated-transformer are investigated in this article. First, the conventional and input-series flyback converters are presented, and design principle of the integrated-transformer is introduced. Second, the main stray capacitances of the integrated-transformer and their influences are analyzed in detail. Third, various windings arrangements of the integrated-transformer are analyzed and compared. Finally, experimental study has been done on two laboratory-made prototypes with various integrated-transformers, and the theoretical analysis is verified by the experimental comparisons. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is an attractive converter topology for medium-/high-voltage applications. The voltage balancing for floating capacitors of submodules in MMC under carrier-phase-shift pulsewidth modulation (CPS-PWM), is an important research focus. However, the existing capacitor voltage balancing methods under this modulation mode have limited robustness and may not be applied to different working conditions. In this article, the disturbance and unbalance mechanisms of capacitor voltages in MMC system under CPS-PWM are theoretically revealed and solved. The disturbance metrics for capacitor voltage are extracted by using a proposed asynchronized sampling mode. Based on the characteristics of the extracted disturbances in nonsynchronized sampling mode, a novel capacitor voltage balancing method is proposed. The proposed balancing method is highly efficient for different working conditions of MMC, and is easy to be designed/realized. Finally, a flexible mission-profile emulator for the test of MMC is designed and built, with comprehensive validations to verify the effectiveness of the proposed capacitor balancing method under different operating conditions of MMC. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is a popular topology in medium- and high-voltage applications, and many efforts have been spent on MMC modeling. However, the impact of submodule voltage sensor noise (SVSN), which becomes more severe due to increasing switching speed of power semiconductors and compact submodule design, has not been considered in conventional models. In this letter, the SVSN is introduced by coupling capacitances between the sensor and power stage in an MMC switching model. Furthermore, the SVSN impact is considered in an MMC average model based on derivation of the relationship between the SVSN and the duty cycle. The proposed MMC switching model and average model considering the SVSN are validated by comparing simulations with experimental results in an MMC prototype using 10-kV SiC MOSFETS. [ABSTRACT FROM AUTHOR]

Both the capacitor-current-feedback (CCF) active damping and the point of common coupling (PCC) voltage feedforward can provide damping for the LCL-type grid-connected inverter. They are usually individually adopted, and negative damping will occur in a certain frequency range due to the digital control delay, leading to a nonminimum phase behavior. In this article, a hybrid active damping that combines the CCF and unit PCC voltage feedforward is studied. With properly designing the CCF gain, the positive damping range could sweep the entire frequency range with the variation of grid impedance. As a reward, the maximum profit of damping cooperation can be harvested, ensuring high robustness against both grid impedance variation and filter parameter fluctuation. The simulation and experimental results are provided to verify the effectiveness of the hybrid active damping. [ABSTRACT FROM AUTHOR]

The feedforward schemes of the voltage at point of common coupling (PCC) have been widely used in grid-connected inverters to reject the current harmonics caused by the grid voltage distortion. However, in weak grid, the PCC-voltage feedforward tends to destabilize the grid-connected inverters due to the effect of time delay. In this article, this stability issue is explicitly elaborated by the impedance-based stability criterion and then addressed with an improved feedforward scheme, which uses the grid voltage instead of the PCC voltage as the feedforward variable. Considering that it is hard to sense the real grid voltage directly, a method to extract the grid voltage from the sensed PCC voltage is put forward to implement the proposed feedforward scheme. By carefully arranging the sampling instants according to the duty cycle, a dual sampling mode is adopted to ensure an accurate extraction of the grid voltage. Finally, simulations and experiments are performed on a 6-kW single-phase grid-connected inverter, which confirm that the proposed grid-voltage feedforward achieves superior harmonic rejection ability and strong stability under weak grid condition. [ABSTRACT FROM AUTHOR]

A self-powered hybrid rectifier based on the association of series synchronized switch harvesting on inductor (S-SSHI) and synchronous electric charge extraction (SECE) is proposed for piezoelectric (PE) energy harvesters, aiming to achieve a good balance between the rectifier peak output power (RPOP) and optimal rectified voltage range (ORVR). The theory and simulation of the hybrid rectifier are presented with a good agreement. The measurements demonstrate that the prototyped hybrid rectifier can output the peak power of 0.28 mW and obtain the maximum end-to-end efficiency of 72.8% under PE open-circuit voltage of 6 V. It can achieve 1.55 times the RPOP of the SECE rectifier and 4.58 times the ORVR of the S-SSHI rectifier. The balance between the two indexes grasped in the hybrid rectifier is better than the others in the test. According to the estimation of FoM, BW0.9, and RoI0.9 factors, the overall performance of the hybrid rectifier is at the same level compared to state-of-the-art rectifiers. Additionally, the hybrid rectifier is easy to implement with some simple discrete components, which can be an alternative rectifier solution for PE harvesters. [ABSTRACT FROM AUTHOR]

This article presents a nonlinear control based on pulsewidth modulation (PWM) and an estimation mechanism of the output power to regulate the output voltage of a boost converter supplying a constant power load (CPL). The controller uses three parameters Kp, KE, and KA lending the regulator an adaptive nature. The behavior of the latter can be expressed in terms of the dynamic description of three errors. Namely, first, current error, i.e., difference between the average value of the inductor current and its equilibrium value, second, output voltage error, i.e., deviation between the output voltage and its desired equilibrium value, and, second, power error, i.e., difference between the output power estimated value and its actual value. The analysis of the dynamic behavior of the three errors results in a parametric region in the plane Kp – KE in which the system stability is guaranteed. The regulator exhibits fast and precise responses in the presence of disturbances in the input voltage and the load power. Conduction losses provoke steady-state errors in both current and power estimation but do not affect the output voltage tracking. [ABSTRACT FROM AUTHOR]

The noninverting buck–boost (NIBB) converter is a step-up and step-down dc–dc converter suitable for applications with a wide input voltage range. However, this circuit will face the problem of operating mode switching when the input voltage is close to the output voltage. Considering this problem, the principles of the NIBB converter are analyzed in this article. The duty cycle combinations of an NIBB converter are analyzed, and an analysis method for the mode transition problem from a geometric perspective is proposed. Using the two-edge pulsewidth modulation method, a novel bumpless mode transition control method is proposed. A nonlinear feedforward controller with hysteresis is designed according to the state equation of the circuit. Moreover, the inductor current reference value is compensated when the mode is switched so that the mode transition problem of the NIBB circuit is effectively solved. In addition, a small-signal analysis of the proposed method is performed. The analysis shows that the proposed method has good stability and dynamic performance in various typical conditions. A 10-kW NIBB prototype is built in this article, and the corresponding experimental scenarios are designed. The experimental results show that compared with the results of unified PI control during the mode transition, the transient oscillation of the output voltage is smaller, and the duration of the transient process is shorter. [ABSTRACT FROM AUTHOR]

The open-switch fault of voltage source converters (VSC) may change the switching state and distort the current, which is the basis for model-based fault diagnosis methods. Based on the analysis of the switching state, this letter presents a post-fault current model to estimate the current of each phase after one open-switch fault occurs. Combined with the current model-based method, the proposed post-fault model can be used not only to check the accuracy of the diagnosis result but also to detect multiple open-switch faults. The current, voltage, and driving signals used in this model are all from the VSC control system, therefore, this model can be easily implemented without additional sensors or hardware. Finally, the effectiveness of the proposed model is verified by the experimental results. [ABSTRACT FROM AUTHOR]