1. A Josephson technology system level experiment
- Author
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J.W. Stasiak, J. Sokolowski, M. Natan, S. P. Klepner, R.W. Guernsey, C.J. Anderson, S. Puroshothaman, Run-Han Wang, C.T. Wu, D. J. Herrell, H. C. Jones, J. H. Greiner, J. Matisoo, P. Geldermans, Paul A. Moskowitz, D.P. Walkman, T.R. Gheewala, K. R. Grebe, M. Klein, B. J. C. van der Hoeven, S. Bermon, A. J. Warnecke, T. Yogi, Harry R. Bickford, P. C. Arnett, Mark B. Ketchen, and A.A. Bright
- Subjects
Engineering ,Sequence ,business.industry ,Electrical engineering ,Magnetic flux ,Electronic, Optical and Magnetic Materials ,Power (physics) ,Path (graph theory) ,Jump ,Electrical and Electronic Engineering ,business ,Instruction cycle ,Critical path method ,Electronic circuit - Abstract
This letter describes the first system level test vehicle in Josephson technology. The experiment consists of four circuit chips assembled on two cards in a high density, 3-dimensional, card-on-board package. A data path, which is representative of a critical path of a future prototype processor, was successfully operated with a minimum cycle time of 3.7ns. The path simulates a jump control sequence and a cache access in each machine cycle. This experiment incorporates the essential components of the logic, power and package portions of a Josephson technology prototype.
- Published
- 1981
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