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A Josephson technology system level experiment
- Source :
- IEEE Electron Device Letters. 2:262-265
- Publication Year :
- 1981
- Publisher :
- Institute of Electrical and Electronics Engineers (IEEE), 1981.
-
Abstract
- This letter describes the first system level test vehicle in Josephson technology. The experiment consists of four circuit chips assembled on two cards in a high density, 3-dimensional, card-on-board package. A data path, which is representative of a critical path of a future prototype processor, was successfully operated with a minimum cycle time of 3.7ns. The path simulates a jump control sequence and a cache access in each machine cycle. This experiment incorporates the essential components of the logic, power and package portions of a Josephson technology prototype.
Details
- ISSN :
- 07413106
- Volume :
- 2
- Database :
- OpenAIRE
- Journal :
- IEEE Electron Device Letters
- Accession number :
- edsair.doi...........1357bd409d138f590966180a5f77b52f
- Full Text :
- https://doi.org/10.1109/edl.1981.25426