1. Comparison of reduced delay approximate multipliers using 4:2 compressors.
- Author
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Reji, Manisha, George, Merin Sarah, James, Nithin, and Peter, Sanjana
- Subjects
- *
COMPUTER arithmetic , *NAND gates , *COMPUTER engineering , *LOGIC circuits , *COMPRESSORS - Abstract
The concept of inexact computing has gained significant attention as a promising approach for digital processing, particularly in the field of computer arithmetic designs. 4:2 compressor leverage different compression features to compensate for the limitations of circuit-based design metrics by incorporating imprecision in computation. This paper presents analysis and comparison of 4:2 compressors using NAND gate logic and discuss the implementation of 8 bit Dadda multiplier using 4:2 compressor. The effectiveness of these designs is demonstrated through simulation results obtained using Verilog HDL language. [ABSTRACT FROM AUTHOR]
- Published
- 2024
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